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233 lines
8.8 KiB
C
233 lines
8.8 KiB
C
/**
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******************************************************************************
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* @file stm32h7b3i_discovery_ospi.h
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* @author MCD Application Team
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* @brief This file contains the common defines and functions prototypes for
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* the stm32h7b3i_discovery_ospi.c driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7B3I_DK_OSPI_H
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#define STM32H7B3I_DK_OSPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7b3i_discovery_conf.h"
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#include "stm32h7b3i_discovery_errno.h"
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#include "../Components/mx25lm51245g/mx25lm51245g.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32H7B3I_DK
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* @{
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*/
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/** @addtogroup STM32H7B3I_DK_OSPI
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup STM32H7B3I_DK_OSPI_Exported_Types OSPI_NOR Exported Types
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* @{
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*/
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typedef enum
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{
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OSPI_ACCESS_NONE = 0, /*!< Instance not initialized, */
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OSPI_ACCESS_INDIRECT, /*!< Instance use indirect mode access */
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OSPI_ACCESS_MMP /*!< Instance use Memory Mapped Mode read */
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} OSPI_Access_t;
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#if (USE_HAL_OSPI_REGISTER_CALLBACKS == 1)
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typedef struct
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{
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pOSPI_CallbackTypeDef pMspInitCb;
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pOSPI_CallbackTypeDef pMspDeInitCb;
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} BSP_OSPI_Cb_t;
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#endif /* (USE_HAL_OSPI_REGISTER_CALLBACKS == 1) */
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typedef struct
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{
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uint32_t MemorySize;
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uint32_t ClockPrescaler;
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uint32_t SampleShifting;
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uint32_t TransferRate;
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} MX_OSPI_Config;
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#define BSP_OSPI_NOR_Info_t MX25LM51245G_Info_t
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#define BSP_OSPI_NOR_Interface_t MX25LM51245G_Interface_t
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#define BSP_OSPI_NOR_Transfer_t MX25LM51245G_Transfer_t
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#define BSP_OSPI_NOR_Erase_t MX25LM51245G_Erase_t
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typedef struct
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{
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OSPI_Access_t IsInitialized; /*!< Instance access Flash method */
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BSP_OSPI_NOR_Interface_t InterfaceMode; /*!< Flash Interface mode of Instance */
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BSP_OSPI_NOR_Transfer_t TransferRate; /*!< Flash Transfer mode of Instance */
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uint32_t IsMspCallbacksValid;
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} OSPI_NOR_Ctx_t;
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typedef struct
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{
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BSP_OSPI_NOR_Interface_t InterfaceMode; /*!< Current Flash Interface mode */
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BSP_OSPI_NOR_Transfer_t TransferRate; /*!< Current Flash Transfer rate */
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} BSP_OSPI_NOR_Init_t;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup STM32H7B3I_DK_OSPI_Exported_Constants OSPI_NOR Exported Constants
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* @{
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*/
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#define OSPI_NOR_INSTANCES_NUMBER 1U
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/* Definition for OSPI modes */
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#define BSP_OSPI_NOR_SPI_MODE (BSP_OSPI_NOR_Interface_t)MX25LM51245G_SPI_MODE /* 1 Cmd Line, 1 Address Line and 1 Data Line */
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#define BSP_OSPI_NOR_OPI_MODE (BSP_OSPI_NOR_Interface_t)MX25LM51245G_OPI_MODE /* 8 Cmd Lines, 8 Address Lines and 8 Data Lines */
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/* Definition for OSPI transfer rates */
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#define BSP_OSPI_NOR_STR_TRANSFER (BSP_OSPI_NOR_Transfer_t)MX25LM51245G_STR_TRANSFER /* Single Transfer Rate */
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#define BSP_OSPI_NOR_DTR_TRANSFER (BSP_OSPI_NOR_Transfer_t)MX25LM51245G_DTR_TRANSFER /* Double Transfer Rate */
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/* OSPI erase types */
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#define BSP_OSPI_NOR_ERASE_4K MX25LM51245G_ERASE_4K
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#define BSP_OSPI_NOR_ERASE_64K MX25LM51245G_ERASE_64K
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#define BSP_OSPI_NOR_ERASE_CHIP MX25LM51245G_ERASE_BULK
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/* OSPI block sizes */
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#define BSP_OSPI_NOR_BLOCK_4K MX25LM51245G_SUBSECTOR_4K
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#define BSP_OSPI_NOR_BLOCK_64K MX25LM51245G_SECTOR_64K
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/* Definition for OSPI clock resources */
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#define OSPI_CLK_ENABLE() __HAL_RCC_OSPI1_CLK_ENABLE()
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#define OSPI_CLK_DISABLE() __HAL_RCC_OSPI1_CLK_DISABLE()
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#define OSPI_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
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#define OSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
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#define OSPI_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
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#define OSPI_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
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#define OSPI_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
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#define OSPI_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
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#define OSPI_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
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#define OSPI_D5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
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#define OSPI_D6_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
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#define OSPI_D7_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
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#define OSPI_DQS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
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#define OSPI_FORCE_RESET() __HAL_RCC_OSPI1_FORCE_RESET()
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#define OSPI_RELEASE_RESET() __HAL_RCC_OSPI1_RELEASE_RESET()
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/* Definition for OSPI Pins */
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/* OSPI_CLK */
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#define OSPI_CS_PIN GPIO_PIN_6
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#define OSPI_CS_GPIO_PORT GPIOG
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#define OSPI_CS_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_CLK_PIN GPIO_PIN_2
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#define OSPI_CLK_GPIO_PORT GPIOB
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#define OSPI_CLK_PIN_AF GPIO_AF9_OCTOSPIM_P1
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#define OSPI_D0_PIN GPIO_PIN_11
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#define OSPI_D0_GPIO_PORT GPIOD
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#define OSPI_D0_PIN_AF GPIO_AF9_OCTOSPIM_P1
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#define OSPI_D1_PIN GPIO_PIN_9
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#define OSPI_D1_GPIO_PORT GPIOF
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#define OSPI_D1_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_D2_PIN GPIO_PIN_7
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#define OSPI_D2_GPIO_PORT GPIOF
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#define OSPI_D2_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_D3_PIN GPIO_PIN_6
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#define OSPI_D3_GPIO_PORT GPIOF
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#define OSPI_D3_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_D4_PIN GPIO_PIN_1
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#define OSPI_D4_GPIO_PORT GPIOC
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#define OSPI_D4_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_D5_PIN GPIO_PIN_3
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#define OSPI_D5_GPIO_PORT GPIOH
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#define OSPI_D5_PIN_AF GPIO_AF9_OCTOSPIM_P1
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#define OSPI_D6_PIN GPIO_PIN_9
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#define OSPI_D6_GPIO_PORT GPIOG
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#define OSPI_D6_PIN_AF GPIO_AF9_OCTOSPIM_P1
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#define OSPI_D7_PIN GPIO_PIN_7
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#define OSPI_D7_GPIO_PORT GPIOD
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#define OSPI_D7_PIN_AF GPIO_AF10_OCTOSPIM_P1
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#define OSPI_DQS_PIN GPIO_PIN_5
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#define OSPI_DQS_GPIO_PORT GPIOC
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#define OSPI_DQS_PIN_AF GPIO_AF10_OCTOSPIM_P1
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/**
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* @}
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*/
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/* Exported variables --------------------------------------------------------*/
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/** @addtogroup STM32H7B3I_DK_OSPI_NOR_Exported_Variables OSPI_NOR Exported Variables
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* @{
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*/
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extern OSPI_HandleTypeDef hospi_nor[];
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extern OSPI_NOR_Ctx_t Ospi_Nor_Ctx[];
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup STM32H7B3I_DK_OSPI_NOR_Exported_FunctionsPrototypes OSPI_NOR Exported Functions Prototypes
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* @{
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*/
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int32_t BSP_OSPI_NOR_Init(uint32_t Instance, BSP_OSPI_NOR_Init_t *Init);
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int32_t BSP_OSPI_NOR_DeInit(uint32_t Instance);
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#if (USE_HAL_OSPI_REGISTER_CALLBACKS == 1)
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int32_t BSP_OSPI_NOR_RegisterMspCallbacks(uint32_t Instance, BSP_OSPI_Cb_t *CallBacks);
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int32_t BSP_OSPI_NOR_RegisterDefaultMspCallbacks(uint32_t Instance);
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#endif /* (USE_HAL_OSPI_REGISTER_CALLBACKS == 1) */
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int32_t BSP_OSPI_NOR_Read(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
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int32_t BSP_OSPI_NOR_Write(uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
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int32_t BSP_OSPI_NOR_Erase_Block(uint32_t Instance, uint32_t BlockAddress, BSP_OSPI_NOR_Erase_t BlockSize);
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int32_t BSP_OSPI_NOR_Erase_Chip(uint32_t Instance);
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int32_t BSP_OSPI_NOR_GetStatus(uint32_t Instance);
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int32_t BSP_OSPI_NOR_GetInfo(uint32_t Instance, BSP_OSPI_NOR_Info_t *pInfo);
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int32_t BSP_OSPI_NOR_EnableMemoryMappedMode(uint32_t Instance);
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int32_t BSP_OSPI_NOR_DisableMemoryMappedMode(uint32_t Instance);
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int32_t BSP_OSPI_NOR_ReadID(uint32_t Instance, uint8_t *Id);
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int32_t BSP_OSPI_NOR_ConfigFlash(uint32_t Instance, BSP_OSPI_NOR_Interface_t Mode, BSP_OSPI_NOR_Transfer_t Rate);
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int32_t BSP_OSPI_NOR_SuspendErase(uint32_t Instance);
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int32_t BSP_OSPI_NOR_ResumeErase(uint32_t Instance);
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/* These functions can be modified in case the current settings
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need to be changed for specific application needs */
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HAL_StatusTypeDef MX_OSPI_NOR_Init(OSPI_HandleTypeDef *hospi, MX_OSPI_Config *Config);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H7B3I_DK_OSPI_H */
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