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972 lines
36 KiB
C
972 lines
36 KiB
C
/**
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******************************************************************************
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* @file ft5336_reg.h
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* @author MCD Application Team
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* @brief Header of ft5336_reg.c
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2015 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef FT5336_REG_H
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#define FT5336_REG_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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/* Macros --------------------------------------------------------------------*/
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Component
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* @{
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*/
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/** @addtogroup FT5336
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup FT5336_Exported_Types FT5336 Exported Types
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* @{
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*/
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/************** Generic Function *******************/
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typedef int32_t (*FT5336_Write_Func)(void *, uint8_t, uint8_t*, uint16_t);
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typedef int32_t (*FT5336_Read_Func) (void *, uint8_t, uint8_t*, uint16_t);
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/**
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* @}
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*/
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/** @defgroup FT5336_Imported_Globals FT5336 Imported Globals
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* @{
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*/
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typedef struct
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{
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FT5336_Write_Func WriteReg;
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FT5336_Read_Func ReadReg;
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void *handle;
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} ft5336_ctx_t;
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/**
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* @}
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*/
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/** @defgroup FT5336_Exported_Constants FT5336 Exported Constants
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* @{
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*/
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/* Current mode register of the FT5336 (R/W) */
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#define FT5336_DEV_MODE_REG 0x00
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/* Gesture ID register */
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#define FT5336_GEST_ID_REG 0x01
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/* Touch Data Status register : gives number of active touch points (0..2) */
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#define FT5336_TD_STAT_REG 0x02
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/* P1 X, Y coordinates, weight and misc registers */
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#define FT5336_P1_XH_REG 0x03U
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#define FT5336_P1_XL_REG 0x04U
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#define FT5336_P1_YH_REG 0x05U
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#define FT5336_P1_YL_REG 0x06U
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#define FT5336_P1_WEIGHT_REG 0x07U
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#define FT5336_P1_MISC_REG 0x08U
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/* P2 X, Y coordinates, weight and misc registers */
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#define FT5336_P2_XH_REG 0x09U
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#define FT5336_P2_XL_REG 0x0AU
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#define FT5336_P2_YH_REG 0x0BU
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#define FT5336_P2_YL_REG 0x0CU
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#define FT5336_P2_WEIGHT_REG 0x0DU
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#define FT5336_P2_MISC_REG 0x0EU
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/* P3 X, Y coordinates, weight and misc registers */
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#define FT5336_P3_XH_REG 0x0FU
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#define FT5336_P3_XL_REG 0x10U
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#define FT5336_P3_YH_REG 0x11U
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#define FT5336_P3_YL_REG 0x12U
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#define FT5336_P3_WEIGHT_REG 0x13U
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#define FT5336_P3_MISC_REG 0x14U
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/* P4 X, Y coordinates, weight and misc registers */
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#define FT5336_P4_XH_REG 0x15U
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#define FT5336_P4_XL_REG 0x16U
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#define FT5336_P4_YH_REG 0x17U
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#define FT5336_P4_YL_REG 0x18U
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#define FT5336_P4_WEIGHT_REG 0x19U
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#define FT5336_P4_MISC_REG 0x1AU
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/* P5 X, Y coordinates, weight and misc registers */
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#define FT5336_P5_XH_REG 0x1BU
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#define FT5336_P5_XL_REG 0x1CU
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#define FT5336_P5_YH_REG 0x1DU
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#define FT5336_P5_YL_REG 0x1EU
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#define FT5336_P5_WEIGHT_REG 0x1FU
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#define FT5336_P5_MISC_REG 0x20U
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/* P6 X, Y coordinates, weight and misc registers */
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#define FT5336_P6_XH_REG 0x21U
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#define FT5336_P6_XL_REG 0x22U
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#define FT5336_P6_YH_REG 0x23U
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#define FT5336_P6_YL_REG 0x24U
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#define FT5336_P6_WEIGHT_REG 0x25U
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#define FT5336_P6_MISC_REG 0x26U
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/* P7 X, Y coordinates, weight and misc registers */
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#define FT5336_P7_XH_REG 0x27U
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#define FT5336_P7_XL_REG 0x28U
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#define FT5336_P7_YH_REG 0x29U
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#define FT5336_P7_YL_REG 0x2AU
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#define FT5336_P7_WEIGHT_REG 0x2BU
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#define FT5336_P7_MISC_REG 0x2CU
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/* P8 X, Y coordinates, weight and misc registers */
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#define FT5336_P8_XH_REG 0x2DU
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#define FT5336_P8_XL_REG 0x2EU
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#define FT5336_P8_YH_REG 0x2FU
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#define FT5336_P8_YL_REG 0x30U
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#define FT5336_P8_WEIGHT_REG 0x31U
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#define FT5336_P8_MISC_REG 0x32U
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/* P9 X, Y coordinates, weight and misc registers */
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#define FT5336_P9_XH_REG 0x33U
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#define FT5336_P9_XL_REG 0x34U
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#define FT5336_P9_YH_REG 0x35U
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#define FT5336_P9_YL_REG 0x36U
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#define FT5336_P9_WEIGHT_REG 0x37U
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#define FT5336_P9_MISC_REG 0x38U
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/* P10 X, Y coordinates, weight and misc registers */
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#define FT5336_P10_XH_REG 0x39U
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#define FT5336_P10_XL_REG 0x3AU
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#define FT5336_P10_YH_REG 0x3BU
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#define FT5336_P10_YL_REG 0x3CU
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#define FT5336_P10_WEIGHT_REG 0x3DU
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#define FT5336_P10_MISC_REG 0x3EU
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/* Threshold for touch detection */
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#define FT5336_TH_GROUP_REG 0x80
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/* Filter function coefficients */
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#define FT5336_TH_DIFF_REG 0x85
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/* Control register */
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#define FT5336_CTRL_REG 0x86
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/* The time period of switching from Active mode to Monitor mode when there is no touching */
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#define FT5336_TIMEENTERMONITOR_REG 0x87
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/* Report rate in Active mode */
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#define FT5336_PERIODACTIVE_REG 0x88
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/* Report rate in Monitor mode */
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#define FT5336_PERIODMONITOR_REG 0x89
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/* The value of the minimum allowed angle while Rotating gesture mode */
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#define FT5336_RADIAN_VALUE_REG 0x91
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/* Maximum offset while Moving Left and Moving Right gesture */
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#define FT5336_OFFSET_LR_REG 0x92
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/* Maximum offset while Moving Up and Moving Down gesture */
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#define FT5336_OFFSET_UD_REG 0x93
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/* Minimum distance while Moving Left and Moving Right gesture */
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#define FT5336_DISTANCE_LR_REG 0x94
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/* Minimum distance while Moving Up and Moving Down gesture */
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#define FT5336_DISTANCE_UD_REG 0x95
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/* Maximum distance while Zoom In and Zoom Out gesture */
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#define FT5336_DISTANCE_ZOOM_REG 0x96
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/* High 8-bit of LIB Version info */
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#define FT5336_LIB_VER_H_REG 0xA1
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/* Low 8-bit of LIB Version info */
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#define FT5336_LIB_VER_L_REG 0xA2
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/* Chip Selecting */
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#define FT5336_CIPHER_REG 0xA3
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/* Interrupt mode register (used when in interrupt mode) */
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#define FT5336_GMODE_REG 0xA4
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/* Current power mode the FT5336 system is in (R) */
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#define FT5336_PWR_MODE_REG 0xA5
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/* FT5336 firmware version */
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#define FT5336_FIRMID_REG 0xA6
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/* FT5336 Chip identification register */
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#define FT5336_CHIP_ID_REG 0xA8
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/* Release code version */
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#define FT5336_RELEASE_CODE_ID_REG 0xAF
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/* Current operating mode the FT5336 system is in (R) */
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#define FT5336_STATE_REG 0xBC
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/**
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* @}
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*/
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/*******************************************************************************
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* Register : Generic - All
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* Address : Generic - All
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* Bit Group Name: None
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* Permission : W
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*******************************************************************************/
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int32_t ft5336_write_reg(ft5336_ctx_t *ctx, uint8_t reg, uint8_t *pbuf, uint16_t length);
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int32_t ft5336_read_reg(ft5336_ctx_t *ctx, uint8_t reg, uint8_t *pbuf, uint16_t length);
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/**************** Base Function *******************/
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/*******************************************************************************
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* Register : DEV_MODE
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* Address : 0X00
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* Bit Group Name: DEVICE_MODE
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* Permission : RW
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*******************************************************************************/
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#define FT5336_DEV_MODE_BIT_MASK 0x70U
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#define FT5336_DEV_MODE_BIT_POSITION 4
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int32_t ft5336_dev_mode_w(ft5336_ctx_t *ctx, uint8_t value);
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int32_t ft5336_dev_mode_r(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : GEST_ID
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* Address : 0X01
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* Bit Group Name: Gesture ID
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* Permission : R
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*******************************************************************************/
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#define FT5336_GEST_ID_BIT_MASK 0xFFU
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#define FT5336_GEST_ID_BIT_POSITION 0
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int32_t ft5336_gest_id(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : TD_STATUS
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* Address : 0X02
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* Bit Group Name:
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* Permission : R
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*******************************************************************************/
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#define FT5336_TD_STATUS_BIT_MASK 0x0FU
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#define FT5336_TD_STATUS_BIT_POSITION 0
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int32_t ft5336_td_status(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_XH
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* Address : 0X03
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* Bit Group Name: First Event Flag
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* Permission : R
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* Default value : 0xF0U
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*******************************************************************************/
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#define FT5336_P1_XH_EF_BIT_MASK 0xC0U
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#define FT5336_P1_XH_EF_BIT_POSITION 6
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int32_t ft5336_p1_xh_ef(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_XH
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* Address : 0X03
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* Bit Group Name: First Touch X Position
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* Permission : R
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* Default value : 0x0FU
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*******************************************************************************/
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#define FT5336_P1_XH_TP_BIT_MASK 0x0FU
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#define FT5336_P1_XH_TP_BIT_POSITION 0
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int32_t ft5336_p1_xh_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_XL
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* Address : 0X04
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* Bit Group Name: First Touch X Position
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P1_XL_TP_BIT_MASK 0xFFU
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#define FT5336_P1_XL_TP_BIT_POSITION 0
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int32_t ft5336_p1_xl_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_YH
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* Address : 0X05
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* Bit Group Name: First Touch ID
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* Permission : R
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* Default value : 0xF0U
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*******************************************************************************/
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#define FT5336_P1_YH_TID_BIT_MASK 0xF0U
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#define FT5336_P1_YH_TID_BIT_POSITION 4
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int32_t ft5336_p1_yh_tid(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_YH
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* Address : 0x06
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* Bit Group Name: First Touch Y Position
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* Permission : R
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* Default value : 0x0FU
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*******************************************************************************/
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#define FT5336_P1_YH_TP_BIT_MASK 0x0FU
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#define FT5336_P1_YH_TP_BIT_POSITION 0
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int32_t ft5336_p1_yh_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_YL
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* Address : 0X06
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* Bit Group Name: First Touch Y Position
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P1_YL_TP_BIT_MASK 0xFFU
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#define FT5336_P1_YL_TP_BIT_POSITION 0
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int32_t ft5336_p1_yl_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_WEIGHT
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* Address : 0X07
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* Bit Group Name: First Touch Weight(pressure)
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P1_WEIGHT_BIT_MASK 0xFFU
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#define FT5336_P1_WEIGHT_BIT_POSITION 0
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int32_t ft5336_p1_weight(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P1_MISC
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* Address : 0X08
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* Bit Group Name: First Touch Area
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P1_MISC_BIT_MASK 0xF0U
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#define FT5336_P1_MISC_BIT_POSITION 4
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int32_t ft5336_p1_misc(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_XH
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* Address : 0X09
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* Bit Group Name: Second Event Flag
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* Permission : R
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* Default value : 0xF0U
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*******************************************************************************/
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#define FT5336_P2_XH_EF_BIT_MASK 0xC0U
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#define FT5336_P2_XH_EF_BIT_POSITION 6
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int32_t ft5336_p2_xh_ef(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_XH
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* Address : 0X09
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* Bit Group Name: Second Touch X Position
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* Permission : R
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* Default value : 0x0FU
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*******************************************************************************/
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#define FT5336_P2_XH_TP_BIT_MASK 0x0FU
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#define FT5336_P2_XH_TP_BIT_POSITION 0
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int32_t ft5336_p2_xh_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_XL
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* Address : 0X0A
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* Bit Group Name: Second Touch X Position
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P2_XL_TP_BIT_MASK 0xFFU
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#define FT5336_P2_XL_TP_BIT_POSITION 0
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int32_t ft5336_p2_xl_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_YH
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* Address : 0X0B
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* Bit Group Name: Second Touch ID
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* Permission : R
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* Default value : 0xF0U
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*******************************************************************************/
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#define FT5336_P2_YH_TID_BIT_MASK 0xF0U
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#define FT5336_P2_YH_TID_BIT_POSITION 4
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int32_t ft5336_p2_yh_tid(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_YH
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* Address : 0x0B
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* Bit Group Name: Second Touch Y Position
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* Permission : R
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* Default value : 0x0FU
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*******************************************************************************/
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#define FT5336_P2_YH_TP_BIT_MASK 0x0FU
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#define FT5336_P2_YH_TP_BIT_POSITION 0
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int32_t ft5336_p2_yh_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_YL
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* Address : 0X0C
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* Bit Group Name: Second Touch Y Position
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P2_YL_TP_BIT_MASK 0xFFU
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#define FT5336_P2_YL_TP_BIT_POSITION 0
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int32_t ft5336_p2_yl_tp(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_WEIGHT
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* Address : 0X0D
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* Bit Group Name: Second Touch Weight(pressure)
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* Permission : R
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* Default value : 0xFFU
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*******************************************************************************/
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#define FT5336_P2_WEIGHT_BIT_MASK 0xFFU
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#define FT5336_P2_WEIGHT_BIT_POSITION 0
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int32_t ft5336_p2_weight(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : P2_MISC
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* Address : 0X0E
|
|
* Bit Group Name: Second Touch Area
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P2_MISC_BIT_MASK 0xF0U
|
|
#define FT5336_P2_MISC_BIT_POSITION 4
|
|
int32_t ft5336_p2_misc(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_XH
|
|
* Address : 0X0F
|
|
* Bit Group Name: Third Event Flag
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P3_XH_EF_BIT_MASK 0xC0U
|
|
#define FT5336_P3_XH_EF_BIT_POSITION 6
|
|
int32_t ft5336_p3_xh_ef(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_XH
|
|
* Address : 0X0F
|
|
* Bit Group Name: Third Touch X High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_XH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P3_XH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p3_xh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_XL
|
|
* Address : 0X10
|
|
* Bit Group Name: Third Touch X Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_XL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P3_XL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p3_xl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_YH
|
|
* Address : 0X11
|
|
* Bit Group Name: Third Touch ID
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P3_YH_TID_BIT_MASK 0xF0U
|
|
#define FT5336_P3_YH_TID_BIT_POSITION 4
|
|
int32_t ft5336_p3_yh_tid(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_YH
|
|
* Address : 0x11
|
|
* Bit Group Name: Third Touch Y High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_YH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P3_YH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p3_yh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_YL
|
|
* Address : 0X12
|
|
* Bit Group Name: Third Touch Y Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_YL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P3_YL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p3_yl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_WEIGHT
|
|
* Address : 0X13
|
|
* Bit Group Name: Third Touch Weight(pressure)
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_WEIGHT_BIT_MASK 0xFFU
|
|
#define FT5336_P3_WEIGHT_BIT_POSITION 0
|
|
int32_t ft5336_p3_weight(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P3_MISC
|
|
* Address : 0X14
|
|
* Bit Group Name: Third Touch Area
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P3_MISC_BIT_MASK 0xF0U
|
|
#define FT5336_P3_MISC_BIT_POSITION 4
|
|
int32_t ft5336_p3_misc(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_XH
|
|
* Address : 0X15
|
|
* Bit Group Name: Fourth Event Flag
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P4_XH_EF_BIT_MASK 0xC0U
|
|
#define FT5336_P4_XH_EF_BIT_POSITION 6
|
|
int32_t ft5336_p4_xh_ef(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_XH
|
|
* Address : 0X15
|
|
* Bit Group Name: Fourth Touch X High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_XH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P4_XH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p4_xh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_XL
|
|
* Address : 0X16
|
|
* Bit Group Name: Fourth Touch X Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_XL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P4_XL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p4_xl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_YH
|
|
* Address : 0X17
|
|
* Bit Group Name: Fourth Touch ID
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P4_YH_TID_BIT_MASK 0xF0U
|
|
#define FT5336_P4_YH_TID_BIT_POSITION 4
|
|
int32_t ft5336_p4_yh_tid(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_YH
|
|
* Address : 0x17
|
|
* Bit Group Name: Fourth Touch Y High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_YH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P4_YH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p4_yh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_YL
|
|
* Address : 0X18
|
|
* Bit Group Name: Fourth Touch Y Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_YL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P4_YL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p4_yl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_WEIGHT
|
|
* Address : 0X19
|
|
* Bit Group Name: Fourth Touch Weight(pressure)
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_WEIGHT_BIT_MASK 0xFFU
|
|
#define FT5336_P4_WEIGHT_BIT_POSITION 0
|
|
int32_t ft5336_p4_weight(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P4_MISC
|
|
* Address : 0X1A
|
|
* Bit Group Name: Fourth Touch Area
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P4_MISC_BIT_MASK 0xF0U
|
|
#define FT5336_P4_MISC_BIT_POSITION 4
|
|
int32_t ft5336_p4_misc(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_XH
|
|
* Address : 0X1B
|
|
* Bit Group Name: Fifth Event Flag
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P5_XH_EF_BIT_MASK 0xC0U
|
|
#define FT5336_P5_XH_EF_BIT_POSITION 6
|
|
int32_t ft5336_p5_xh_ef(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_XH
|
|
* Address : 0X1B
|
|
* Bit Group Name: Fifth Touch X High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_XH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P5_XH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p5_xh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_XL
|
|
* Address : 0X1C
|
|
* Bit Group Name: Fifth Touch X Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_XL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P5_XL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p5_xl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_YH
|
|
* Address : 0X1D
|
|
* Bit Group Name: Fifth Touch ID
|
|
* Permission : R
|
|
* Default value : 0xF0U
|
|
*******************************************************************************/
|
|
#define FT5336_P5_YH_TID_BIT_MASK 0xF0U
|
|
#define FT5336_P5_YH_TID_BIT_POSITION 4
|
|
int32_t ft5336_p5_yh_tid(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_YH
|
|
* Address : 0x1D
|
|
* Bit Group Name: Fifth Touch Y High Position
|
|
* Permission : R
|
|
* Default value : 0x0FU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_YH_TP_BIT_MASK 0x0FU
|
|
#define FT5336_P5_YH_TP_BIT_POSITION 0
|
|
int32_t ft5336_p5_yh_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_YL
|
|
* Address : 0X1E
|
|
* Bit Group Name: Fifth Touch Y Low Position
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_YL_TP_BIT_MASK 0xFFU
|
|
#define FT5336_P5_YL_TP_BIT_POSITION 0
|
|
int32_t ft5336_p5_yl_tp(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_WEIGHT
|
|
* Address : 0X1F
|
|
* Bit Group Name: Fifth Touch Weight(pressure)
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_WEIGHT_BIT_MASK 0xFFU
|
|
#define FT5336_P5_WEIGHT_BIT_POSITION 0
|
|
int32_t ft5336_p5_weight(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : P5_MISC
|
|
* Address : 0X20
|
|
* Bit Group Name: Fifth Touch Area
|
|
* Permission : R
|
|
* Default value : 0xFFU
|
|
*******************************************************************************/
|
|
#define FT5336_P5_MISC_BIT_MASK 0xF0U
|
|
#define FT5336_P5_MISC_BIT_POSITION 4
|
|
int32_t ft5336_p5_misc(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : TH_GROUP
|
|
* Address : 0X80
|
|
* Bit Group Name: Threshold for touch detection
|
|
* Permission : RW
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_TH_GROUP_BIT_MASK 0xFFU
|
|
#define FT5336_TH_GROUP_BIT_POSITION 0
|
|
int32_t ft5336_th_group(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : TH_DIFF
|
|
* Address : 0X85
|
|
* Bit Group Name: Filter function coefficient
|
|
* Permission : RW
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_TH_DIFF_BIT_MASK 0xFFU
|
|
#define FT5336_TH_DIFF_BIT_POSITION 0
|
|
int32_t ft5336_th_diff(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : CTRL
|
|
* Address : 0X86
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x01
|
|
*******************************************************************************/
|
|
#define FT5336_CTRL_BIT_MASK 0xFFU
|
|
#define FT5336_CTRL_BIT_POSITION 0
|
|
int32_t ft5336_ctrl(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : TIMEENTERMONITOR
|
|
* Address : 0X87
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x0A
|
|
*******************************************************************************/
|
|
#define FT5336_TIMEENTERMONITOR_BIT_MASK 0xFFU
|
|
#define FT5336_TIMEENTERMONITOR_BIT_POSITION 0
|
|
int32_t ft5336_time_enter_monitor(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : PERIODACTIVE
|
|
* Address : 0X88
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_PERIODACTIVE_BIT_MASK 0xFFU
|
|
#define FT5336_PERIODACTIVE_BIT_POSITION 0
|
|
int32_t ft5336_period_active(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : PERIODMONITOR
|
|
* Address : 0X89
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x28
|
|
*******************************************************************************/
|
|
#define FT5336_PERIODMONITOR_BIT_MASK 0xFFU
|
|
#define FT5336_PERIODMONITOR_BIT_POSITION 0
|
|
int32_t ft5336_period_monitor(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : RADIAN_VALUE
|
|
* Address : 0X91
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x0A
|
|
*******************************************************************************/
|
|
#define FT5336_RADIAN_VALUE_BIT_MASK 0xFFU
|
|
#define FT5336_RADIAN_VALUE_BIT_POSITION 0
|
|
int32_t ft5336_radian_value(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : OFFSET_LEFT_RIGHT
|
|
* Address : 0X92
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x19
|
|
*******************************************************************************/
|
|
#define FT5336_OFFSET_LR_BIT_MASK 0xFFU
|
|
#define FT5336_OFFSET_LR_BIT_POSITION 0
|
|
int32_t ft5336_offset_left_right(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : OFFSET_UP_DOWN
|
|
* Address : 0X93
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x19
|
|
*******************************************************************************/
|
|
#define FT5336_OFFSET_UD_BIT_MASK 0xFFU
|
|
#define FT5336_OFFSET_UD_BIT_POSITION 0
|
|
int32_t ft5336_offset_up_down(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : DISTANCE_LEFT_RIGHT
|
|
* Address : 0X94
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x19
|
|
*******************************************************************************/
|
|
#define FT5336_DISTANCE_LR_BIT_MASK 0xFFU
|
|
#define FT5336_DISTANCE_LR_BIT_POSITION 0
|
|
int32_t ft5336_disatnce_left_right(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : DISTANCE_UP_DOWN
|
|
* Address : 0X95
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x19
|
|
*******************************************************************************/
|
|
#define FT5336_DISTANCE_UD_BIT_MASK 0xFFU
|
|
#define FT5336_DISTANCE_UD_BIT_POSITION 0
|
|
int32_t ft5336_distance_up_down(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : DISTANCE_ZOOM
|
|
* Address : 0X96
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x32
|
|
*******************************************************************************/
|
|
#define FT5336_DISTANCE_ZOOM_BIT_MASK 0xFFU
|
|
#define FT5336_DISTANCE_ZOOM_BIT_POSITION 0
|
|
int32_t ft5336_distance_zoom(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : LIB_VER_H
|
|
* Address : 0XA1
|
|
* Bit Group Name:
|
|
* Permission : R
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_LIB_VER_H_BIT_MASK 0xFFU
|
|
#define FT5336_LIB_VER_H_BIT_POSITION 0
|
|
int32_t ft5336_lib_ver_high(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : LIB_VER_L
|
|
* Address : 0XA2
|
|
* Bit Group Name:
|
|
* Permission : R
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_LIB_VER_L_BIT_MASK 0xFFU
|
|
#define FT5336_LIB_VER_L_BIT_POSITION 0
|
|
int32_t ft5336_lib_ver_low(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : CIPHER
|
|
* Address : 0XA3
|
|
* Bit Group Name:
|
|
* Permission : R
|
|
* Default value : 0x06
|
|
*******************************************************************************/
|
|
#define FT5336_CIPHER_BIT_MASK 0xFFU
|
|
#define FT5336_CIPHER_BIT_POSITION 0
|
|
int32_t ft5336_cipher(ft5336_ctx_t *ctx, uint8_t *value);
|
|
|
|
/*******************************************************************************
|
|
* Register : G_MODE
|
|
* Address : 0XA4
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x01
|
|
*******************************************************************************/
|
|
#define FT5336_G_MODE_BIT_MASK 0xFFU
|
|
#define FT5336_G_MODE_BIT_POSITION 0
|
|
int32_t ft5336_g_mode(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : PWR_MODE
|
|
* Address : 0XA5
|
|
* Bit Group Name:
|
|
* Permission : RW
|
|
* Default value : 0x00
|
|
*******************************************************************************/
|
|
#define FT5336_PWR_MODE_BIT_MASK 0xFFU
|
|
#define FT5336_PWR_MODE_BIT_POSITION 0
|
|
int32_t ft5336_pwr_mode(ft5336_ctx_t *ctx, uint8_t value);
|
|
|
|
/*******************************************************************************
|
|
* Register : FIRMID
|
|
* Address : 0XA6
|
|
* Bit Group Name:
|
|
* Permission : R
|
|
* Default value : None
|
|
*******************************************************************************/
|
|
#define FT5336_FIRMID_BIT_MASK 0xFFU
|
|
#define FT5336_FIRMID_BIT_POSITION 0
|
|
int32_t ft5336_firm_id(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : FOCALTECH_ID
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* Address : 0XA8
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* Bit Group Name:
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* Permission : R
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* Default value : 0x11
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*******************************************************************************/
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#define FT5336_CHIP_ID_BIT_MASK 0xFFU
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#define FT5336_CHIP_ID_BIT_POSITION 0
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int32_t ft5336_chip_id(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : RELEASE_CODE_ID
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* Address : 0XAF
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* Bit Group Name:
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* Permission : R
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* Default value : 0x001
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*******************************************************************************/
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#define FT5336_RC_ID_BIT_MASK 0xFFU
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#define FT5336_RC_ID_BIT_POSITION 0
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int32_t ft5336_release_code_id(ft5336_ctx_t *ctx, uint8_t *value);
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/*******************************************************************************
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* Register : STATE
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* Address : 0XBC
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* Bit Group Name:
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* Permission : RW
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* Default value : 0x01
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*******************************************************************************/
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#define FT5336_STATE_BIT_MASK 0xFFU
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#define FT5336_STATE_BIT_POSITION 0
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int32_t ft5336_state(ft5336_ctx_t *ctx, uint8_t value);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* FT5336_REG_H */
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/**
|
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* @}
|
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*/
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|
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/**
|
|
* @}
|
|
*/
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|
|
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/**
|
|
* @}
|
|
*/
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|
|
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/**
|
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* @}
|
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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