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This commit is contained in:
@@ -0,0 +1,37 @@
|
||||
---
|
||||
name: 'Issue report'
|
||||
about: 'Create a report to help us improve the quality of our software'
|
||||
title: ''
|
||||
labels: ''
|
||||
assignees: ''
|
||||
---
|
||||
|
||||
**Caution**
|
||||
|
||||
The Issues are strictly limited for the reporting of problem encountered with the software provided in this project.
|
||||
For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post your report to the **ST Community** in the STM32 MCUs dedicated [page](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
|
||||
|
||||
**Describe the set-up**
|
||||
|
||||
* The board (either ST RPN reference or your custom board)
|
||||
* IDE or at least the compiler and its version
|
||||
|
||||
**Describe the bug (skip if none)**
|
||||
|
||||
A clear and concise description of what the bug is.
|
||||
|
||||
**How to reproduce the bug (skip if none)**
|
||||
|
||||
1. Indicate the global behavior of your application project
|
||||
2. List the modules that you suspect to be the cause of the problem (Drivers, BSP, MW...)
|
||||
3. Describe the use case that generates the problem
|
||||
4. How we can reproduce the problem
|
||||
|
||||
|
||||
**Additional context**
|
||||
|
||||
If you have a first analysis, an enhancement, a fix or a patch, thank you to share your proposal.
|
||||
|
||||
**Screenshots**
|
||||
|
||||
If applicable, add screenshots to help explain your problem.
|
||||
@@ -0,0 +1,5 @@
|
||||
## IMPORTANT INFORMATION
|
||||
|
||||
### Contributor License Agreement (CLA)
|
||||
* The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter.
|
||||
* If you did not sign such agreement, please follow the steps mentioned in the [CONTRIBUTING.md](CONTRIBUTING.md) file.
|
||||
@@ -0,0 +1,73 @@
|
||||
# Contributor Covenant Code of Conduct
|
||||
|
||||
## Our Pledge
|
||||
|
||||
In the interest of fostering an open and welcoming environment, we as
|
||||
contributors and maintainers pledge to making participation in our project and
|
||||
our community a harassment-free experience for everyone, regardless of age, body
|
||||
size, disability, ethnicity, sex characteristics, gender identity and expression,
|
||||
level of experience, education, socio-economic status, nationality, personal
|
||||
appearance, race, religion, or sexual identity and orientation.
|
||||
|
||||
## Our Standards
|
||||
|
||||
Examples of behavior that contributes to creating a positive environment
|
||||
include:
|
||||
|
||||
* Using welcoming and inclusive language
|
||||
* Being respectful of differing viewpoints and experiences
|
||||
* Gracefully accepting constructive criticism
|
||||
* Focusing on what is best for the community
|
||||
* Showing empathy towards other community members
|
||||
|
||||
Examples of unacceptable behavior by participants include:
|
||||
|
||||
* The use of sexualized language or imagery and unwelcome sexual attention or
|
||||
advances
|
||||
* Trolling, insulting/derogatory comments, and personal or political attacks
|
||||
* Public or private harassment
|
||||
* Publishing others' private information, such as a physical or electronic
|
||||
address, without explicit permission
|
||||
* Other conduct which could reasonably be considered inappropriate in a
|
||||
professional setting
|
||||
|
||||
## Our Responsibilities
|
||||
|
||||
Project maintainers are responsible for clarifying the standards of acceptable
|
||||
behavior and are expected to take appropriate and fair corrective action in
|
||||
response to any instances of unacceptable behavior.
|
||||
|
||||
Project maintainers have the right and responsibility to remove, edit, or
|
||||
reject comments, commits, code, wiki edits, issues, and other contributions
|
||||
that are not aligned to this Code of Conduct, or to ban temporarily or
|
||||
permanently any contributor for other behaviors that they deem inappropriate,
|
||||
threatening, offensive, or harmful.
|
||||
|
||||
## Scope
|
||||
|
||||
This Code of Conduct applies both within project spaces and in public spaces
|
||||
when an individual is representing the project or its community. Examples of
|
||||
representing a project or community include using an official project e-mail
|
||||
address, posting via an official social media account, or acting as an appointed
|
||||
representative at an online or offline event. Representation of a project may be
|
||||
further defined and clarified by project maintainers.
|
||||
|
||||
## Enforcement
|
||||
|
||||
Instances of abusive, harassing, or otherwise unacceptable behavior may be
|
||||
reported by contacting the project team via this [link](https://www.st.com/content/st_com/en/contact-us.html).
|
||||
All complaints will be reviewed and investigated and will result in a response that
|
||||
is deemed necessary and appropriate to the circumstances. The project team is
|
||||
obligated to maintain confidentiality with regard to the reporter of an incident.
|
||||
Further details of specific enforcement policies may be posted separately.
|
||||
|
||||
Project maintainers who do not follow or enforce the Code of Conduct in good
|
||||
faith may face temporary or permanent repercussions as determined by other
|
||||
members of the project's leadership.
|
||||
|
||||
## Attribution
|
||||
|
||||
This Code of Conduct is adapted from the [Contributor Covenant](https://www.contributor-covenant.org), version 1.4,
|
||||
available [here](https://www.contributor-covenant.org/version/1/4/code-of-conduct.html).
|
||||
|
||||
For answers to common questions about this code of conduct, refer to the FAQ section [here](https://www.contributor-covenant.org/faq).
|
||||
@@ -0,0 +1,40 @@
|
||||
## Contributing guide
|
||||
|
||||
This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request.
|
||||
|
||||
### 1. Issues
|
||||
|
||||
#### 1.1 Before opening an issue
|
||||
|
||||
Please check the following points before posting an issue:
|
||||
* Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits).
|
||||
* Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3.-support-requests-and-questions) below.
|
||||
* Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Please refer to this [dashboard](https://github.com/orgs/STMicroelectronics/projects/2) for the list of issues and pull-requests. Do not forget to browse into the **closed** issues.
|
||||
|
||||
#### 1.2 Posting the issue
|
||||
|
||||
When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose.
|
||||
|
||||
### 2. Pull Requests
|
||||
|
||||
#### 2.1 Before opening a pull-request
|
||||
|
||||
STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
|
||||
|
||||
* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com).
|
||||
* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name.
|
||||
* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page.
|
||||
|
||||
Please note that:
|
||||
* The Corporate CLA will always take precedence over the Individual CLA.
|
||||
* One CLA submission is sufficient, for any project proposed by STMicroelectronics.
|
||||
|
||||
#### 2.2 How to proceed
|
||||
|
||||
* We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope.
|
||||
* Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version.
|
||||
* Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted.
|
||||
|
||||
### 3. Support requests and questions
|
||||
|
||||
For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog).
|
||||
@@ -0,0 +1,11 @@
|
||||
Copyright 2019 STMicroelectronics. All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
@@ -0,0 +1,45 @@
|
||||
# BSP STM32H7B3I-EVAL Component
|
||||
|
||||

|
||||
|
||||
## Overview
|
||||
|
||||
**STM32Cube** is an STMicroelectronics original initiative to ease developers' life by reducing efforts, time and cost.
|
||||
|
||||
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series.
|
||||
* The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
|
||||
* The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
|
||||
* The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series.
|
||||
* A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library...
|
||||
* A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series.
|
||||
|
||||
Two models of publication are proposed for the STM32Cube embedded software:
|
||||
* The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
|
||||
* The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions.
|
||||
|
||||
## Description
|
||||
|
||||
This **stm32h7b3i-eval** MCU component repository is one element of the **STM32CubeH7** MCU embedded software package, providing the **STM32H7B3I-EVAL** BSP BOARD component part.
|
||||
|
||||
## Release note
|
||||
|
||||
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32h7b3i-eval/blob/main/Release_Notes.html).
|
||||
|
||||
## Compatibility information
|
||||
|
||||
Below is the list of the BSP *component* drivers to be used with this BSP *board* driver. It is **crucial** that you use a consistent set of CMSIS - HAL - BSP versions, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Release_Notes.html) release note.
|
||||
|
||||
* [stm32-bsp-common](https://github.com/STMicroelectronics/stm32-bsp-common)
|
||||
* [stm32-cs42l51](https://github.com/STMicroelectronics/stm32-cs42l51)
|
||||
* [stm32-ft5336](https://github.com/STMicroelectronics/stm32-ft5336)
|
||||
* [stm32-m24lr64](https://github.com/STMicroelectronics/stm32-m24lr64)
|
||||
* [stm32-mfxstm32l152](https://github.com/STMicroelectronics/stm32-mfxstm32l152)
|
||||
* [stm32-mx25lm51245g](https://github.com/STMicroelectronics/stm32-mx25lm51245g)
|
||||
* [stm32-is42s32800j](https://github.com/STMicroelectronics/stm32-is42s32800j)
|
||||
* [stm32-ov5640](https://github.com/STMicroelectronics/stm32-ov5640)
|
||||
* [stm32-rk070er9427](https://github.com/STMicroelectronics/stm32-rk070er9427)
|
||||
* [stm32-s5k5cag](https://github.com/STMicroelectronics/stm32-s5k5cag)
|
||||
|
||||
## Troubleshooting
|
||||
|
||||
Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.
|
||||
@@ -0,0 +1,166 @@
|
||||
<!DOCTYPE html>
|
||||
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
|
||||
<head>
|
||||
<meta charset="utf-8" />
|
||||
<meta name="generator" content="pandoc" />
|
||||
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
|
||||
<title>Release Notes for STM32H7B3I-EVAL BSP Drivers</title>
|
||||
<style type="text/css">
|
||||
code{white-space: pre-wrap;}
|
||||
span.smallcaps{font-variant: small-caps;}
|
||||
span.underline{text-decoration: underline;}
|
||||
div.column{display: inline-block; vertical-align: top; width: 50%;}
|
||||
</style>
|
||||
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
|
||||
<!--[if lt IE 9]>
|
||||
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
|
||||
<![endif]-->
|
||||
</head>
|
||||
<body>
|
||||
<div class="row">
|
||||
<div class="col-sm-12 col-lg-4">
|
||||
<center>
|
||||
<h1 id="release-notes-for-stm32h7b3i-eval-bsp-drivers"><strong>Release Notes for STM32H7B3I-EVAL BSP Drivers</strong></h1>
|
||||
<p>Copyright © 2019 STMicroelectronics<br />
|
||||
</p>
|
||||
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
|
||||
</center>
|
||||
<h1 id="purpose">Purpose</h1>
|
||||
<p>The BSP (Board Specific Package) drivers are parts of the STM32Cube package based on the HAL drivers and provide a set of high level APIs relative to the hardware components and features in the evaluation boards, discovery kits and nucleo boards coming with the STM32Cube package for a given STM32 series.</p>
|
||||
<p>The BSP drivers allow a quick access to the boards’ services using high level APIs and without any specific configuration as the link with the HAL and the external components is done in intrinsic within the drivers.</p>
|
||||
<p>From project settings points of view, user has only to add the necessary driver’s files in the workspace and call the needed functions from examples. However some low level configuration functions are weak and can be overridden by the applications if user wants to change some BSP drivers default behavior.</p>
|
||||
</div>
|
||||
<div class="col-sm-12 col-lg-8">
|
||||
<h1 id="update-history">Update History</h1>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section9" checked aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V2.3.3 / 04-September-2024</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Update STM32H7B3I-EVAL BSP drivers to support new Touch Screen component GT911.</li>
|
||||
<li>Apply general code Artistic Style fixes.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V2.3.2 / 16-February-2024</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-1">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Invert argument order between definitions and declarations of I2C4_WriteReg() and I2C4_ReadReg().</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V2.3.1 / 11-February-2022</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-2">Main Changes</h2>
|
||||
<ul>
|
||||
<li>All source files: update disclaimer to add reference to the new license agreement.</li>
|
||||
<li>Modified the address calculation in the BSP_LCD_FillRGBRect() function when USE_DMA2D_TO_FILL_RGB_RECT is enabled to suppress the display of a distorted shape instead of a rectangle when trying to draw a rectangle with a bigger height.</li>
|
||||
<li>Cache maintained operation is included in the BSP_LCD_FillRGBRect() function to solve the display issue when USE_DMA2D_TO_FILL_RGB_RECT is enabled.</li>
|
||||
<li>Update to configure the OV5640 component when the S5K5CAG component is not used.</li>
|
||||
<li>Fix OSPI memory erasing issue in the BSP_OSPI_NOR_Erase_Block() function.</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V2.3.0 / 29-January-2021</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-3">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Minor typo fixes in comments</li>
|
||||
</ul>
|
||||
<h2 id="dependencies">Dependencies</h2>
|
||||
<ul>
|
||||
<li>Components/common v7.0.0</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V2.2.0 / 29-September-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-4">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Add License.md file</li>
|
||||
</ul>
|
||||
<h2 id="dependencies-1">Dependencies</h2>
|
||||
<ul>
|
||||
<li>Components/common v7.0.0</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V2.1.0 / 30-April-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-5">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Update BSP_BUS APIs with protection against RTOS multithread usage (under BSP_USE_CMSIS_OS pre-processor conditional define)</li>
|
||||
</ul>
|
||||
<h2 id="dependencies-2">Dependencies</h2>
|
||||
<ul>
|
||||
<li>Components/common v7.0.0</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V2.0.1 / 19-March-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-6">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Fix warnings when using HAL OSPI Register Callbacks</li>
|
||||
</ul>
|
||||
<h2 id="dependencies-3">Dependencies</h2>
|
||||
<ul>
|
||||
<li>Components/common v7.0.0</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V2.0.0 / 25-February-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-7">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Rename GUI_Drv_t into UTILS_LCD_Drv_t</li>
|
||||
</ul>
|
||||
<h2 id="backward-compatibility">Backward Compatibility</h2>
|
||||
<ul>
|
||||
<li>This version breaks the compatibility with previous versions</li>
|
||||
</ul>
|
||||
<h2 id="dependencies-4">Dependencies</h2>
|
||||
<ul>
|
||||
<li>Components/common v7.0.0</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 16-January-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-8">Main Changes</h2>
|
||||
<ul>
|
||||
<li>Minor updates to fix misra warnings</li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 30-October-2019</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-9">Main Changes</h2>
|
||||
<ul>
|
||||
<li>First official release of STM32H7B3I-EVAL BSP drivers in line with STM32Cube BSP drivers development guidelines (UM2298)</li>
|
||||
</ul>
|
||||
<h2 id="dependencies-5">Dependencies</h2>
|
||||
<p>This software release is compatible with:</p>
|
||||
<ul>
|
||||
<li>BSP common drivers <strong>V6.0.0</strong> or above</li>
|
||||
<li>STM32H7xx HAL drivers <strong>V1.7.0</strong></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
<footer class="sticky">
|
||||
For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/STM32">www.st.com</a></span>
|
||||
</footer>
|
||||
</body>
|
||||
</html>
|
||||
@@ -0,0 +1,31 @@
|
||||
# Report potential product security vulnerabilities
|
||||
|
||||
ST places a high priority on security, and our Product Security Incident
|
||||
Response Team (PSIRT) is committed to rapidly addressing potential security
|
||||
vulnerabilities affecting our products. PSIRT's long history and vast experience
|
||||
in security allows ST to perform clear analyses and provide appropriate guidance
|
||||
on mitigations and solutions when applicable.
|
||||
|
||||
If you wish to report potential security vulnerabilities regarding our products,
|
||||
**please do not report them through public GitHub issues.** Instead, we
|
||||
encourage you to report them to our ST PSIRT following the process described at:
|
||||
**https://www.st.com/content/st_com/en/security/report-vulnerabilities.html**
|
||||
|
||||
### IMPORTANT - READ CAREFULLY:
|
||||
|
||||
STMicroelectronics International N.V., on behalf of itself, its affiliates and
|
||||
subsidiaries, (collectively “ST”) takes all potential security vulnerability
|
||||
reports or other related communications (“Report(s)”) seriously. In order to
|
||||
review Your Report (the terms “You” and “Yours” include your employer, and all
|
||||
affiliates, subsidiaries and related persons or entities) and take actions as
|
||||
deemed appropriate, ST requires that we have the rights and Your permission to
|
||||
do so.
|
||||
|
||||
As such, by submitting Your Report to ST, You agree that You have the right to
|
||||
do so, and You grant to ST the rights to use the Report for purposes related to
|
||||
security vulnerability analysis, testing, correction, patching, reporting and
|
||||
any other related purpose or function.
|
||||
|
||||
By submitting Your Report, You agree that ST’s
|
||||
[Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html)
|
||||
applies to all related communications.
|
||||
Binary file not shown.
|
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|
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Load Diff
@@ -0,0 +1,460 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains definitions for STM32H7B3I_EVAL:
|
||||
* LEDs
|
||||
* push-buttons
|
||||
* Joystick
|
||||
* POT
|
||||
* COM ports
|
||||
* hardware resources.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_H
|
||||
#define STM32H7B3I_EVAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
#if (USE_BSP_COM_FEATURE > 0)
|
||||
#if (USE_COM_LOG > 0)
|
||||
#ifndef __GNUC__
|
||||
#include "stdio.h"
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LOW_LEVEL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_Exported_Types LOW LEVEL Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
LED1 = 0U,
|
||||
#if (USE_BSP_IO_CLASS > 0)
|
||||
LED_GREEN = LED1,
|
||||
LED2 = 1U,
|
||||
LED_RED = LED2,
|
||||
LED3 = 2U,
|
||||
LED_YELLOW = LED3,
|
||||
LED4 = 3U,
|
||||
LED_ORANGE = LED4,
|
||||
#endif
|
||||
LEDn
|
||||
} Led_TypeDef;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_WAKEUP = 0U,
|
||||
BUTTON_TAMPER = 1U,
|
||||
BUTTON_USER = 2U,
|
||||
BUTTONn
|
||||
} Button_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_MODE_GPIO = 0U,
|
||||
BUTTON_MODE_EXTI = 1U
|
||||
} ButtonMode_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
JOY_MODE_GPIO = 0U,
|
||||
JOY_MODE_EXTI = 1U
|
||||
} JOYMode_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
JOY1 = 0U,
|
||||
JOYn
|
||||
} JOY_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
JOY_NONE = 0x00U,
|
||||
JOY_SEL = 0x01U,
|
||||
JOY_DOWN = 0x02U,
|
||||
JOY_LEFT = 0x04U,
|
||||
JOY_RIGHT = 0x08U,
|
||||
JOY_UP = 0x10U,
|
||||
JOY_ALL = 0x1FU
|
||||
} JOYPin_TypeDef;
|
||||
|
||||
#if (USE_BSP_COM_FEATURE > 0)
|
||||
typedef enum
|
||||
{
|
||||
COM1 = 0U,
|
||||
COM2 = 1U,
|
||||
COMn
|
||||
} COM_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COM_STOPBITS_1 = UART_STOPBITS_1,
|
||||
COM_STOPBITS_2 = UART_STOPBITS_2,
|
||||
} COM_StopBitsTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COM_PARITY_NONE = UART_PARITY_NONE,
|
||||
COM_PARITY_EVEN = UART_PARITY_EVEN,
|
||||
COM_PARITY_ODD = UART_PARITY_ODD,
|
||||
} COM_ParityTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COM_HWCONTROL_NONE = UART_HWCONTROL_NONE,
|
||||
COM_HWCONTROL_RTS = UART_HWCONTROL_RTS,
|
||||
COM_HWCONTROL_CTS = UART_HWCONTROL_CTS,
|
||||
COM_HWCONTROL_RTS_CTS = UART_HWCONTROL_RTS_CTS,
|
||||
} COM_HwFlowCtlTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COM_WORDLENGTH_7B = UART_WORDLENGTH_7B,
|
||||
COM_WORDLENGTH_8B = UART_WORDLENGTH_8B,
|
||||
COM_WORDLENGTH_9B = UART_WORDLENGTH_9B,
|
||||
} COM_WordLengthTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaudRate;
|
||||
COM_WordLengthTypeDef WordLength;
|
||||
COM_StopBitsTypeDef StopBits;
|
||||
COM_ParityTypeDef Parity;
|
||||
COM_HwFlowCtlTypeDef HwFlowCtl;
|
||||
} COM_InitTypeDef;
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(UART_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(UART_HandleTypeDef *);
|
||||
} BSP_COM_Cb_t;
|
||||
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
#define MX_UART_InitTypeDef COM_InitTypeDef
|
||||
#endif
|
||||
|
||||
typedef enum
|
||||
{
|
||||
POT1 = 0U,
|
||||
POTn
|
||||
} POT_TypeDef;
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(ADC_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(ADC_HandleTypeDef *);
|
||||
} BSP_POT_Cb_t;
|
||||
#endif /* (USE_HAL_ADC_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_Exported_Constants LOW LEVEL Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Define for STM32H7B3I_EVAL board
|
||||
*/
|
||||
#if !defined (USE_STM32H7B3I_EVAL)
|
||||
#define USE_STM32H7B3I_EVAL
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32H7B3I_EVAL BSP Driver version number
|
||||
*/
|
||||
#define STM32H7B3I_EVAL_BSP_VERSION_MAIN (uint32_t)(0x02) /*!< [31:24] main version */
|
||||
#define STM32H7B3I_EVAL_BSP_VERSION_SUB1 (uint32_t)(0x03) /*!< [23:16] sub1 version */
|
||||
#define STM32H7B3I_EVAL_BSP_VERSION_SUB2 (uint32_t)(0x03) /*!< [15:8] sub2 version */
|
||||
#define STM32H7B3I_EVAL_BSP_VERSION_RC (uint32_t)(0x00) /*!< [7:0] release candidate */
|
||||
#define STM32H7B3I_EVAL_BSP_VERSION ((STM32H7B3I_EVAL_BSP_VERSION_MAIN << 24)\
|
||||
|(STM32H7B3I_EVAL_BSP_VERSION_SUB1 << 16)\
|
||||
|(STM32H7B3I_EVAL_BSP_VERSION_SUB2 << 8 )\
|
||||
|(STM32H7B3I_EVAL_BSP_VERSION_RC))
|
||||
|
||||
#define STM32H7B3I_EVAL_BSP_BOARD_NAME "STM32H7B3I-EVAL";
|
||||
#define STM32H7B3I_EVAL_BSP_BOARD_ID "MB1331D";
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_LED EVAL LOW LEVEL LED
|
||||
* @{
|
||||
*/
|
||||
#define LED1_GPIO_PORT GPIOG
|
||||
#define LED1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define LED1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOG_CLK_DISABLE()
|
||||
#define LED1_PIN GPIO_PIN_13
|
||||
#if (USE_BSP_IO_CLASS > 0)
|
||||
#define LED2_PIN IO_PIN_11
|
||||
#define LED3_PIN IO_PIN_12
|
||||
#define LED4_PIN IO_PIN_13
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_BUTTON LOW LEVEL BUTTON
|
||||
* @{
|
||||
*/
|
||||
/* Button state */
|
||||
#define BUTTON_RELEASED 0U
|
||||
#define BUTTON_PRESSED 1U
|
||||
|
||||
/**
|
||||
* @brief Wakeup push-button
|
||||
*/
|
||||
#define BUTTON_WAKEUP_PIN GPIO_PIN_0
|
||||
#define BUTTON_WAKEUP_GPIO_PORT GPIOA
|
||||
#define BUTTON_WAKEUP_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define BUTTON_WAKEUP_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
#define BUTTON_WAKEUP_EXTI_IRQn EXTI0_IRQn
|
||||
#define BUTTON_WAKEUP_EXTI_LINE EXTI_LINE_0
|
||||
|
||||
/**
|
||||
* @brief Tamper push-button
|
||||
*/
|
||||
#define BUTTON_TAMPER_PIN GPIO_PIN_13
|
||||
#define BUTTON_TAMPER_GPIO_PORT GPIOC
|
||||
#define BUTTON_TAMPER_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define BUTTON_TAMPER_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
||||
#define BUTTON_TAMPER_EXTI_IRQn EXTI15_10_IRQn
|
||||
#define BUTTON_TAMPER_EXTI_LINE EXTI_LINE_13
|
||||
|
||||
/**
|
||||
* @brief Key push-button
|
||||
*/
|
||||
#define BUTTON_USER_PIN GPIO_PIN_13
|
||||
#define BUTTON_USER_GPIO_PORT GPIOC
|
||||
#define BUTTON_USER_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define BUTTON_USER_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
|
||||
#define BUTTON_USER_EXTI_IRQn EXTI15_10_IRQn
|
||||
#define BUTTON_USER_EXTI_LINE EXTI_LINE_13
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_COM LOW LEVEL COM
|
||||
* @{
|
||||
*/
|
||||
#ifndef USE_BSP_COM_FEATURE
|
||||
#define USE_BSP_COM_FEATURE 0U
|
||||
#endif
|
||||
#if (USE_BSP_COM_FEATURE > 0)
|
||||
/**
|
||||
* @brief Definition for COM port1, connected to USART1
|
||||
*/
|
||||
#define COM1_UART USART1
|
||||
#define COM1_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
|
||||
#define COM1_CLK_DISABLE() __HAL_RCC_USART1_CLK_DISABLE()
|
||||
|
||||
#define COM1_TX_PIN GPIO_PIN_14
|
||||
#define COM1_TX_GPIO_PORT GPIOB
|
||||
#define COM1_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define COM1_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
||||
#define COM1_TX_AF GPIO_AF4_USART1
|
||||
|
||||
#define COM1_RX_PIN GPIO_PIN_15
|
||||
#define COM1_RX_GPIO_PORT GPIOB
|
||||
#define COM1_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define COM1_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
||||
#define COM1_RX_AF GPIO_AF4_USART1
|
||||
#define COM_POLL_TIMEOUT 1000U
|
||||
#endif /* (USE_BSP_COM_FEATURE > 0) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_POT LOW LEVEL POT
|
||||
* @{
|
||||
*/
|
||||
#ifndef USE_BSP_POT_FEATURE
|
||||
#define USE_BSP_POT_FEATURE 0U
|
||||
#endif
|
||||
/**
|
||||
* @brief Definition for Potentiometer, connected to ADC1
|
||||
*/
|
||||
#define POT1_ADC ADC1
|
||||
#define POT1_CLK_ENABLE() __HAL_RCC_ADC12_CLK_ENABLE()
|
||||
#define POT1_CLK_DISABLE() __HAL_RCC_ADC12_CLK_DISABLE()
|
||||
#define POT1_CHANNEL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define POT1_FORCE_RESET() __HAL_RCC_ADC12_FORCE_RESET()
|
||||
#define POT1_RELEASE_RESET() __HAL_RCC_ADC12_RELEASE_RESET()
|
||||
|
||||
/* Definition for ADCx Channel Pin */
|
||||
#define POT1_CHANNEL_GPIO_PIN GPIO_PIN_0
|
||||
#define POT1_CHANNEL_GPIO_PORT GPIOA
|
||||
|
||||
/* Definition for ADCx's Channel */
|
||||
#define POT1_ADC_CHANNEL ADC_CHANNEL_0
|
||||
#define POT1_SAMPLING_TIME ADC_SAMPLETIME_2CYCLES_5
|
||||
#define POT1_PRESCALER ADC_CLOCKPRESCALER_PCLK_DIV4
|
||||
#define POT_ADC_POLL_TIMEOUT 1000U
|
||||
#define POT_CONVERT2PERC(x) ((((int32_t)x) * 100)/(0xFFF))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LOW_LEVEL_JOYSTICK LOW LEVEL JOYSTICK
|
||||
* @{
|
||||
*/
|
||||
/* Joystick Pins definition */
|
||||
#define JOY_KEY_NUMBER 5U
|
||||
|
||||
#define JOY1_SEL_PIN GPIO_PIN_9
|
||||
#define JOY1_SEL_GPIO_PORT GPIOI
|
||||
#define JOY1_SEL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
|
||||
#define JOY1_SEL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOI_CLK_DISABLE()
|
||||
#define JOY1_SEL_EXTI_IRQn EXTI9_5_IRQn
|
||||
#define JOY1_SEL_EXTI_LINE EXTI_LINE_9
|
||||
|
||||
#define JOY1_DOWN_PIN GPIO_PIN_4
|
||||
#define JOY1_DOWN_GPIO_PORT GPIOD
|
||||
#define JOY1_DOWN_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define JOY1_DOWN_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
||||
#define JOY1_DOWN_EXTI_IRQn EXTI4_IRQn
|
||||
#define JOY1_DOWN_EXTI_LINE EXTI_LINE_4
|
||||
|
||||
#define JOY1_LEFT_PIN GPIO_PIN_5
|
||||
#define JOY1_LEFT_GPIO_PORT GPIOD
|
||||
#define JOY1_LEFT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define JOY1_LEFT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
|
||||
#define JOY1_LEFT_EXTI_IRQn EXTI9_5_IRQn
|
||||
#define JOY1_LEFT_EXTI_LINE EXTI_LINE_5
|
||||
|
||||
#define JOY1_RIGHT_PIN GPIO_PIN_9
|
||||
#define JOY1_RIGHT_GPIO_PORT GPIOH
|
||||
#define JOY1_RIGHT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define JOY1_RIGHT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOH_CLK_DISABLE()
|
||||
#define JOY1_RIGHT_EXTI_IRQn EXTI9_5_IRQn
|
||||
#define JOY1_RIGHT_EXTI_LINE EXTI_LINE_9
|
||||
|
||||
#define JOY1_UP_PIN GPIO_PIN_13
|
||||
#define JOY1_UP_GPIO_PORT GPIOH
|
||||
#define JOY1_UP_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define JOY1_UP_GPIO_CLK_DISABLE() __HAL_RCC_GPIOH_CLK_DISABLE()
|
||||
#define JOY1_UP_EXTI_IRQn EXTI15_10_IRQn
|
||||
#define JOY1_UP_EXTI_LINE EXTI_LINE_13
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LOW_LEVEL_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern EXTI_HandleTypeDef hpb_exti[BUTTONn];
|
||||
#if (USE_BSP_COM_FEATURE > 0)
|
||||
extern UART_HandleTypeDef hcom_uart[COMn];
|
||||
extern USART_TypeDef *COM_USART[COMn];
|
||||
#endif
|
||||
#if (USE_BSP_POT_FEATURE > 0)
|
||||
extern ADC_HandleTypeDef hpot_adc[POTn];
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LOW_LEVEL_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_GetVersion(void);
|
||||
const uint8_t *BSP_GetBoardName(void);
|
||||
const uint8_t *BSP_GetBoardID(void);
|
||||
|
||||
int32_t BSP_LED_Init(Led_TypeDef Led);
|
||||
int32_t BSP_LED_DeInit(Led_TypeDef Led);
|
||||
int32_t BSP_LED_On(Led_TypeDef Led);
|
||||
int32_t BSP_LED_Off(Led_TypeDef Led);
|
||||
int32_t BSP_LED_Toggle(Led_TypeDef Led);
|
||||
int32_t BSP_LED_GetState(Led_TypeDef Led);
|
||||
int32_t BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode);
|
||||
int32_t BSP_PB_DeInit(Button_TypeDef Button);
|
||||
int32_t BSP_PB_GetState(Button_TypeDef Button);
|
||||
void BSP_PB_Callback(Button_TypeDef Button);
|
||||
void BSP_PB_IRQHandler(Button_TypeDef Button);
|
||||
|
||||
#if (USE_BSP_COM_FEATURE > 0)
|
||||
int32_t BSP_COM_Init(COM_TypeDef COM, COM_InitTypeDef *COM_Init);
|
||||
int32_t BSP_COM_DeInit(COM_TypeDef COM);
|
||||
#if (USE_COM_LOG > 0)
|
||||
int32_t BSP_COM_SelectLogPort(COM_TypeDef COM);
|
||||
#endif
|
||||
|
||||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_COM_RegisterDefaultMspCallbacks(COM_TypeDef COM);
|
||||
int32_t BSP_COM_RegisterMspCallbacks(COM_TypeDef COM, BSP_COM_Cb_t *Callback);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
HAL_StatusTypeDef MX_USART6_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init);
|
||||
HAL_StatusTypeDef MX_USART1_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init);
|
||||
#endif /* USE_BSP_COM_FEATURE */
|
||||
|
||||
#if (USE_BSP_POT_FEATURE == 1)
|
||||
int32_t BSP_POT_Init(POT_TypeDef POT);
|
||||
int32_t BSP_POT_DeInit(POT_TypeDef POT);
|
||||
int32_t BSP_POT_GetLevel(POT_TypeDef POT);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_POT_RegisterDefaultMspCallbacks(POT_TypeDef POT);
|
||||
int32_t BSP_POT_RegisterMspCallbacks(POT_TypeDef POT, BSP_POT_Cb_t *Callback);
|
||||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
|
||||
HAL_StatusTypeDef MX_ADC1_Init(ADC_HandleTypeDef *hadc);
|
||||
#endif /* USE_BSP_POT_FEATURE */
|
||||
|
||||
int32_t BSP_JOY_Init(JOY_TypeDef JOY, JOYMode_TypeDef JoyMode, JOYPin_TypeDef JoyPins);
|
||||
int32_t BSP_JOY_DeInit(JOY_TypeDef JOY, JOYPin_TypeDef JoyPins);
|
||||
int32_t BSP_JOY_GetState(JOY_TypeDef JOY);
|
||||
void BSP_JOY_Callback(JOY_TypeDef JOY, uint32_t JoyPin);
|
||||
void BSP_JOY_IRQHandler(JOY_TypeDef JOY, JOYPin_TypeDef JoyPin);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* STM32H7B3I_EVAL_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,621 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_audio.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_audio.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_AUDIO_H
|
||||
#define STM32H7B3I_EVAL_AUDIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
#include "stm32h7b3i_eval_io.h"
|
||||
|
||||
#ifndef USE_AUDIO_CODEC_CS42L51
|
||||
#define USE_AUDIO_CODEC_CS42L51 1U
|
||||
#endif
|
||||
|
||||
#if (USE_AUDIO_CODEC_CS42L51 == 1)
|
||||
/* Include audio component Driver */
|
||||
#include "../Components/cs42l51/cs42l51.h"
|
||||
#endif
|
||||
#include "../Common/audio.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_AUDIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_AUDIO_Exported_Types AUDIO Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Device;
|
||||
uint32_t SampleRate;
|
||||
uint32_t BitsPerSample;
|
||||
uint32_t ChannelsNbr;
|
||||
uint32_t Volume;
|
||||
} BSP_AUDIO_Init_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Instance; /* Audio IN instance */
|
||||
uint32_t Device; /* Audio IN device to be used */
|
||||
uint32_t SampleRate; /* Audio IN Sample rate */
|
||||
uint32_t BitsPerSample; /* Audio IN Sample resolution */
|
||||
uint32_t ChannelsNbr; /* Audio IN number of channel */
|
||||
uint16_t *pBuff; /* Audio IN record buffer */
|
||||
uint8_t **pMultiBuff; /* Audio IN multi-buffer */
|
||||
uint32_t Size; /* Audio IN record buffer size */
|
||||
uint32_t Volume; /* Audio IN volume */
|
||||
uint32_t State; /* Audio IN State */
|
||||
uint32_t IsMultiBuff; /* Audio IN multi-buffer usage */
|
||||
uint32_t IsMspCallbacksValid; /* Is Msp Callbacks registered */
|
||||
} AUDIO_IN_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Instance; /* Audio OUT instance */
|
||||
uint32_t Device; /* Audio OUT device to be used */
|
||||
uint32_t SampleRate; /* Audio OUT Sample rate */
|
||||
uint32_t BitsPerSample; /* Audio OUT Sample Bit Per Sample */
|
||||
uint32_t Volume; /* Audio OUT volume */
|
||||
uint32_t ChannelsNbr; /* Audio OUT number of channel */
|
||||
uint32_t IsMute; /* Mute state */
|
||||
uint32_t State; /* Audio OUT State */
|
||||
uint32_t IsMspCallbacksValid; /* Is Msp Callbacks registered */
|
||||
} AUDIO_OUT_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t AudioFrequency;
|
||||
uint32_t AudioMode;
|
||||
uint32_t DataSize;
|
||||
uint32_t MonoStereoMode;
|
||||
uint32_t ClockStrobing;
|
||||
uint32_t Synchro;
|
||||
uint32_t OutputDrive;
|
||||
uint32_t SynchroExt;
|
||||
uint32_t FrameLength;
|
||||
uint32_t ActiveFrameLength;
|
||||
uint32_t SlotActive;
|
||||
} MX_SAI_Config;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SampleRate;
|
||||
uint32_t AudioMode;
|
||||
uint32_t FullDuplexMode;
|
||||
} MX_I2S_Config;
|
||||
|
||||
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)||(USE_HAL_I2S_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||
pSAI_CallbackTypeDef pMspSaiInitCb;
|
||||
pSAI_CallbackTypeDef pMspSaiDeInitCb;
|
||||
#endif
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
|
||||
pI2S_CallbackTypeDef pMspI2sInitCb;
|
||||
pI2S_CallbackTypeDef pMspI2sDeInitCb;
|
||||
#endif
|
||||
} BSP_AUDIO_OUT_Cb_t;
|
||||
#endif /* (USE_HAL_SAI_REGISTER_CALLBACKS == 1)||(USE_HAL_I2S_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* Filter parameters */
|
||||
DFSDM_Filter_TypeDef *FilterInstance;
|
||||
uint32_t RegularTrigger;
|
||||
uint32_t SincOrder;
|
||||
uint32_t Oversampling;
|
||||
/* Channel parameters */
|
||||
DFSDM_Channel_TypeDef *ChannelInstance;
|
||||
uint32_t DigitalMicPins;
|
||||
uint32_t DigitalMicType;
|
||||
uint32_t Channel4Filter;
|
||||
uint32_t ClockDivider;
|
||||
uint32_t RightBitShift;
|
||||
} MX_DFSDM_Config;
|
||||
|
||||
#if ((USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) || (USE_HAL_SAI_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1))
|
||||
typedef struct
|
||||
{
|
||||
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||
void (* pMspSaiInitCb)(SAI_HandleTypeDef *);
|
||||
void (* pMspSaiDeInitCb)(SAI_HandleTypeDef *);
|
||||
#endif
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
|
||||
void (* pMspI2sInitCb)(I2S_HandleTypeDef *);
|
||||
void (* pMspI2sDeInitCb)(I2S_HandleTypeDef *);
|
||||
#endif
|
||||
#if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
|
||||
pDFSDM_Filter_CallbackTypeDef pMspFltrInitCb;
|
||||
pDFSDM_Filter_CallbackTypeDef pMspFltrDeInitCb;
|
||||
pDFSDM_Channel_CallbackTypeDef pMspChInitCb;
|
||||
pDFSDM_Channel_CallbackTypeDef pMspChDeInitCb;
|
||||
#endif /* (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) */
|
||||
} BSP_AUDIO_IN_Cb_t;
|
||||
#endif /* ((USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) || (USE_HAL_SAI_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1)) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_AUDIO_Exported_Constants AUDIO Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define AUDIO_I2C_ADDRESS 0x94U
|
||||
|
||||
/* AUDIO FREQUENCY */
|
||||
#define AUDIO_FREQUENCY_192K 192000U
|
||||
#define AUDIO_FREQUENCY_176K 176400U
|
||||
#define AUDIO_FREQUENCY_96K 96000U
|
||||
#define AUDIO_FREQUENCY_88K 88200U
|
||||
#define AUDIO_FREQUENCY_48K 48000U
|
||||
#define AUDIO_FREQUENCY_44K 44100U
|
||||
#define AUDIO_FREQUENCY_32K 32000U
|
||||
#define AUDIO_FREQUENCY_22K 22050U
|
||||
#define AUDIO_FREQUENCY_16K 16000U
|
||||
#define AUDIO_FREQUENCY_11K 11025U
|
||||
#define AUDIO_FREQUENCY_8K 8000U
|
||||
|
||||
/* Audio bits per sample */
|
||||
#define AUDIO_RESOLUTION_8B 8U
|
||||
#define AUDIO_RESOLUTION_16B 16U
|
||||
#define AUDIO_RESOLUTION_24B 24U
|
||||
#define AUDIO_RESOLUTION_32B 32U
|
||||
|
||||
/* Audio Out devices */
|
||||
#define AUDIO_OUT_DEVICE_NONE 0U
|
||||
#define AUDIO_OUT_DEVICE_SPEAKER 1U
|
||||
#define AUDIO_OUT_DEVICE_HEADPHONE 2U
|
||||
#define AUDIO_OUT_DEVICE_SPK_HP 3U
|
||||
#define AUDIO_OUT_DEVICE_AUTO 4U
|
||||
#define AUDIO_OUT_DEVICE_HDMI 5U
|
||||
|
||||
/* Audio Mute state */
|
||||
#define BSP_AUDIO_MUTE_DISABLED 0U
|
||||
#define BSP_AUDIO_MUTE_ENABLED 1U
|
||||
|
||||
/* Audio Out states */
|
||||
#define AUDIO_OUT_STATE_RESET 0U
|
||||
#define AUDIO_OUT_STATE_PLAYING 1U
|
||||
#define AUDIO_OUT_STATE_STOP 2U
|
||||
#define AUDIO_OUT_STATE_PAUSE 3U
|
||||
|
||||
/* Audio Out states */
|
||||
/* Volume Input Output selection */
|
||||
#define AUDIO_VOLUME_INPUT 0U
|
||||
#define AUDIO_VOLUME_OUTPUT 1U
|
||||
|
||||
/* Codec commands */
|
||||
#define CODEC_PDWN_SW 1U
|
||||
#define CODEC_MUTE_ON 1U
|
||||
#define CODEC_MUTE_OFF 0U
|
||||
|
||||
/* Audio Out instances number */
|
||||
#define AUDIO_OUT_INSTANCES_NBR 2U
|
||||
|
||||
/* SAI peripheral configuration defines */
|
||||
#define AUDIO_OUT_SAIx SAI1_Block_A
|
||||
#define AUDIO_OUT_SAIx_CLK_ENABLE() __HAL_RCC_SAI1_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_CLK_DISABLE() __HAL_RCC_SAI1_CLK_DISABLE()
|
||||
|
||||
#define AUDIO_OUT_SAIx_MCLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_MCLK_GPIO_PORT GPIOG
|
||||
#define AUDIO_OUT_SAIx_MCLK_PIN GPIO_PIN_7
|
||||
#define AUDIO_OUT_SAIx_MCLK_AF GPIO_AF6_SAI1
|
||||
|
||||
#define AUDIO_OUT_SAIx_SCK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_SCK_GPIO_PORT GPIOE
|
||||
#define AUDIO_OUT_SAIx_SCK_PIN GPIO_PIN_5
|
||||
#define AUDIO_OUT_SAIx_SCK_AF GPIO_AF6_SAI1
|
||||
|
||||
#define AUDIO_OUT_SAIx_SD_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_SD_GPIO_PORT GPIOE
|
||||
#define AUDIO_OUT_SAIx_SD_PIN GPIO_PIN_6
|
||||
#define AUDIO_OUT_SAIx_SD_AF GPIO_AF6_SAI1
|
||||
|
||||
#define AUDIO_OUT_SAIx_FS_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_FS_GPIO_PORT GPIOE
|
||||
#define AUDIO_OUT_SAIx_FS_PIN GPIO_PIN_4
|
||||
#define AUDIO_OUT_SAIx_FS_AF GPIO_AF6_SAI1
|
||||
|
||||
/* SAI DMA Stream definitions */
|
||||
#define AUDIO_OUT_SAIx_DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
||||
#define AUDIO_OUT_SAIx_DMAx_STREAM DMA2_Stream6
|
||||
#define AUDIO_OUT_SAIx_DMAx_REQUEST DMA_REQUEST_SAI1_A
|
||||
#define AUDIO_OUT_SAIx_DMAx_IRQ DMA2_Stream6_IRQn
|
||||
#define AUDIO_OUT_SAIx_DMAx_IRQHandler DMA2_Stream6_IRQHandler
|
||||
|
||||
|
||||
/* SPI Configuration defines */
|
||||
#define AUDIO_OUT_I2Sx SPI6
|
||||
#define AUDIO_OUT_I2Sx_CLK_ENABLE() __HAL_RCC_SPI6_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_CLK_DISABLE() __HAL_RCC_SPI6_CLK_DISABLE()
|
||||
|
||||
#define AUDIO_OUT_I2Sx_MCK_PIN GPIO_PIN_3
|
||||
#define AUDIO_OUT_I2Sx_MCK_GPIO_PORT GPIOA
|
||||
#define AUDIO_OUT_I2Sx_MCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_MCK_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
#define AUDIO_OUT_I2Sx_MCK_AF GPIO_AF5_SPI6
|
||||
|
||||
#define AUDIO_OUT_I2Sx_SCK_PIN GPIO_PIN_5
|
||||
#define AUDIO_OUT_I2Sx_SCK_GPIO_PORT GPIOA
|
||||
#define AUDIO_OUT_I2Sx_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_SCK_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
#define AUDIO_OUT_I2Sx_SCK_AF GPIO_AF8_SPI6
|
||||
|
||||
#define AUDIO_OUT_I2Sx_SD_PIN GPIO_PIN_5
|
||||
#define AUDIO_OUT_I2Sx_SD_GPIO_PORT GPIOB
|
||||
#define AUDIO_OUT_I2Sx_SD_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_SD_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
||||
#define AUDIO_OUT_I2Sx_SD_AF GPIO_AF8_SPI6
|
||||
|
||||
#define AUDIO_OUT_I2Sx_WS_PIN GPIO_PIN_4
|
||||
#define AUDIO_OUT_I2Sx_WS_GPIO_PORT GPIOA
|
||||
#define AUDIO_OUT_I2Sx_WS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_WS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
#define AUDIO_OUT_I2Sx_WS_AF GPIO_AF8_SPI6
|
||||
|
||||
/* I2S DMA Stream Tx definitions */
|
||||
#define AUDIO_OUT_I2Sx_DMAx_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE()
|
||||
#define AUDIO_OUT_I2Sx_DMAx_CLK_DISABLE() __HAL_RCC_BDMA_CLK_DISABLE()
|
||||
#define AUDIO_OUT_I2Sx_DMAx_STREAM BDMA_Channel0
|
||||
#define AUDIO_OUT_I2Sx_DMAx_REQUEST BDMA_REQUEST_SPI6_TX
|
||||
#define AUDIO_OUT_I2Sx_DMAx_IRQ BDMA_Channel0_IRQn
|
||||
#define AUDIO_OUT_I2Sx_DMAx_IRQHandler BDMA_Channel0_IRQHandler
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
AUDIO IN CONFIGURATION
|
||||
------------------------------------------------------------------------------*/
|
||||
/* SAI peripheral configuration defines */
|
||||
#define AUDIO_IN_SAIx SAI1_Block_B
|
||||
#define AUDIO_IN_SAIx_CLK_ENABLE() __HAL_RCC_SAI1_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_CLK_DISABLE() __HAL_RCC_SAI1_CLK_DISABLE()
|
||||
#define AUDIO_IN_SAIx_AF GPIO_AF6_SAI1
|
||||
#define AUDIO_IN_SAIx_SD_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_SD_GPIO_PORT GPIOE
|
||||
#define AUDIO_IN_SAIx_SD_PIN GPIO_PIN_3
|
||||
|
||||
/* SAI DMA Stream definitions */
|
||||
#define AUDIO_IN_SAIx_DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
||||
#define AUDIO_IN_SAIx_DMAx_STREAM DMA2_Stream4
|
||||
#define AUDIO_IN_SAIx_DMAx_REQUEST DMA_REQUEST_SAI1_B
|
||||
#define AUDIO_IN_SAIx_DMAx_IRQ DMA2_Stream4_IRQn
|
||||
#define AUDIO_IN_SAIx_DMAx_IRQHandler DMA2_Stream4_IRQHandler
|
||||
|
||||
/* I2S peripheral configuration defines */
|
||||
#define AUDIO_IN_I2Sx_SD_PIN GPIO_PIN_4
|
||||
#define AUDIO_IN_I2Sx_SD_GPIO_PORT GPIOB
|
||||
#define AUDIO_IN_I2Sx_SD_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define AUDIO_IN_I2Sx_SD_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
|
||||
#define AUDIO_IN_I2Sx_SD_AF GPIO_AF8_SPI6
|
||||
|
||||
/* I2S DMA Stream definitions */
|
||||
#define AUDIO_IN_I2Sx_DMAx_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE()
|
||||
#define AUDIO_IN_I2Sx_DMAx_STREAM BDMA_Channel1
|
||||
#define AUDIO_IN_I2Sx_DMAx_REQUEST BDMA_REQUEST_SPI6_RX
|
||||
#define AUDIO_IN_I2Sx_DMAx_IRQ BDMA_Channel1_IRQn
|
||||
#define AUDIO_IN_I2Sx_DMAx_IRQHandler BDMA_Channel1_IRQHandler
|
||||
|
||||
/* DFSDM Configuration defines */
|
||||
#define AUDIO_DFSDMx_MIC1_CHANNEL DFSDM1_Channel3
|
||||
#define AUDIO_DFSDMx_MIC2_CHANNEL DFSDM1_Channel2
|
||||
#define AUDIO_DFSDMx_MIC3_CHANNEL DFSDM1_Channel7
|
||||
#define AUDIO_DFSDMx_MIC4_CHANNEL DFSDM1_Channel6
|
||||
#define AUDIO_DFSDMx_MIC5_CHANNEL DFSDM2_Channel1
|
||||
|
||||
#define AUDIO_DFSDMx_MIC1_CHANNEL_FOR_FILTER DFSDM_CHANNEL_3
|
||||
#define AUDIO_DFSDMx_MIC2_CHANNEL_FOR_FILTER DFSDM_CHANNEL_2
|
||||
#define AUDIO_DFSDMx_MIC3_CHANNEL_FOR_FILTER DFSDM_CHANNEL_7
|
||||
#define AUDIO_DFSDMx_MIC4_CHANNEL_FOR_FILTER DFSDM_CHANNEL_6
|
||||
#define AUDIO_DFSDMx_MIC5_CHANNEL_FOR_FILTER DFSDM_CHANNEL_1
|
||||
|
||||
#define AUDIO_DFSDMx_MIC1_FILTER DFSDM1_Filter0 /* Common MIC1 filter for MP34DT01TR(U24) microphone input */
|
||||
#define AUDIO_DFSDMx_MIC2_FILTER DFSDM1_Filter1 /* Common MIC2 filter for MP34DT01TR(U25) microphone input */
|
||||
#define AUDIO_DFSDMx_MIC3_FILTER DFSDM1_Filter2 /* Common MIC3 filter for MP34DT01TR(U25) microphone input */
|
||||
#define AUDIO_DFSDMx_MIC4_FILTER DFSDM1_Filter3 /* Common MIC4 filter for MP34DT01TR(U25) microphone input */
|
||||
#define AUDIO_DFSDMx_MIC5_FILTER DFSDM2_Filter0 /* Common MIC5 filter for MP34DT01TR(U25) microphone input */
|
||||
|
||||
#define AUDIO_DFSDM1_CLK_ENABLE() __HAL_RCC_DFSDM1_CLK_ENABLE()
|
||||
#define AUDIO_DFSDM2_CLK_ENABLE() __HAL_RCC_DFSDM2_CLK_ENABLE()
|
||||
|
||||
/* DATIN for MIC1 (GPIOC_PIN_7) */
|
||||
#define AUDIO_DFSDMx_DATIN_MIC1_PIN GPIO_PIN_7
|
||||
#define AUDIO_DFSDMx_DATIN_MIC1_AF GPIO_AF4_DFSDM1
|
||||
#define AUDIO_DFSDMx_DATIN_MIC1_GPIO_PORT GPIOC
|
||||
#define AUDIO_DFSDMx_DATIN_MIC1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
|
||||
/* DATIN for MIC2 (GPIOC_PIN_7)*/
|
||||
#define AUDIO_DFSDMx_DATIN_MIC2_PIN GPIO_PIN_7
|
||||
#define AUDIO_DFSDMx_DATIN_MIC2_AF GPIO_AF4_DFSDM1
|
||||
#define AUDIO_DFSDMx_DATIN_MIC2_GPIO_PORT GPIOC
|
||||
#define AUDIO_DFSDMx_DATIN_MIC2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
|
||||
/* DATIN for MIC3 (GPIOB_PIN_9) */
|
||||
#define AUDIO_DFSDMx_DATIN_MIC3_PIN GPIO_PIN_9
|
||||
#define AUDIO_DFSDMx_DATIN_MIC3_AF GPIO_AF3_DFSDM1
|
||||
#define AUDIO_DFSDMx_DATIN_MIC3_GPIO_PORT GPIOB
|
||||
#define AUDIO_DFSDMx_DATIN_MIC3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
/* DATIN for MIC4 (GPIOB_PIN_9)*/
|
||||
#define AUDIO_DFSDMx_DATIN_MIC4_PIN GPIO_PIN_9
|
||||
#define AUDIO_DFSDMx_DATIN_MIC4_AF GPIO_AF3_DFSDM1
|
||||
#define AUDIO_DFSDMx_DATIN_MIC4_GPIO_PORT GPIOB
|
||||
#define AUDIO_DFSDMx_DATIN_MIC4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
/* CKOUT for all mics connected to DFSDM1 (GPIOB_PIN_0)*/
|
||||
#define AUDIO_DFSDM1_CKOUT_PIN GPIO_PIN_0
|
||||
#define AUDIO_DFSDM1_CKOUT_AF GPIO_AF6_DFSDM1
|
||||
#define AUDIO_DFSDM1_CKOUT_GPIO_PORT GPIOB
|
||||
#define AUDIO_DFSDM1_CKOUT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
/* DATIN for MIC5 (GPIOB_PIN_12) */
|
||||
#define AUDIO_DFSDMx_DATIN_MIC5_PIN GPIO_PIN_12
|
||||
#define AUDIO_DFSDMx_DATIN_MIC5_AF GPIO_AF11_DFSDM2
|
||||
#define AUDIO_DFSDMx_DATIN_MIC5_GPIO_PORT GPIOB
|
||||
#define AUDIO_DFSDMx_DATIN_MIC5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
/* CKOUT for all mics connected to DFSDM2 (GPIOB_PIN_0)*/
|
||||
#define AUDIO_DFSDM2_CKOUT_PIN GPIO_PIN_0
|
||||
#define AUDIO_DFSDM2_CKOUT_AF GPIO_AF4_DFSDM2
|
||||
#define AUDIO_DFSDM2_CKOUT_GPIO_PORT GPIOB
|
||||
#define AUDIO_DFSDM2_CKOUT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
|
||||
/* DFSDM DMA MIC1, MIC2, MIC3, MIC4 and MIC5 channels definitions */
|
||||
#define AUDIO_DFSDMx_DMAx_MIC1_STREAM DMA2_Stream7
|
||||
#define AUDIO_DFSDMx_DMAx_MIC1_REQUEST (uint32_t)DMA_REQUEST_DFSDM1_FLT0
|
||||
#define AUDIO_DFSDMx_DMAx_MIC1_IRQ DMA2_Stream7_IRQn
|
||||
#define AUDIO_DFSDM_DMAx_MIC1_IRQHandler DMA2_Stream7_IRQHandler
|
||||
|
||||
#define AUDIO_DFSDMx_DMAx_MIC2_STREAM DMA2_Stream0
|
||||
#define AUDIO_DFSDMx_DMAx_MIC2_REQUEST (uint32_t)DMA_REQUEST_DFSDM1_FLT1
|
||||
#define AUDIO_DFSDMx_DMAx_MIC2_IRQ DMA2_Stream0_IRQn
|
||||
#define AUDIO_DFSDM_DMAx_MIC2_IRQHandler DMA2_Stream0_IRQHandler
|
||||
|
||||
#define AUDIO_DFSDMx_DMAx_MIC3_STREAM DMA2_Stream3
|
||||
#define AUDIO_DFSDMx_DMAx_MIC3_REQUEST (uint32_t)DMA_REQUEST_DFSDM1_FLT2
|
||||
#define AUDIO_DFSDMx_DMAx_MIC3_IRQ DMA2_Stream3_IRQn
|
||||
#define AUDIO_DFSDM_DMAx_MIC3_IRQHandler DMA2_Stream3_IRQHandler
|
||||
|
||||
#define AUDIO_DFSDMx_DMAx_MIC4_STREAM DMA2_Stream2
|
||||
#define AUDIO_DFSDMx_DMAx_MIC4_REQUEST (uint32_t)DMA_REQUEST_DFSDM1_FLT3
|
||||
#define AUDIO_DFSDMx_DMAx_MIC4_IRQ DMA2_Stream2_IRQn
|
||||
#define AUDIO_DFSDM_DMAx_MIC4_IRQHandler DMA2_Stream2_IRQHandler
|
||||
|
||||
#define AUDIO_DFSDMx_DMAx_MIC5_STREAM BDMA_Channel6
|
||||
#define AUDIO_DFSDMx_DMAx_MIC5_REQUEST BDMA_REQUEST_DFSDM2_FLT0
|
||||
#define AUDIO_DFSDMx_DMAx_MIC5_IRQ BDMA_Channel6_IRQn
|
||||
#define AUDIO_DFSDM_DMAx_MIC5_IRQHandler BDMA_Channel6_IRQHandler
|
||||
#define AUDIO_DFSDM2_DMAx_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE()
|
||||
|
||||
#define AUDIO_DFSDMx_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_WORD
|
||||
#define AUDIO_DFSDMx_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_WORD
|
||||
#define AUDIO_DFSDM1_DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
||||
|
||||
/* Audio In devices */
|
||||
/* Analog microphone input from 3.5 audio jack connector */
|
||||
#define AUDIO_IN_DEVICE_ANALOG_MIC 0x00U
|
||||
#define AUDIO_IN_DEVICE_ANALOG_LINE1 0x01U
|
||||
|
||||
/* MP34DT01TR digital microphone on PCB top side */
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC1 0x010U
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC2 0x020U
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC3 0x040U
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC4 0x080U
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC5 0x100U
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC_LAST AUDIO_IN_DEVICE_DIGITAL_MIC5
|
||||
#define AUDIO_IN_DEVICE_DIGITAL_MIC (AUDIO_IN_DEVICE_DIGITAL_MIC1 | AUDIO_IN_DEVICE_DIGITAL_MIC2)
|
||||
|
||||
#define DFSDM_MIC_NUMBER 5U
|
||||
|
||||
/* Audio In states */
|
||||
#define AUDIO_IN_STATE_RESET 0U
|
||||
#define AUDIO_IN_STATE_RECORDING 1U
|
||||
#define AUDIO_IN_STATE_STOP 2U
|
||||
#define AUDIO_IN_STATE_PAUSE 3U
|
||||
|
||||
/* Audio In instances number */
|
||||
#define AUDIO_IN_INSTANCES_NBR 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_AUDIO_Exported_Macros AUDIO Exported Macros
|
||||
* @{
|
||||
*/
|
||||
#define POS_VAL(VAL) (POSITION_VAL(VAL) - 4U)
|
||||
#define VOLUME_OUT_CONVERT(Volume) (((Volume) > 100)? 63:((uint8_t)(((Volume) * 63) / 100)))
|
||||
#define VOLUME_IN_CONVERT(Volume) (((Volume) >= 100)? 239:((uint8_t)(((Volume) * 239) / 100)))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_AUDIO_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
/* Audio in and out component object */
|
||||
extern void *Audio_CompObj;
|
||||
/* Play */
|
||||
extern SAI_HandleTypeDef haudio_out_sai;
|
||||
extern I2S_HandleTypeDef haudio_out_i2s;
|
||||
extern AUDIO_OUT_Ctx_t Audio_Out_Ctx[];
|
||||
|
||||
/* Record */
|
||||
extern DFSDM_Filter_HandleTypeDef haudio_in_dfsdm_filter[];
|
||||
extern DFSDM_Channel_HandleTypeDef haudio_in_dfsdm_channel[];
|
||||
extern SAI_HandleTypeDef haudio_in_sai;
|
||||
extern I2S_HandleTypeDef haudio_in_i2s;
|
||||
extern AUDIO_IN_Ctx_t Audio_In_Ctx[];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_AUDIO_OUT_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_AUDIO_OUT_Init(uint32_t Instance, BSP_AUDIO_Init_t *AudioInit);
|
||||
int32_t BSP_AUDIO_OUT_DeInit(uint32_t Instance);
|
||||
|
||||
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_AUDIO_OUT_RegisterMspCallbacks(uint32_t Instance, BSP_AUDIO_OUT_Cb_t *CallBacks);
|
||||
int32_t BSP_AUDIO_OUT_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
#endif /* (USE_HAL_SAI_REGISTER_CALLBACKS == 1)|| (USE_HAL_I2S_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
int32_t BSP_AUDIO_OUT_Play(uint32_t Instance, uint8_t *pData, uint32_t NbrOfBytes);
|
||||
int32_t BSP_AUDIO_OUT_Pause(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_OUT_Resume(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_OUT_Stop(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_OUT_Mute(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_OUT_UnMute(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_OUT_IsMute(uint32_t Instance, uint32_t *IsMute);
|
||||
|
||||
int32_t BSP_AUDIO_OUT_SetDevice(uint32_t Instance, uint32_t Device);
|
||||
int32_t BSP_AUDIO_OUT_GetDevice(uint32_t Instance, uint32_t *Device);
|
||||
|
||||
int32_t BSP_AUDIO_OUT_SetSampleRate(uint32_t Instance, uint32_t SampleRate);
|
||||
int32_t BSP_AUDIO_OUT_GetSampleRate(uint32_t Instance, uint32_t *SampleRate);
|
||||
|
||||
int32_t BSP_AUDIO_OUT_SetBitsPerSample(uint32_t Instance, uint32_t BitsPerSample);
|
||||
int32_t BSP_AUDIO_OUT_GetBitsPerSample(uint32_t Instance, uint32_t *BitsPerSample);
|
||||
|
||||
int32_t BSP_AUDIO_OUT_SetChannelsNbr(uint32_t Instance, uint32_t ChannelNbr);
|
||||
int32_t BSP_AUDIO_OUT_GetChannelsNbr(uint32_t Instance, uint32_t *ChannelNbr);
|
||||
|
||||
int32_t BSP_AUDIO_OUT_SetVolume(uint32_t Instance, uint32_t Volume);
|
||||
int32_t BSP_AUDIO_OUT_GetVolume(uint32_t Instance, uint32_t *Volume);
|
||||
int32_t BSP_AUDIO_OUT_GetState(uint32_t Instance, uint32_t *State);
|
||||
|
||||
void BSP_AUDIO_OUT_IRQHandler(uint32_t Instance);
|
||||
|
||||
/* User Callbacks: user has to implement these functions in his code if they are needed. */
|
||||
/* This function is called when the requested data has been completely transferred.*/
|
||||
void BSP_AUDIO_OUT_TransferComplete_CallBack(uint32_t Instance);
|
||||
|
||||
/* This function is called when half of the requested buffer has been transferred. */
|
||||
void BSP_AUDIO_OUT_HalfTransfer_CallBack(uint32_t Instance);
|
||||
|
||||
/* This function is called when an Interrupt due to transfer error on or peripheral
|
||||
error occurs. */
|
||||
void BSP_AUDIO_OUT_Error_CallBack(uint32_t Instance);
|
||||
|
||||
/* These function can be modified in case the current settings need to be changed
|
||||
for specific application needs */
|
||||
HAL_StatusTypeDef MX_SAI1_ClockConfig(SAI_HandleTypeDef *hsai, uint32_t SampleRate);
|
||||
HAL_StatusTypeDef MX_SAI1_Block_A_Init(SAI_HandleTypeDef *hsai, MX_SAI_Config *MXConfig);
|
||||
HAL_StatusTypeDef MX_I2S6_ClockConfig(I2S_HandleTypeDef *hi2s, uint32_t SampleRate);
|
||||
HAL_StatusTypeDef MX_I2S6_Init(I2S_HandleTypeDef *hi2s, MX_I2S_Config *MXConfig);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_AUDIO_IN_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_AUDIO_IN_Init(uint32_t Instance, BSP_AUDIO_Init_t *AudioInit);
|
||||
int32_t BSP_AUDIO_IN_DeInit(uint32_t Instance);
|
||||
#if ((USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) || (USE_HAL_SAI_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1))
|
||||
int32_t BSP_AUDIO_IN_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_IN_RegisterMspCallbacks(uint32_t Instance, BSP_AUDIO_IN_Cb_t *CallBacks);
|
||||
#endif /* ((USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) || (USE_HAL_SAI_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1)) */
|
||||
int32_t BSP_AUDIO_IN_Record(uint32_t Instance, uint8_t *pBuf, uint32_t NbrOfBytes);
|
||||
int32_t BSP_AUDIO_IN_OUT_Record(uint32_t InInstance, uint32_t OutInstance, uint8_t *pTxBuf, uint8_t *pRxBuf,
|
||||
uint32_t NbrOfBytes);
|
||||
int32_t BSP_AUDIO_IN_Stop(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_IN_Pause(uint32_t Instance);
|
||||
int32_t BSP_AUDIO_IN_Resume(uint32_t Instance);
|
||||
|
||||
int32_t BSP_AUDIO_IN_RecordChannels(uint32_t Instance, uint8_t **pBuf, uint32_t NbrOfBytes);
|
||||
int32_t BSP_AUDIO_IN_StopChannels(uint32_t Instance, uint32_t Device);
|
||||
int32_t BSP_AUDIO_IN_PauseChannels(uint32_t Instance, uint32_t Device);
|
||||
int32_t BSP_AUDIO_IN_ResumeChannels(uint32_t Instance, uint32_t Device);
|
||||
|
||||
int32_t BSP_AUDIO_IN_SetDevice(uint32_t Instance, uint32_t Device);
|
||||
int32_t BSP_AUDIO_IN_GetDevice(uint32_t Instance, uint32_t *Device);
|
||||
|
||||
int32_t BSP_AUDIO_IN_SetSampleRate(uint32_t Instance, uint32_t SampleRate);
|
||||
int32_t BSP_AUDIO_IN_GetSampleRate(uint32_t Instance, uint32_t *SampleRate);
|
||||
|
||||
int32_t BSP_AUDIO_IN_SetBitsPerSample(uint32_t Instance, uint32_t BitsPerSample);
|
||||
int32_t BSP_AUDIO_IN_GetBitsPerSample(uint32_t Instance, uint32_t *BitsPerSample);
|
||||
|
||||
int32_t BSP_AUDIO_IN_SetChannelsNbr(uint32_t Instance, uint32_t ChannelNbr);
|
||||
int32_t BSP_AUDIO_IN_GetChannelsNbr(uint32_t Instance, uint32_t *ChannelNbr);
|
||||
|
||||
int32_t BSP_AUDIO_IN_SetVolume(uint32_t Instance, uint32_t Volume);
|
||||
int32_t BSP_AUDIO_IN_GetVolume(uint32_t Instance, uint32_t *Volume);
|
||||
int32_t BSP_AUDIO_IN_GetState(uint32_t Instance, uint32_t *State);
|
||||
void BSP_AUDIO_IN_IRQHandler(uint32_t Instance, uint32_t InputDevice);
|
||||
|
||||
/* User Callbacks: user has to implement these functions in his code if they are needed. */
|
||||
/* This function should be implemented by the user application.
|
||||
It is called into this driver when the current buffer is filled to prepare the next
|
||||
buffer pointer and its size. */
|
||||
void BSP_AUDIO_IN_TransferComplete_CallBack(uint32_t Instance);
|
||||
void BSP_AUDIO_IN_HalfTransfer_CallBack(uint32_t Instance);
|
||||
|
||||
/* This function is called when an Interrupt due to transfer error on or peripheral
|
||||
error occurs. */
|
||||
void BSP_AUDIO_IN_Error_CallBack(uint32_t Instance);
|
||||
/* These function can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_DFSDM1_ClockConfig(DFSDM_Channel_HandleTypeDef *hDfsdmChannel, uint32_t SampleRate);
|
||||
HAL_StatusTypeDef MX_DFSDM1_Init(DFSDM_Filter_HandleTypeDef *hDfsdmFilter, DFSDM_Channel_HandleTypeDef *hDfsdmChannel,
|
||||
MX_DFSDM_Config *MXConfig);
|
||||
HAL_StatusTypeDef MX_DFSDM2_ClockConfig(DFSDM_Channel_HandleTypeDef *hDfsdmChannel, uint32_t SampleRate);
|
||||
HAL_StatusTypeDef MX_DFSDM2_Init(DFSDM_Filter_HandleTypeDef *hDfsdmFilter, DFSDM_Channel_HandleTypeDef *hDfsdmChannel,
|
||||
MX_DFSDM_Config *MXConfig);
|
||||
HAL_StatusTypeDef MX_SAI1_Block_B_Init(SAI_HandleTypeDef *hsai, MX_SAI_Config *MXConfig);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_AUDIO_H */
|
||||
@@ -0,0 +1,887 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_bus.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of firmware functions to communicate
|
||||
* with external devices available on STM32H7B3I-EVAL board (MB1331) from
|
||||
* STMicroelectronics
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_bus.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS BUS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_Constants BUS Private Constants
|
||||
* @{
|
||||
*/
|
||||
#ifndef I2C_VALID_TIMING_NBR
|
||||
#define I2C_VALID_TIMING_NBR 128U
|
||||
#endif
|
||||
#define I2C_SPEED_FREQ_STANDARD 0U /* 100 kHz */
|
||||
#define I2C_SPEED_FREQ_FAST 1U /* 400 kHz */
|
||||
#define I2C_SPEED_FREQ_FAST_PLUS 2U /* 1 MHz */
|
||||
#define I2C_ANALOG_FILTER_DELAY_MIN 50U /* ns */
|
||||
#define I2C_ANALOG_FILTER_DELAY_MAX 260U /* ns */
|
||||
#define I2C_USE_ANALOG_FILTER 1U
|
||||
#define I2C_DIGITAL_FILTER_COEF 0U
|
||||
#define I2C_PRESC_MAX 16U
|
||||
#define I2C_SCLDEL_MAX 16U
|
||||
#define I2C_SDADEL_MAX 16U
|
||||
#define I2C_SCLH_MAX 256U
|
||||
#define I2C_SCLL_MAX 256U
|
||||
#define SEC2NSEC 1000000000UL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_Types BUS Private Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t freq; /* Frequency in Hz */
|
||||
uint32_t freq_min; /* Minimum frequency in Hz */
|
||||
uint32_t freq_max; /* Maximum frequency in Hz */
|
||||
uint32_t hddat_min; /* Minimum data hold time in ns */
|
||||
uint32_t vddat_max; /* Maximum data valid time in ns */
|
||||
uint32_t sudat_min; /* Minimum data setup time in ns */
|
||||
uint32_t lscl_min; /* Minimum low period of the SCL clock in ns */
|
||||
uint32_t hscl_min; /* Minimum high period of SCL clock in ns */
|
||||
uint32_t trise; /* Rise time in ns */
|
||||
uint32_t tfall; /* Fall time in ns */
|
||||
uint32_t dnf; /* Digital noise filter coefficient */
|
||||
} I2C_Charac_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t presc; /* Timing prescaler */
|
||||
uint32_t tscldel; /* SCL delay */
|
||||
uint32_t tsdadel; /* SDA delay */
|
||||
uint32_t sclh; /* SCL high period */
|
||||
uint32_t scll; /* SCL low period */
|
||||
} I2C_Timings_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_Constants BUS Private Constants
|
||||
* @{
|
||||
*/
|
||||
static const I2C_Charac_t I2C_Charac[] =
|
||||
{
|
||||
[I2C_SPEED_FREQ_STANDARD] =
|
||||
{
|
||||
.freq = 100000,
|
||||
.freq_min = 80000,
|
||||
.freq_max = 120000,
|
||||
.hddat_min = 0,
|
||||
.vddat_max = 3450,
|
||||
.sudat_min = 250,
|
||||
.lscl_min = 4700,
|
||||
.hscl_min = 4000,
|
||||
.trise = 640,
|
||||
.tfall = 20,
|
||||
.dnf = I2C_DIGITAL_FILTER_COEF,
|
||||
},
|
||||
[I2C_SPEED_FREQ_FAST] =
|
||||
{
|
||||
.freq = 400000,
|
||||
.freq_min = 320000,
|
||||
.freq_max = 480000,
|
||||
.hddat_min = 0,
|
||||
.vddat_max = 900,
|
||||
.sudat_min = 100,
|
||||
.lscl_min = 1300,
|
||||
.hscl_min = 600,
|
||||
.trise = 250,
|
||||
.tfall = 100,
|
||||
.dnf = I2C_DIGITAL_FILTER_COEF,
|
||||
},
|
||||
[I2C_SPEED_FREQ_FAST_PLUS] =
|
||||
{
|
||||
.freq = 1000000,
|
||||
.freq_min = 800000,
|
||||
.freq_max = 1200000,
|
||||
.hddat_min = 0,
|
||||
.vddat_max = 450,
|
||||
.sudat_min = 50,
|
||||
.lscl_min = 500,
|
||||
.hscl_min = 260,
|
||||
.trise = 60,
|
||||
.tfall = 100,
|
||||
.dnf = I2C_DIGITAL_FILTER_COEF,
|
||||
},
|
||||
};
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_Variables BUS Private Variables
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
static uint32_t IsI2c2MspCbValid = 0;
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
static uint32_t I2c2InitCounter = 0;
|
||||
static I2C_Timings_t I2c_valid_timing[I2C_VALID_TIMING_NBR];
|
||||
static uint32_t I2c_valid_timing_nbr = 0;
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
static osSemaphoreId BspI2cSemaphore = 0;
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Exported_Variables BUS Exported Variables
|
||||
* @{
|
||||
*/
|
||||
I2C_HandleTypeDef hbus_i2c2;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_FunctionPrototypes BUS Private FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
static void I2C2_MspInit(I2C_HandleTypeDef *hI2c);
|
||||
static void I2C2_MspDeInit(I2C_HandleTypeDef *hI2c);
|
||||
static int32_t I2C2_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
|
||||
static int32_t I2C2_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
|
||||
static uint32_t I2C_GetTiming(uint32_t clock_src_freq, uint32_t i2c_freq);
|
||||
static uint32_t I2C_Compute_SCLL_SCLH(uint32_t clock_src_freq, uint32_t I2C_speed);
|
||||
static void I2C_Compute_PRESC_SCLDEL_SDADEL(uint32_t clock_src_freq, uint32_t I2C_speed);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Exported_Functions BUS Exported Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes I2C HAL.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_Init(void)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
hbus_i2c2.Instance = BUS_I2C2;
|
||||
|
||||
if (I2c2InitCounter == 0U)
|
||||
{
|
||||
I2c2InitCounter++;
|
||||
|
||||
if (HAL_I2C_GetState(&hbus_i2c2) == HAL_I2C_STATE_RESET)
|
||||
{
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
if (BspI2cSemaphore == NULL)
|
||||
{
|
||||
/* Create semaphore to prevent multiple I2C access */
|
||||
osSemaphoreDef(BSP_I2C_SEM);
|
||||
BspI2cSemaphore = osSemaphoreCreate(osSemaphore(BSP_I2C_SEM), 1);
|
||||
}
|
||||
#endif
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
|
||||
/* Init the I2C2 Msp */
|
||||
I2C2_MspInit(&hbus_i2c2);
|
||||
#else
|
||||
if (IsI2c2MspCbValid == 0U)
|
||||
{
|
||||
if (BSP_I2C2_RegisterDefaultMspCallbacks() != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_MSP_FAILURE;
|
||||
}
|
||||
}
|
||||
if (ret == BSP_ERROR_NONE)
|
||||
{
|
||||
#endif
|
||||
if (MX_I2C2_Init(&hbus_i2c2, I2C_GetTiming(HAL_RCC_GetPCLK1Freq(), BUS_I2C2_FREQUENCY)) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes I2C HAL.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_DeInit(void)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
I2c2InitCounter--;
|
||||
|
||||
if (I2c2InitCounter == 0U)
|
||||
{
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
|
||||
I2C2_MspDeInit(&hbus_i2c2);
|
||||
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 0) */
|
||||
|
||||
/* Init the I2C */
|
||||
if (HAL_I2C_DeInit(&hbus_i2c2) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MX I2C2 initialization.
|
||||
* @param hI2c I2C handle
|
||||
* @param timing I2C timing
|
||||
* @retval HAL status
|
||||
*/
|
||||
__weak HAL_StatusTypeDef MX_I2C2_Init(I2C_HandleTypeDef *hI2c, uint32_t timing)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
hI2c->Init.Timing = timing;
|
||||
hI2c->Init.OwnAddress1 = 0;
|
||||
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||||
hI2c->Init.OwnAddress2 = 0;
|
||||
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
|
||||
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
||||
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||||
|
||||
if (HAL_I2C_Init(hI2c) != HAL_OK)
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
uint32_t analog_filter;
|
||||
|
||||
analog_filter = I2C_ANALOGFILTER_ENABLE;
|
||||
if (HAL_I2CEx_ConfigAnalogFilter(hI2c, analog_filter) != HAL_OK)
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_I2CEx_ConfigDigitalFilter(hI2c, I2C_DIGITAL_FILTER_COEF) != HAL_OK)
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a 8bit value in a register of the device through BUS.
|
||||
* @param DevAddr Device address on Bus.
|
||||
* @param Reg The target register address to write
|
||||
* @param pData The target register value to be written
|
||||
* @param Length buffer size to be written
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
if (I2C2_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a 8bit register of the device through BUS
|
||||
* @param DevAddr Device address on BUS
|
||||
* @param Reg The target register address to read
|
||||
* @param pData Pointer to data buffer
|
||||
* @param Length Length of the data
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
if (I2C2_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a 16bit value in a register of the device through BUS.
|
||||
* @param DevAddr Device address on Bus.
|
||||
* @param Reg The target register address to write
|
||||
* @param pData The target register value to be written
|
||||
* @param Length buffer size to be written
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
if (I2C2_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a 16bit register of the device through BUS
|
||||
* @param DevAddr Device address on BUS
|
||||
* @param Reg The target register address to read
|
||||
* @param pData Pointer to data buffer
|
||||
* @param Length Length of the data
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
if (I2C2_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_I2C_GetError(&hbus_i2c2) == HAL_I2C_ERROR_AF)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks if target device is ready for communication.
|
||||
* @note This function is used with Memory devices
|
||||
* @param DevAddr Target device address
|
||||
* @param Trials Number of trials
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_IsReady(uint16_t DevAddr, uint32_t Trials)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
if (HAL_I2C_IsDeviceReady(&hbus_i2c2, DevAddr, Trials, 1000) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUSY;
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Delay function
|
||||
* @retval Tick value
|
||||
*/
|
||||
int32_t BSP_GetTick(void)
|
||||
{
|
||||
return (int32_t)HAL_GetTick();
|
||||
}
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Register Default I2C2 Bus Msp Callbacks
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_RegisterDefaultMspCallbacks(void)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c2);
|
||||
|
||||
/* Register default MspInit/MspDeInit Callback */
|
||||
if (HAL_I2C_RegisterCallback(&hbus_i2c2, HAL_I2C_MSPINIT_CB_ID, I2C2_MspInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_I2C_RegisterCallback(&hbus_i2c2, HAL_I2C_MSPDEINIT_CB_ID, I2C2_MspDeInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsI2c2MspCbValid = 1U;
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
/* BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register I2C2 Bus Msp Callback registering
|
||||
* @param Callbacks pointer to I2C2 MspInit/MspDeInit callback functions
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_I2C2_RegisterMspCallbacks(BSP_I2C_Cb_t *Callback)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Get semaphore to prevent multiple I2C access */
|
||||
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
|
||||
#endif
|
||||
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c2);
|
||||
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_I2C_RegisterCallback(&hbus_i2c2, HAL_I2C_MSPINIT_CB_ID, Callback->pMspI2cInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_I2C_RegisterCallback(&hbus_i2c2, HAL_I2C_MSPDEINIT_CB_ID, Callback->pMspI2cDeInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsI2c2MspCbValid = 1U;
|
||||
}
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
/* Release semaphore to prevent multiple I2C access */
|
||||
osSemaphoreRelease(BspI2cSemaphore);
|
||||
#endif
|
||||
/* BSP status */
|
||||
return ret;
|
||||
}
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Private_Functions BUS Private Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Compute I2C timing according current I2C clock source and required I2C clock.
|
||||
* @param clock_src_freq I2C clock source in Hz.
|
||||
* @param i2c_freq Required I2C clock in Hz.
|
||||
* @retval I2C timing or 0 in case of error.
|
||||
*/
|
||||
static uint32_t I2C_GetTiming(uint32_t clock_src_freq, uint32_t i2c_freq)
|
||||
{
|
||||
uint32_t ret = 0;
|
||||
uint32_t speed;
|
||||
uint32_t idx;
|
||||
|
||||
if ((clock_src_freq != 0U) && (i2c_freq != 0U))
|
||||
{
|
||||
for (speed = 0 ; speed <= (uint32_t)I2C_SPEED_FREQ_FAST_PLUS ; speed++)
|
||||
{
|
||||
if ((i2c_freq >= I2C_Charac[speed].freq_min) &&
|
||||
(i2c_freq <= I2C_Charac[speed].freq_max))
|
||||
{
|
||||
I2C_Compute_PRESC_SCLDEL_SDADEL(clock_src_freq, speed);
|
||||
idx = I2C_Compute_SCLL_SCLH(clock_src_freq, speed);
|
||||
|
||||
if (idx < I2C_VALID_TIMING_NBR)
|
||||
{
|
||||
ret = ((I2c_valid_timing[idx].presc & 0x0FU) << 28) | \
|
||||
((I2c_valid_timing[idx].tscldel & 0x0FU) << 20) | \
|
||||
((I2c_valid_timing[idx].tsdadel & 0x0FU) << 16) | \
|
||||
((I2c_valid_timing[idx].sclh & 0xFFU) << 8) | \
|
||||
((I2c_valid_timing[idx].scll & 0xFFU) << 0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Compute PRESC, SCLDEL and SDADEL.
|
||||
* @param clock_src_freq I2C source clock in HZ.
|
||||
* @param I2C_speed I2C frequency (index).
|
||||
* @retval None.
|
||||
*/
|
||||
static void I2C_Compute_PRESC_SCLDEL_SDADEL(uint32_t clock_src_freq, uint32_t I2C_speed)
|
||||
{
|
||||
uint32_t prev_presc = I2C_PRESC_MAX;
|
||||
uint32_t ti2cclk;
|
||||
int32_t tsdadel_min, tsdadel_max;
|
||||
int32_t tscldel_min;
|
||||
uint32_t presc, scldel, sdadel;
|
||||
uint32_t tafdel_min, tafdel_max;
|
||||
|
||||
ti2cclk = (SEC2NSEC + (clock_src_freq / 2U)) / clock_src_freq;
|
||||
|
||||
tafdel_min = I2C_ANALOG_FILTER_DELAY_MIN;
|
||||
tafdel_max = I2C_ANALOG_FILTER_DELAY_MAX;
|
||||
|
||||
/* tDNF = DNF x tI2CCLK
|
||||
tPRESC = (PRESC+1) x tI2CCLK
|
||||
SDADEL >= {tf +tHD;DAT(min) - tAF(min) - tDNF - [3 x tI2CCLK]} / {tPRESC}
|
||||
SDADEL <= {tVD;DAT(max) - tr - tAF(max) - tDNF- [4 x tI2CCLK]} / {tPRESC} */
|
||||
|
||||
tsdadel_min = (int32_t)I2C_Charac[I2C_speed].tfall + (int32_t)I2C_Charac[I2C_speed].hddat_min -
|
||||
(int32_t)tafdel_min - (int32_t)(((int32_t)I2C_Charac[I2C_speed].dnf + 3) * (int32_t)ti2cclk);
|
||||
|
||||
tsdadel_max = (int32_t)I2C_Charac[I2C_speed].vddat_max - (int32_t)I2C_Charac[I2C_speed].trise -
|
||||
(int32_t)tafdel_max - (int32_t)(((int32_t)I2C_Charac[I2C_speed].dnf + 4) * (int32_t)ti2cclk);
|
||||
|
||||
|
||||
/* {[tr+ tSU;DAT(min)] / [tPRESC]} - 1 <= SCLDEL */
|
||||
tscldel_min = (int32_t)I2C_Charac[I2C_speed].trise + (int32_t)I2C_Charac[I2C_speed].sudat_min;
|
||||
|
||||
if (tsdadel_min <= 0)
|
||||
{
|
||||
tsdadel_min = 0;
|
||||
}
|
||||
|
||||
if (tsdadel_max <= 0)
|
||||
{
|
||||
tsdadel_max = 0;
|
||||
}
|
||||
|
||||
for (presc = 0; presc < I2C_PRESC_MAX; presc++)
|
||||
{
|
||||
for (scldel = 0; scldel < I2C_SCLDEL_MAX; scldel++)
|
||||
{
|
||||
/* TSCLDEL = (SCLDEL+1) * (PRESC+1) * TI2CCLK */
|
||||
uint32_t tscldel = (scldel + 1U) * (presc + 1U) * ti2cclk;
|
||||
|
||||
if (tscldel >= (uint32_t)tscldel_min)
|
||||
{
|
||||
for (sdadel = 0; sdadel < I2C_SDADEL_MAX; sdadel++)
|
||||
{
|
||||
/* TSDADEL = SDADEL * (PRESC+1) * TI2CCLK */
|
||||
uint32_t tsdadel = (sdadel * (presc + 1U)) * ti2cclk;
|
||||
|
||||
if ((tsdadel >= (uint32_t)tsdadel_min) && (tsdadel <= (uint32_t)tsdadel_max))
|
||||
{
|
||||
if (presc != prev_presc)
|
||||
{
|
||||
I2c_valid_timing[I2c_valid_timing_nbr].presc = presc;
|
||||
I2c_valid_timing[I2c_valid_timing_nbr].tscldel = scldel;
|
||||
I2c_valid_timing[I2c_valid_timing_nbr].tsdadel = sdadel;
|
||||
prev_presc = presc;
|
||||
I2c_valid_timing_nbr ++;
|
||||
|
||||
if (I2c_valid_timing_nbr >= I2C_VALID_TIMING_NBR)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Calculate SCLL and SCLH and find best configuration.
|
||||
* @param clock_src_freq I2C source clock in HZ.
|
||||
* @param I2C_speed I2C frequency (index).
|
||||
* @retval config index (0 to I2C_VALID_TIMING_NBR], 0xFFFFFFFF for no valid config.
|
||||
*/
|
||||
static uint32_t I2C_Compute_SCLL_SCLH(uint32_t clock_src_freq, uint32_t I2C_speed)
|
||||
{
|
||||
uint32_t ret = 0xFFFFFFFFU;
|
||||
uint32_t ti2cclk;
|
||||
uint32_t ti2cspeed;
|
||||
uint32_t prev_error;
|
||||
uint32_t dnf_delay;
|
||||
uint32_t clk_min, clk_max;
|
||||
uint32_t scll, sclh;
|
||||
uint32_t tafdel_min;
|
||||
|
||||
ti2cclk = (SEC2NSEC + (clock_src_freq / 2U)) / clock_src_freq;
|
||||
ti2cspeed = (SEC2NSEC + (I2C_Charac[I2C_speed].freq / 2U)) / I2C_Charac[I2C_speed].freq;
|
||||
|
||||
tafdel_min = I2C_ANALOG_FILTER_DELAY_MIN;
|
||||
|
||||
/* tDNF = DNF x tI2CCLK */
|
||||
dnf_delay = I2C_Charac[I2C_speed].dnf * ti2cclk;
|
||||
|
||||
clk_max = SEC2NSEC / I2C_Charac[I2C_speed].freq_min;
|
||||
clk_min = SEC2NSEC / I2C_Charac[I2C_speed].freq_max;
|
||||
|
||||
prev_error = ti2cspeed;
|
||||
|
||||
for (uint32_t count = 0; count < I2c_valid_timing_nbr; count++)
|
||||
{
|
||||
/* tPRESC = (PRESC+1) x tI2CCLK*/
|
||||
uint32_t tpresc = (I2c_valid_timing[count].presc + 1U) * ti2cclk;
|
||||
|
||||
for (scll = 0; scll < I2C_SCLL_MAX; scll++)
|
||||
{
|
||||
/* tLOW(min) <= tAF(min) + tDNF + 2 x tI2CCLK + [(SCLL+1) x tPRESC ] */
|
||||
uint32_t tscl_l = tafdel_min + dnf_delay + (2U * ti2cclk) + ((scll + 1U) * tpresc);
|
||||
|
||||
|
||||
/* The I2CCLK period tI2CCLK must respect the following conditions:
|
||||
tI2CCLK < (tLOW - tfilters) / 4 and tI2CCLK < tHIGH */
|
||||
if ((tscl_l > I2C_Charac[I2C_speed].lscl_min) && (ti2cclk < ((tscl_l - tafdel_min - dnf_delay) / 4U)))
|
||||
{
|
||||
for (sclh = 0; sclh < I2C_SCLH_MAX; sclh++)
|
||||
{
|
||||
/* tHIGH(min) <= tAF(min) + tDNF + 2 x tI2CCLK + [(SCLH+1) x tPRESC] */
|
||||
uint32_t tscl_h = tafdel_min + dnf_delay + (2U * ti2cclk) + ((sclh + 1U) * tpresc);
|
||||
|
||||
/* tSCL = tf + tLOW + tr + tHIGH */
|
||||
uint32_t tscl = tscl_l + tscl_h + I2C_Charac[I2C_speed].trise + I2C_Charac[I2C_speed].tfall;
|
||||
|
||||
if ((tscl >= clk_min) && (tscl <= clk_max) && (tscl_h >= I2C_Charac[I2C_speed].hscl_min) && (ti2cclk < tscl_h))
|
||||
{
|
||||
int32_t error = (int32_t)tscl - (int32_t)ti2cspeed;
|
||||
|
||||
if (error < 0)
|
||||
{
|
||||
error = -error;
|
||||
}
|
||||
|
||||
/* look for the timings with the lowest clock error */
|
||||
if ((uint32_t)error < prev_error)
|
||||
{
|
||||
prev_error = (uint32_t)error;
|
||||
I2c_valid_timing[count].scll = scll;
|
||||
I2c_valid_timing[count].sclh = sclh;
|
||||
ret = count;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes I2C MSP.
|
||||
* @param hI2c I2C handler
|
||||
* @retval None
|
||||
*/
|
||||
static void I2C2_MspInit(I2C_HandleTypeDef *hI2c)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hI2c);
|
||||
|
||||
/*** Configure the GPIOs ***/
|
||||
/* Enable SCL GPIO clock */
|
||||
BUS_I2C2_SCL_GPIO_CLK_ENABLE();
|
||||
/* Enable SDA GPIO clock */
|
||||
BUS_I2C2_SDA_GPIO_CLK_ENABLE();
|
||||
|
||||
/* Configure I2C Tx as alternate function */
|
||||
gpio_init_structure.Pin = BUS_I2C2_SCL_PIN;
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_OD;
|
||||
gpio_init_structure.Pull = GPIO_NOPULL;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
gpio_init_structure.Alternate = BUS_I2C2_SCL_AF;
|
||||
HAL_GPIO_Init(BUS_I2C2_SCL_GPIO_PORT, &gpio_init_structure);
|
||||
|
||||
/* Configure I2C Rx as alternate function */
|
||||
gpio_init_structure.Pin = BUS_I2C2_SDA_PIN;
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_OD;
|
||||
gpio_init_structure.Pull = GPIO_NOPULL;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
gpio_init_structure.Alternate = BUS_I2C2_SDA_AF;
|
||||
HAL_GPIO_Init(BUS_I2C2_SDA_GPIO_PORT, &gpio_init_structure);
|
||||
|
||||
/*** Configure the I2C peripheral ***/
|
||||
/* Enable I2C clock */
|
||||
BUS_I2C2_CLK_ENABLE();
|
||||
|
||||
/* Force the I2C peripheral clock reset */
|
||||
BUS_I2C2_FORCE_RESET();
|
||||
|
||||
/* Release the I2C peripheral clock reset */
|
||||
BUS_I2C2_RELEASE_RESET();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes I2C MSP.
|
||||
* @param hI2c I2C handler
|
||||
* @retval None
|
||||
*/
|
||||
static void I2C2_MspDeInit(I2C_HandleTypeDef *hI2c)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hI2c);
|
||||
|
||||
/* Configure I2C Tx, Rx as alternate function */
|
||||
gpio_init_structure.Pin = BUS_I2C2_SCL_PIN;
|
||||
HAL_GPIO_DeInit(BUS_I2C2_SCL_GPIO_PORT, gpio_init_structure.Pin);
|
||||
gpio_init_structure.Pin = BUS_I2C2_SDA_PIN;
|
||||
HAL_GPIO_DeInit(BUS_I2C2_SDA_GPIO_PORT, gpio_init_structure.Pin);
|
||||
|
||||
/* Disable I2C clock */
|
||||
BUS_I2C2_CLK_DISABLE();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write a value in a register of the device through BUS.
|
||||
* @param DevAddr Device address on Bus.
|
||||
* @param Reg The target register address to write
|
||||
* @param MemAddSize Size of internal memory address
|
||||
* @param pData The target register value to be written
|
||||
* @param Length data length in bytes
|
||||
* @retval BSP status
|
||||
*/
|
||||
static int32_t I2C2_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
if (HAL_I2C_Mem_Write(&hbus_i2c2, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
|
||||
{
|
||||
return BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a register of the device through BUS
|
||||
* @param DevAddr Device address on BUS
|
||||
* @param Reg The target register address to read
|
||||
* @param MemAddSize Size of internal memory address
|
||||
* @param pData The target register value to be written
|
||||
* @param Length data length in bytes
|
||||
* @retval BSP status
|
||||
*/
|
||||
static int32_t I2C2_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
|
||||
{
|
||||
if (HAL_I2C_Mem_Read(&hbus_i2c2, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
|
||||
{
|
||||
return BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,139 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_bus.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains definitions for STM32H7B3I_EVAL LEDs,
|
||||
* push-buttons hardware resources.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_BUS_H
|
||||
#define STM32H7B3I_EVAL_BUS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#if defined(BSP_USE_CMSIS_OS)
|
||||
#include "cmsis_os.h"
|
||||
#endif
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_BUS
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Exported_Types BUS Exported Types
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
pI2C_CallbackTypeDef pMspI2cInitCb;
|
||||
pI2C_CallbackTypeDef pMspI2cDeInitCb;
|
||||
} BSP_I2C_Cb_t;
|
||||
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_BUS_Exported_Constants BUS Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/* Definition for I2C2 clock resources */
|
||||
#define BUS_I2C2 I2C2
|
||||
#define BUS_I2C2_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
|
||||
#define BUS_I2C2_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE()
|
||||
#define BUS_I2C2_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define BUS_I2C2_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOH_CLK_DISABLE()
|
||||
#define BUS_I2C2_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define BUS_I2C2_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOH_CLK_DISABLE()
|
||||
|
||||
#define BUS_I2C2_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
|
||||
#define BUS_I2C2_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
|
||||
|
||||
/* Definition for I2C2 Pins */
|
||||
#define BUS_I2C2_SCL_PIN GPIO_PIN_4
|
||||
#define BUS_I2C2_SDA_PIN GPIO_PIN_5
|
||||
#define BUS_I2C2_SCL_GPIO_PORT GPIOH
|
||||
#define BUS_I2C2_SDA_GPIO_PORT GPIOH
|
||||
#define BUS_I2C2_SCL_AF GPIO_AF4_I2C2
|
||||
#define BUS_I2C2_SDA_AF GPIO_AF4_I2C2
|
||||
|
||||
#ifndef BUS_I2C2_FREQUENCY
|
||||
#define BUS_I2C2_FREQUENCY 100000U /* Frequency of I2Cn = 100 KHz*/
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_BUS_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern I2C_HandleTypeDef hbus_i2c2;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_BUS_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_I2C2_Init(void);
|
||||
int32_t BSP_I2C2_DeInit(void);
|
||||
int32_t BSP_I2C2_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_Recv(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_Send(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
|
||||
int32_t BSP_I2C2_IsReady(uint16_t DevAddr, uint32_t Trials);
|
||||
int32_t BSP_GetTick(void);
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_I2C2_RegisterDefaultMspCallbacks(void);
|
||||
int32_t BSP_I2C2_RegisterMspCallbacks(BSP_I2C_Cb_t *Callback);
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
__weak HAL_StatusTypeDef MX_I2C2_Init(I2C_HandleTypeDef *hI2c, uint32_t timing);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_BUS_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,280 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_camera.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_camera.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_CAMERA_H
|
||||
#define STM32H7B3I_EVAL_CAMERA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
|
||||
#ifndef USE_CAMERA_SENSOR_OV5640
|
||||
#define USE_CAMERA_SENSOR_OV5640 1
|
||||
#endif
|
||||
|
||||
#ifndef USE_CAMERA_SENSOR_S5K5CAG
|
||||
#define USE_CAMERA_SENSOR_S5K5CAG 1
|
||||
#endif
|
||||
|
||||
#if (USE_CAMERA_SENSOR_OV5640 == 1)
|
||||
#include "../Components/ov5640/ov5640.h"
|
||||
#endif
|
||||
#if (USE_CAMERA_SENSOR_S5K5CAG == 1)
|
||||
#include "../Components/s5k5cag/s5k5cag.h"
|
||||
#endif
|
||||
#include "camera.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_CAMERA CAMERA
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_CAMERA_Exported_Types CAMERA Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Resolution;
|
||||
uint32_t PixelFormat;
|
||||
uint32_t LightMode;
|
||||
uint32_t ColorEffect;
|
||||
int32_t Brightness;
|
||||
int32_t Saturation;
|
||||
int32_t Contrast;
|
||||
int32_t HueDegree;
|
||||
uint32_t MirrorFlip;
|
||||
uint32_t Zoom;
|
||||
uint32_t NightMode;
|
||||
uint32_t IsMspCallbacksValid;
|
||||
} CAMERA_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Resolution;
|
||||
uint32_t LightMode;
|
||||
uint32_t ColorEffect;
|
||||
uint32_t Brightness;
|
||||
uint32_t Saturation;
|
||||
uint32_t Contrast;
|
||||
uint32_t HueDegree;
|
||||
uint32_t MirrorFlip;
|
||||
uint32_t Zoom;
|
||||
uint32_t NightMode;
|
||||
} CAMERA_Capabilities_t;
|
||||
|
||||
#if (USE_HAL_DCMI_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(DCMI_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(DCMI_HandleTypeDef *);
|
||||
} BSP_CAMERA_Cb_t;
|
||||
#endif /* (USE_HAL_DCMI_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_CAMERA_Exported_Constants CAMERA Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/* Camera instance number */
|
||||
#define CAMERA_INSTANCES_NBR 1U
|
||||
|
||||
#define CAMERA_MODE_CONTINUOUS DCMI_MODE_CONTINUOUS
|
||||
#define CAMERA_MODE_SNAPSHOT DCMI_MODE_SNAPSHOT
|
||||
|
||||
/* Camera resolutions */
|
||||
#define CAMERA_R160x120 0U /* QQVGA Resolution */
|
||||
#define CAMERA_R320x240 1U /* QVGA Resolution */
|
||||
#define CAMERA_R480x272 2U /* 480x272 Resolution */
|
||||
#define CAMERA_R640x480 3U /* VGA Resolution */
|
||||
#define CAMERA_R800x480 4U /* WVGA Resolution */
|
||||
|
||||
/* Camera Pixel Format */
|
||||
#define CAMERA_PF_RGB565 0U /* Pixel Format RGB565 */
|
||||
#define CAMERA_PF_RGB888 1U /* Pixel Format RGB888 */
|
||||
#define CAMERA_PF_YUV422 2U /* Pixel Format YUV422 */
|
||||
|
||||
/* Brightness */
|
||||
#define CAMERA_BRIGHTNESS_MIN -4
|
||||
#define CAMERA_BRIGHTNESS_MAX 4
|
||||
|
||||
/* Saturation */
|
||||
#define CAMERA_SATURATION_MIN -4
|
||||
#define CAMERA_SATURATION_MAX 4
|
||||
|
||||
/* Contrast */
|
||||
#define CAMERA_CONTRAST_MIN -4
|
||||
#define CAMERA_CONTRAST_MAX 4
|
||||
|
||||
/* Hue Control */
|
||||
#define CAMERA_HUEDEGREE_MIN -6
|
||||
#define CAMERA_HUEDEGREE_MAX 5
|
||||
|
||||
/* Mirror/Flip */
|
||||
#define CAMERA_MIRRORFLIP_NONE 0x00U /* Set camera normal mode */
|
||||
#define CAMERA_MIRRORFLIP_FLIP 0x01U /* Set camera flip config */
|
||||
#define CAMERA_MIRRORFLIP_MIRROR 0x02U /* Set camera mirror config */
|
||||
|
||||
/* Zoom */
|
||||
#define CAMERA_ZOOM_x8 0x00U /* Set zoom to x8 */
|
||||
#define CAMERA_ZOOM_x4 0x11U /* Set zoom to x4 */
|
||||
#define CAMERA_ZOOM_x2 0x22U /* Set zoom to x2 */
|
||||
#define CAMERA_ZOOM_x1 0x44U /* Set zoom to x1 */
|
||||
|
||||
/* Color Effect */
|
||||
#define CAMERA_COLOR_EFFECT_NONE 0x00U /* No effect */
|
||||
#define CAMERA_COLOR_EFFECT_BLUE 0x01U /* Blue effect */
|
||||
#define CAMERA_COLOR_EFFECT_RED 0x02U /* Red effect */
|
||||
#define CAMERA_COLOR_EFFECT_GREEN 0x04U /* Green effect */
|
||||
#define CAMERA_COLOR_EFFECT_BW 0x08U /* Black and White effect */
|
||||
#define CAMERA_COLOR_EFFECT_SEPIA 0x10U /* Sepia effect */
|
||||
#define CAMERA_COLOR_EFFECT_NEGATIVE 0x20U /* Negative effect */
|
||||
|
||||
/* Light Mode */
|
||||
#define CAMERA_LIGHT_AUTO 0x00U /* Light Mode Auto */
|
||||
#define CAMERA_LIGHT_SUNNY 0x01U /* Light Mode Sunny */
|
||||
#define CAMERA_LIGHT_OFFICE 0x02U /* Light Mode Office */
|
||||
#define CAMERA_LIGHT_HOME 0x04U /* Light Mode Home */
|
||||
#define CAMERA_LIGHT_CLOUDY 0x08U /* Light Mode Claudy */
|
||||
|
||||
/* Night Mode */
|
||||
#define CAMERA_NIGHT_MODE_SET 0x00U /* Disable night mode */
|
||||
#define CAMERA_NIGHT_MODE_RESET 0x01U /* Enable night mode */
|
||||
|
||||
#define CAMERA_IRQHandler DCMI_PSSI_IRQHandler
|
||||
#define CAMERA_DMA_IRQHandler DMA2_Stream3_IRQHandler
|
||||
|
||||
#if (USE_BSP_IO_CLASS > 0)
|
||||
#define XSDN_PIN IO_PIN_6
|
||||
#define RSTI_PIN IO_PIN_5
|
||||
#define CAM_PLUG_PIN IO_PIN_4
|
||||
#endif /* (USE_BSP_IO_CLASS == 1) */
|
||||
|
||||
#define CAMERA_OV5640_ADDRESS 0x78U
|
||||
#define CAMERA_S5K5CAG_ADDRESS 0x5AU
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_CAMERA_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern void *Camera_CompObj;
|
||||
extern DCMI_HandleTypeDef hcamera_dcmi;
|
||||
extern CAMERA_Ctx_t Camera_Ctx[];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_CAMERA_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_CAMERA_Init(uint32_t Instance, uint32_t Resolution, uint32_t PixelFormat);
|
||||
int32_t BSP_CAMERA_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_DCMI_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_CAMERA_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_RegisterMspCallbacks(uint32_t Instance, BSP_CAMERA_Cb_t *CallBacks);
|
||||
#endif /* (USE_HAL_DCMI_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_CAMERA_Start(uint32_t Instance, uint8_t *buff, uint32_t Mode);
|
||||
int32_t BSP_CAMERA_Stop(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_Suspend(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_Resume(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_GetCapabilities(uint32_t Instance, CAMERA_Capabilities_t *Capabilities);
|
||||
|
||||
int32_t BSP_CAMERA_SetResolution(uint32_t Instance, uint32_t Resolution);
|
||||
int32_t BSP_CAMERA_GetResolution(uint32_t Instance, uint32_t *Resolution);
|
||||
|
||||
int32_t BSP_CAMERA_SetPixelFormat(uint32_t Instance, uint32_t PixelFormat);
|
||||
int32_t BSP_CAMERA_GetPixelFormat(uint32_t Instance, uint32_t *PixelFormat);
|
||||
|
||||
int32_t BSP_CAMERA_SetLightMode(uint32_t Instance, uint32_t LightMode);
|
||||
int32_t BSP_CAMERA_GetLightMode(uint32_t Instance, uint32_t *LightMode);
|
||||
|
||||
int32_t BSP_CAMERA_SetColorEffect(uint32_t Instance, uint32_t ColorEffect);
|
||||
int32_t BSP_CAMERA_GetColorEffect(uint32_t Instance, uint32_t *ColorEffect);
|
||||
|
||||
int32_t BSP_CAMERA_SetBrightness(uint32_t Instance, int32_t Brightness);
|
||||
int32_t BSP_CAMERA_GetBrightness(uint32_t Instance, int32_t *Brightness);
|
||||
|
||||
int32_t BSP_CAMERA_SetSaturation(uint32_t Instance, int32_t Saturation);
|
||||
int32_t BSP_CAMERA_GetSaturation(uint32_t Instance, int32_t *Saturation);
|
||||
|
||||
int32_t BSP_CAMERA_SetContrast(uint32_t Instance, int32_t Contrast);
|
||||
int32_t BSP_CAMERA_GetContrast(uint32_t Instance, int32_t *Contrast);
|
||||
|
||||
int32_t BSP_CAMERA_SetHueDegree(uint32_t Instance, int32_t HueDegree);
|
||||
int32_t BSP_CAMERA_GetHueDegree(uint32_t Instance, int32_t *HueDegree);
|
||||
|
||||
int32_t BSP_CAMERA_SetMirrorFlip(uint32_t Instance, uint32_t MirrorFlip);
|
||||
int32_t BSP_CAMERA_GetMirrorFlip(uint32_t Instance, uint32_t *MirrorFlip);
|
||||
|
||||
int32_t BSP_CAMERA_SetZoom(uint32_t Instance, uint32_t Zoom);
|
||||
int32_t BSP_CAMERA_GetZoom(uint32_t Instance, uint32_t *Zoom);
|
||||
|
||||
int32_t BSP_CAMERA_EnableNightMode(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_DisableNightMode(uint32_t Instance);
|
||||
|
||||
int32_t BSP_CAMERA_HwReset(uint32_t Instance);
|
||||
int32_t BSP_CAMERA_PwrDown(uint32_t Instance);
|
||||
void BSP_CAMERA_LineEventCallback(uint32_t Instance);
|
||||
void BSP_CAMERA_FrameEventCallback(uint32_t Instance);
|
||||
void BSP_CAMERA_VsyncEventCallback(uint32_t Instance);
|
||||
void BSP_CAMERA_ErrorCallback(uint32_t Instance);
|
||||
|
||||
void BSP_CAMERA_IRQHandler(uint32_t Instance);
|
||||
void BSP_CAMERA_DMA_IRQHandler(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings (e.g. DMA stream)
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_CAMERA_H */
|
||||
@@ -0,0 +1,93 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_conf.h
|
||||
* @author MCD Application Team
|
||||
* @brief STM32H7B3I_EVAL board configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_CONF_H
|
||||
#define STM32H7B3I_EVAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
/* COM define */
|
||||
#define USE_COM_LOG 0U
|
||||
#define USE_BSP_COM_FEATURE 0U
|
||||
#define USE_DMA2D_TO_FILL_RGB_RECT 0U
|
||||
|
||||
/* POT define */
|
||||
#define USE_BSP_POT_FEATURE 0U
|
||||
|
||||
/* IO CLASS define */
|
||||
#define USE_BSP_IO_CLASS 1U
|
||||
|
||||
/* I2C BUS timing define */
|
||||
#define I2C_VALID_TIMING_NBR 128U
|
||||
|
||||
/* LCD defines */
|
||||
#define LCD_LAYER_0_ADDRESS 0xD0000000U
|
||||
#define LCD_LAYER_1_ADDRESS 0xD0200000U
|
||||
#define USE_DMA2D_TO_FILL_RGB_RECT 0U
|
||||
|
||||
/* Camera sensors defines */
|
||||
#define USE_CAMERA_SENSOR_OV5640 1U
|
||||
#define USE_CAMERA_SENSOR_S5K5CAG 1U
|
||||
|
||||
/* Audio codecs defines */
|
||||
#define USE_AUDIO_CODEC_CS42L51 1U
|
||||
|
||||
/* Default Audio IN internal buffer size */
|
||||
#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
|
||||
#define USE_BSP_CPU_CACHE_MAINTENANCE 1U
|
||||
|
||||
/* TS defines */
|
||||
#define USE_TS_GESTURE 1U
|
||||
#define USE_TS_MULTI_TOUCH 1U
|
||||
#define TS_TOUCH_NBR 2U
|
||||
|
||||
/* Default EEPROM max trials */
|
||||
#define EEPROM_MAX_TRIALS 3000U
|
||||
|
||||
/* IRQ priorities */
|
||||
#define BSP_SRAM_IT_PRIORITY 15U
|
||||
#define BSP_SDRAM_IT_PRIORITY 15U
|
||||
#define BSP_CAMERA_IT_PRIORITY 15U
|
||||
#define BSP_IOEXPANDER_IT_PRIORITY 15U
|
||||
#define BSP_BUTTON_USER_IT_PRIORITY 15U
|
||||
#define BSP_BUTTON_WAKEUP_IT_PRIORITY 15U
|
||||
#define BSP_BUTTON_TAMPER_IT_PRIORITY 15U
|
||||
#define BSP_AUDIO_OUT_IT_PRIORITY 14U
|
||||
#define BSP_AUDIO_IN_IT_PRIORITY 15U
|
||||
#define BSP_SD_IT_PRIORITY 14U
|
||||
#define BSP_SD_RX_IT_PRIORITY 14U
|
||||
#define BSP_SD_TX_IT_PRIORITY 15U
|
||||
#define BSP_TS_IT_PRIORITY 15U
|
||||
|
||||
#define BSP_JOY1_SEL_IT_PRIORITY 15U
|
||||
#define BSP_JOY1_DOWN_IT_PRIORITY 15U
|
||||
#define BSP_JOY1_LEFT_IT_PRIORITY 15U
|
||||
#define BSP_JOY1_RIGHT_IT_PRIORITY 15U
|
||||
#define BSP_JOY1_UP_IT_PRIORITY 15U
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_CONF_H */
|
||||
@@ -0,0 +1,537 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_eeprom.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of functions needed to manage an I2C M24LR64
|
||||
* EEPROM memory.
|
||||
@verbatim
|
||||
To be able to use this driver, the switch EE_M24LR64 must be defined
|
||||
in your toolchain compiler preprocessor
|
||||
|
||||
===================================================================
|
||||
Notes:
|
||||
- The I2C EEPROM memory (M24LR64) is available on separate daughter
|
||||
board ANT7-M24LR-A, which is not provided with the STM32H7B3I_EVAL
|
||||
board.
|
||||
To use this driver you have to connect the ANT7-M24LR-A to CN3
|
||||
connector of STM32H7B3I_EVAL board.
|
||||
===================================================================
|
||||
|
||||
It implements a high level communication layer for read and write
|
||||
from/to this memory. The needed STM32Fxxx hardware resources (I2C and
|
||||
GPIO) are defined in stm32h7b3i_eval_bus.h file, and the initialization is
|
||||
performed in BSP_EEPROM_Init().
|
||||
You can easily tailor this driver to any other development board,
|
||||
by just adapting the defines for hardware resources and
|
||||
BSP_EEPROM_Init() function.
|
||||
|
||||
+ Call the function BSP_EEPROM_WritePage() to write a single page of 4 bytes
|
||||
+ Call the function BSP_EEPROM_ReadPage() to read a single page of 4 bytes
|
||||
+ Call the function BSP_EEPROM_WriteBuffer() to write a buffer of N bytes to EEPROM
|
||||
+ Call the function BSP_EEPROM_ReadBuffer() to read a buffer of N bytes from EEPROM
|
||||
+ Call the function BSP_EEPROM_IsDeviceReady() to verify if device is ready. This function
|
||||
returns a BUSY error if the device is not ready after several trials.
|
||||
|
||||
@note Regarding the "Instance" parameter, needed for all functions, it is used to select
|
||||
an EEPROM instance. On the STM32H7B3I_EVAL board, there's one instance. Then, this
|
||||
parameter should be 0.
|
||||
|
||||
|
||||
|
||||
+-----------------------------------------------------------------+
|
||||
| Pin assignment for M24LR64 EEPROM |
|
||||
+---------------------------------------+-----------+-------------+
|
||||
| STM32Fxxx I2C Pins | EEPROM | Pin |
|
||||
+---------------------------------------+-----------+-------------+
|
||||
| . | E0(GND) | 1 (0V) |
|
||||
| . | AC0 | 2 |
|
||||
| . | AC1 | 3 |
|
||||
| . | VSS | 4 (0V) |
|
||||
| SDA | SDA | 5 |
|
||||
| SCL | SCL | 6 |
|
||||
| . | E1(GND) | 7 (0V) |
|
||||
| . | VDD | 8 (3.3V) |
|
||||
+---------------------------------------+-----------+-------------+
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_eeprom.h"
|
||||
#include "stm32h7b3i_eval_bus.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM EEPROM
|
||||
* @brief This file includes the I2C EEPROM driver of STM32H7B3I_EVAL board.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Exported_Variables EEPROM Exported Variables
|
||||
* @{
|
||||
*/
|
||||
void *Eeprom_CompObj = NULL;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Private_Variables EEPROM Private Variables
|
||||
* @{
|
||||
*/
|
||||
static M24LR64_EEPROM_Drv_t *Eeprom_Drv = NULL;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Private_Function_Prototypes EEPROM Private Functions Prototypes
|
||||
* @{
|
||||
*/
|
||||
static int32_t M24LR64_Probe(void);
|
||||
static int32_t EEPROM_WriteBytes(uint32_t Instance, uint8_t *pBuffer, uint32_t WriteAddr, uint32_t NbrOfBytes);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Exported_Functions EEPROM Exported Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initialize the I2C EEPROM.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @retval EEPROM state
|
||||
*/
|
||||
int32_t BSP_EEPROM_Init(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= EEPROM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (M24LR64_Probe() != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitialize the EEPROM.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @retval EEPROM state
|
||||
*/
|
||||
int32_t BSP_EEPROM_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= EEPROM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Eeprom_Drv->DeInit(Eeprom_CompObj) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write buffer of data to an I2C EEPROM page.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @param pBuffer Pointer to the buffer containing the data to be written
|
||||
* to the EEPROM.
|
||||
* @param PageNbr EEPROM's internal page number to write to.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_EEPROM_WritePage(uint32_t Instance, uint8_t *pBuffer, uint32_t PageNbr)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint16_t WriteAddr = (uint16_t)PageNbr * EEPROM_PAGESIZE;
|
||||
|
||||
if ((Instance >= EEPROM_INSTANCES_NBR) && (WriteAddr > EEPROM_MAX_SIZE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if (Eeprom_Drv->Write(Eeprom_CompObj, WriteAddr, pBuffer, EEPROM_PAGESIZE) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (BSP_EEPROM_IsDeviceReady(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read buffer of data from an I2C EEPROM page.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @param pBuffer Pointer to the buffer containing the data to be written
|
||||
* to the EEPROM.
|
||||
* @param PageNbr EEPROM's internal page number to read from.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_EEPROM_ReadPage(uint32_t Instance, uint8_t *pBuffer, uint32_t PageNbr)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint16_t ReadAddr = (uint16_t)PageNbr * EEPROM_PAGESIZE;
|
||||
|
||||
if ((Instance >= EEPROM_INSTANCES_NBR) && (ReadAddr > EEPROM_MAX_SIZE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Eeprom_Drv->Read(Eeprom_CompObj, ReadAddr, pBuffer, EEPROM_PAGESIZE) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Read a buffer of data from the EEPROM.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @param pBuffer Pointer to the buffer that receives the data read from
|
||||
* the EEPROM.
|
||||
* @param ReadAddr EEPROM's internal address to start reading from.
|
||||
* @param NbrOfBytes Number of bytes to be read from the EEPROM.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_EEPROM_ReadBuffer(uint32_t Instance, uint8_t *pBuffer, uint32_t ReadAddr, uint32_t NbrOfBytes)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= EEPROM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Eeprom_Drv->Read(Eeprom_CompObj, ReadAddr, pBuffer, NbrOfBytes) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes buffer of data to the I2C EEPROM.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @param pBuffer Pointer to the buffer containing the data to be written
|
||||
* to the EEPROM.
|
||||
* @param WriteAddr EEPROM's internal address to write to.
|
||||
* @param NbrOfBytes number of bytes to write to the EEPROM.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_EEPROM_WriteBuffer(uint32_t Instance, uint8_t *pBuffer, uint32_t WriteAddr, uint32_t NbrOfBytes)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint32_t numofpages, numofsingle, count;
|
||||
uint8_t *write_buffer;
|
||||
uint32_t write_addr, nbr_of_bytes;
|
||||
uint32_t i;
|
||||
|
||||
if (Instance >= EEPROM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
write_buffer = pBuffer;
|
||||
write_addr = WriteAddr;
|
||||
nbr_of_bytes = NbrOfBytes;
|
||||
count = EEPROM_PAGESIZE - (write_addr % EEPROM_PAGESIZE);
|
||||
numofpages = nbr_of_bytes / EEPROM_PAGESIZE;
|
||||
numofsingle = nbr_of_bytes % EEPROM_PAGESIZE;
|
||||
|
||||
/* If WriteAddr is EEPROM_PAGESIZE aligned */
|
||||
if ((write_addr % EEPROM_PAGESIZE) == 0U)
|
||||
{
|
||||
/* If nbr_of_bytes < EEPROM_PAGESIZE */
|
||||
if (numofpages == 0U)
|
||||
{
|
||||
/* Start writing data */
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, numofsingle) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
/* If nbr_of_bytes > EEPROM_PAGESIZE */
|
||||
else
|
||||
{
|
||||
i = 0;
|
||||
do
|
||||
{
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, EEPROM_PAGESIZE) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
write_addr += EEPROM_PAGESIZE;
|
||||
write_buffer += EEPROM_PAGESIZE;
|
||||
i++;
|
||||
}
|
||||
} while ((i < numofpages) && (ret == BSP_ERROR_NONE));
|
||||
|
||||
if (numofsingle != 0U)
|
||||
{
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, numofsingle) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/* If WriteAddr is not EEPROM_PAGESIZE aligned */
|
||||
else
|
||||
{
|
||||
/* If nbr_of_bytes < EEPROM_PAGESIZE */
|
||||
if (numofpages == 0U)
|
||||
{
|
||||
/* If the number of data to be written is more than the remaining space
|
||||
in the current page: */
|
||||
if (nbr_of_bytes > count)
|
||||
{
|
||||
/* Write the data contained in same page */
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, count) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}/* Write the remaining data in the following page */
|
||||
else if (EEPROM_WriteBytes(Instance, (uint8_t *)(write_buffer + count), (write_addr + count),
|
||||
nbr_of_bytes - count) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
else if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, numofsingle) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
/* If nbr_of_bytes > EEPROM_PAGESIZE */
|
||||
else
|
||||
{
|
||||
i = 0;
|
||||
nbr_of_bytes -= count;
|
||||
numofpages = nbr_of_bytes / EEPROM_PAGESIZE;
|
||||
numofsingle = nbr_of_bytes % EEPROM_PAGESIZE;
|
||||
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, count) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
write_addr += count;
|
||||
write_buffer += count;
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, EEPROM_PAGESIZE) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
write_addr += EEPROM_PAGESIZE;
|
||||
write_buffer += EEPROM_PAGESIZE;
|
||||
i++;
|
||||
}
|
||||
} while ((i < numofpages) && (ret == BSP_ERROR_NONE));
|
||||
|
||||
if (numofsingle != 0U)
|
||||
{
|
||||
if (EEPROM_WriteBytes(Instance, write_buffer, write_addr, numofsingle) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Wait for EEPROM Standby state.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @note This function allows to wait and check that EEPROM has finished the
|
||||
* last operation. It is mostly used after Write operation: after receiving
|
||||
* the buffer to be written, the EEPROM may need additional time to actually
|
||||
* perform the write operation. During this time, it doesn't answer to
|
||||
* I2C packets addressed to it. Once the write operation is complete
|
||||
* the EEPROM responds to its address.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_EEPROM_IsDeviceReady(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= EEPROM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Eeprom_Drv->IsReady(Eeprom_CompObj, EEPROM_MAX_TRIALS) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Private_Functions EEPROM Private Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Writes buffer of bytes to the I2C EEPROM.
|
||||
* @param Instance EEPROM instance. Could be only 0.
|
||||
* @param pBuffer Pointer to the buffer containing the data to be written
|
||||
* to the EEPROM.
|
||||
* @param WriteAddr EEPROM's internal address to write to.
|
||||
* @param NbrOfBytes number of bytes to write to the EEPROM.
|
||||
* @retval BSP status
|
||||
*/
|
||||
static int32_t EEPROM_WriteBytes(uint32_t Instance, uint8_t *pBuffer, uint32_t WriteAddr, uint32_t NbrOfBytes)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Eeprom_Drv->Write(Eeprom_CompObj, WriteAddr, pBuffer, NbrOfBytes) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (BSP_EEPROM_IsDeviceReady(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register Bus IOs
|
||||
* @note There are 2 different versions of M24LR64 (A01 & A02).
|
||||
* Then try to connect on 1st one (EEPROM_I2C_ADDRESS_A01)
|
||||
* and if problem, check the 2nd one (EEPROM_I2C_ADDRESS_A02)
|
||||
* @retval BSP status
|
||||
*/
|
||||
static int32_t M24LR64_Probe(void)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_UNKNOWN_COMPONENT;
|
||||
M24LR64_IO_t IOCtx;
|
||||
static M24LR64_Object_t M24LR64Obj;
|
||||
uint32_t i;
|
||||
uint8_t i2c_address[] = {EEPROM_I2C_ADDRESS_A01, EEPROM_I2C_ADDRESS_A02};
|
||||
|
||||
/* Configure the audio driver */
|
||||
IOCtx.Init = BSP_I2C2_Init;
|
||||
IOCtx.DeInit = BSP_I2C2_DeInit;
|
||||
IOCtx.Read = BSP_I2C2_ReadReg16;
|
||||
IOCtx.Write = BSP_I2C2_WriteReg16;
|
||||
IOCtx.IsReady = BSP_I2C2_IsReady;
|
||||
|
||||
for (i = 0U; i < 2U; i++)
|
||||
{
|
||||
IOCtx.Address = (uint16_t)i2c_address[i];
|
||||
|
||||
if (M24LR64_RegisterBusIO(&M24LR64Obj, &IOCtx) != M24LR64_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
Eeprom_Drv = &M24LR64_EEPROM_Driver;
|
||||
Eeprom_CompObj = &M24LR64Obj;
|
||||
if (Eeprom_Drv->Init(Eeprom_CompObj) != M24LR64_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else if (Eeprom_Drv->IsReady(Eeprom_CompObj, EEPROM_MAX_TRIALS) == BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_BUSY;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,107 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_eeprom.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for
|
||||
* the stm32h7b3i_eval_eeprom.c firmware driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_EEPROM_H
|
||||
#define STM32H7B3I_EVAL_EEPROM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
#include "../Components/m24lr64/m24lr64.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_EEPROM
|
||||
* @brief This file includes the I2C EEPROM driver of STM32H7B3I_EVAL board.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Exported_Types EEPROM Exported Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_EEPROM_Exported_Constants EEPROM Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define EEPROM_INSTANCES_NBR 1U
|
||||
|
||||
/* EEPROM hardware address and page size */
|
||||
#define EEPROM_PAGESIZE 4U
|
||||
#define EEPROM_MAX_SIZE 0x2000U
|
||||
|
||||
#define EEPROM_I2C_ADDRESS_A01 0xA0U
|
||||
#define EEPROM_I2C_ADDRESS_A02 0xA6U
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup STM32H7B3I_EVAL_EEPROM_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern void *Eeprom_CompObj;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_EEPROM_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_EEPROM_Init(uint32_t Instance);
|
||||
int32_t BSP_EEPROM_DeInit(uint32_t Instance);
|
||||
int32_t BSP_EEPROM_WritePage(uint32_t Instance, uint8_t *pBuffer, uint32_t PageNbr);
|
||||
int32_t BSP_EEPROM_ReadPage(uint32_t Instance, uint8_t *pBuffer, uint32_t PageNbr);
|
||||
int32_t BSP_EEPROM_WriteBuffer(uint32_t Instance, uint8_t *pBuffer, uint32_t WriteAddr, uint32_t NbrOfBytes);
|
||||
int32_t BSP_EEPROM_ReadBuffer(uint32_t Instance, uint8_t *pBuffer, uint32_t ReadAddr, uint32_t NbrOfBytes);
|
||||
int32_t BSP_EEPROM_IsDeviceReady(uint32_t Instance);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_EEPROM_H */
|
||||
@@ -0,0 +1,67 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_errno.h
|
||||
* @author MCD Application Team
|
||||
* @brief Error Code.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_ERRNO_H
|
||||
#define STM32H7B3I_EVAL_ERRNO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Common Error codes */
|
||||
#define BSP_ERROR_NONE 0
|
||||
#define BSP_ERROR_NO_INIT -1
|
||||
#define BSP_ERROR_WRONG_PARAM -2
|
||||
#define BSP_ERROR_BUSY -3
|
||||
#define BSP_ERROR_PERIPH_FAILURE -4
|
||||
#define BSP_ERROR_COMPONENT_FAILURE -5
|
||||
#define BSP_ERROR_UNKNOWN_FAILURE -6
|
||||
#define BSP_ERROR_UNKNOWN_COMPONENT -7
|
||||
#define BSP_ERROR_BUS_FAILURE -8
|
||||
#define BSP_ERROR_CLOCK_FAILURE -9
|
||||
#define BSP_ERROR_MSP_FAILURE -10
|
||||
#define BSP_ERROR_FEATURE_NOT_SUPPORTED -11
|
||||
|
||||
/* BSP OSPI error codes */
|
||||
#define BSP_ERROR_OSPI_SUSPENDED -20
|
||||
#define BSP_ERROR_OSPI_ASSIGN_FAILURE -24
|
||||
#define BSP_ERROR_OSPI_SETUP_FAILURE -25
|
||||
#define BSP_ERROR_OSPI_MMP_LOCK_FAILURE -26
|
||||
#define BSP_ERROR_OSPI_MMP_UNLOCK_FAILURE -27
|
||||
|
||||
/* BSP TS error code */
|
||||
#define BSP_ERROR_TS_TOUCH_NOT_DETECTED -30
|
||||
|
||||
/* BSP BUS error codes */
|
||||
#define BSP_ERROR_BUS_TRANSACTION_FAILURE -100
|
||||
#define BSP_ERROR_BUS_ARBITRATION_LOSS -101
|
||||
#define BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE -102
|
||||
#define BSP_ERROR_BUS_PROTOCOL_FAILURE -103
|
||||
|
||||
#define BSP_ERROR_BUS_MODE_FAULT -104
|
||||
#define BSP_ERROR_BUS_FRAME_ERROR -105
|
||||
#define BSP_ERROR_BUS_CRC_ERROR -106
|
||||
#define BSP_ERROR_BUS_DMA_FAILURE -107
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_ERRNO_H */
|
||||
@@ -0,0 +1,525 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_io.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of functions needed to manage the IO pins
|
||||
* on STM32H7B3I_EVAL board.
|
||||
@verbatim
|
||||
How To use this driver:
|
||||
-----------------------
|
||||
- This driver is used to drive the IO module of the STM32H7B3I_EVAL board.
|
||||
- The MFXSTM32L152 IO expander device component driver must be included with this
|
||||
driver in order to run the IO functionalities commanded by the IO expander (MFX)
|
||||
device mounted on the board.
|
||||
|
||||
Driver description:
|
||||
-------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the IO module using the BSP_IO_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
communication layer configuration to start the IO functionalities use.
|
||||
|
||||
+ IO functionalities use
|
||||
o The IO pin mode is configured when calling the function BSP_IO_ConfigPin(), you
|
||||
must specify the desired IO mode by choosing the "IO_ModeTypedef" parameter
|
||||
predefined value.
|
||||
o If an IO pin is used in interrupt mode, the function BSP_IO_ITGetStatus() is
|
||||
needed to get the interrupt status. To clear the IT pending bits, you should
|
||||
call the function BSP_IO_ITClear() with specifying the IO pending bit to clear.
|
||||
o The IT is handled using the corresponding external interrupt IRQ handler,
|
||||
the user IT callback treatment is implemented on the same external interrupt
|
||||
callback.
|
||||
o The IRQ_OUT pin (common for all functionalities: JOY, SD, LEDs, etc) can be
|
||||
configured using the function BSP_IO_ConfigIrqOutPin()
|
||||
o To get/set an IO pin combination state you can use the functions
|
||||
BSP_IO_ReadPin()/BSP_IO_WritePin() or the function BSP_IO_TogglePin() to toggle the pin
|
||||
state.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_io.h"
|
||||
#include "stm32h7b3i_eval_bus.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO IO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Exported_Variables IO Exported Variables
|
||||
* @{
|
||||
*/
|
||||
IOEXPANDER_Ctx_t IO_Ctx[IOEXPANDER_INSTANCES_NBR] = {0};
|
||||
MFXSTM32L152_Object_t Io_CompObj;
|
||||
EXTI_HandleTypeDef hio_exti;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Private_Variables IO Private Variables
|
||||
* @{
|
||||
*/
|
||||
static IO_Drv_t *Io_Drv = NULL;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Private_Functions_Prototypes IO Private Functions Prototypes
|
||||
* @{
|
||||
*/
|
||||
static int32_t MFXSTM32L152_Probe(uint32_t Instance);
|
||||
static void IO_EXTI_Callback(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Exported_Functions IO Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes and start the IOExpander component
|
||||
* @param Instance IOE instance
|
||||
* @param Function to be initialized. Could be IOEXPANDER_IO_MODE
|
||||
* @note IOEXPANDER_IDD_MODE and IOEXPANDER_TS_MODE are not used on STM32H7B3I_EVAL board
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IOEXPANDER_Init(uint32_t Instance, uint32_t Function)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || (Function != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (IO_Ctx[Instance].IsInitialized == 0U)
|
||||
{
|
||||
if (MFXSTM32L152_Probe(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
IO_Ctx[Instance].IsInitialized = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (IO_Ctx[Instance].IsInitialized == 1U)
|
||||
{
|
||||
Io_Drv = (IO_Drv_t *) &MFXSTM32L152_IO_Driver;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initializes the IOExpander component
|
||||
* @param Instance IOE instance
|
||||
* @note The de-init is common for all IOE functions
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IOEXPANDER_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= IOEXPANDER_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (IO_Ctx[Instance].IsInitialized == 1U)
|
||||
{
|
||||
/* DeInit MFX if no more Functions on are going */
|
||||
if (IO_Ctx[Instance].Functions == 0U)
|
||||
{
|
||||
if (Io_Drv->DeInit(&Io_CompObj) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IO_Ctx[Instance].IsInitialized = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the IO peripheral according to the specified parameters in the BSP_IO_Init_t.
|
||||
* @param Instance IOE instance
|
||||
* @param Init pointer to a BSP_IO_Init_t structure that contains
|
||||
* the configuration information for the specified IO pin.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IO_Init(uint32_t Instance, BSP_IO_Init_t *Init)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || (Init == NULL))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE)
|
||||
{
|
||||
if (BSP_IOEXPANDER_Init(Instance, IOEXPANDER_IO_MODE) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else if (Io_Drv->Start(&Io_CompObj, IO_PIN_ALL) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IO_Ctx[Instance].Functions |= IOEXPANDER_IO_MODE;
|
||||
}
|
||||
}
|
||||
|
||||
if (ret == BSP_ERROR_NONE)
|
||||
{
|
||||
/* If IT mode is selected, configures MFX low level interrupt */
|
||||
if (Init->Mode >= IO_MODE_IT_RISING_EDGE)
|
||||
{
|
||||
BSP_IOEXPANDER_ITConfig();
|
||||
}
|
||||
|
||||
/* Initializes IO pin */
|
||||
if (Io_Drv->Init(&Io_CompObj, Init) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the IO peripheral
|
||||
* @param Instance IOE instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IO_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= IOEXPANDER_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
IO_Ctx[Instance].Functions &= ~(IOEXPANDER_IO_MODE);
|
||||
ret = BSP_IOEXPANDER_DeInit(Instance);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets the selected pins IT status.
|
||||
* @param Instance IOE instance
|
||||
* @param IoPin Selected pins to check the status.
|
||||
* This parameter can be any combination of the IO pins.
|
||||
* @retval Pin IT status or BSP_ERROR_WRONG_PARAM
|
||||
*/
|
||||
int32_t BSP_IO_GetIT(uint32_t Instance, uint32_t IoPin)
|
||||
{
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
return BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
|
||||
/* Return the IO Pin IT status */
|
||||
return (Io_Drv->ITStatus(&Io_CompObj, IoPin));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear only one or a selection of IO IT pending bits.
|
||||
* @param Instance IOE instance
|
||||
* @param IO_Pins_To_Clear MFX IRQ status IO pin to clear (or combination of several IOs)
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IO_ClearIT(uint32_t Instance, uint32_t IO_Pins_To_Clear)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear only the selected list of IO IT pending bits */
|
||||
if (Io_Drv->ClearIT(&Io_CompObj, IO_Pins_To_Clear) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets the selected pins state.
|
||||
* @param Instance IOE instance
|
||||
* @param IoPin Selected pins to write.
|
||||
* This parameter can be any combination of the IO pins.
|
||||
* @param PinState New pins state to write
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_IO_WritePin(uint32_t Instance, uint32_t IoPin, uint32_t PinState)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Pin state */
|
||||
if (Io_Drv->WritePin(&Io_CompObj, IoPin, PinState) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets the selected pins current state.
|
||||
* @param Instance IOE instance
|
||||
* @param IoPin Selected pin to read.
|
||||
* @retval The current pins state or BSP_ERROR_WRONG_PARAM
|
||||
*/
|
||||
int32_t BSP_IO_ReadPin(uint32_t Instance, uint32_t IoPin)
|
||||
{
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
return BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
|
||||
return Io_Drv->ReadPin(&Io_CompObj, IoPin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Toggles the selected pins state.
|
||||
* @param Instance IOE instance
|
||||
* @param IoPin Selected pins to toggle.
|
||||
* This parameter can be any combination of the IO pins.
|
||||
* @note This function is only used to toggle one pin in the same time
|
||||
* @retval None
|
||||
*/
|
||||
int32_t BSP_IO_TogglePin(uint32_t Instance, uint32_t IoPin)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
int32_t pinState;
|
||||
|
||||
if ((Instance >= IOEXPANDER_INSTANCES_NBR) || ((IO_Ctx[Instance].Functions & IOEXPANDER_IO_MODE) != IOEXPANDER_IO_MODE))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Toggle the current pin state */
|
||||
pinState = Io_Drv->ReadPin(&Io_CompObj, IoPin);
|
||||
if (pinState < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (pinState == 0) /* Reset state */
|
||||
{
|
||||
if (Io_Drv->WritePin(&Io_CompObj, IoPin, IO_PIN_SET) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
else /* Set state */
|
||||
{
|
||||
if (Io_Drv->WritePin(&Io_CompObj, IoPin, IO_PIN_RESET) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures MFX low level interrupt.
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_IOEXPANDER_ITConfig(void)
|
||||
{
|
||||
static uint32_t mfx_io_it_enabled = 0U;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
if (mfx_io_it_enabled == 0U)
|
||||
{
|
||||
mfx_io_it_enabled = 1U;
|
||||
/* Enable the GPIO EXTI clock */
|
||||
MFX_IRQOUT_GPIO_CLK_ENABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
|
||||
gpio_init_structure.Pin = MFX_IRQOUT_PIN;
|
||||
gpio_init_structure.Pull = GPIO_NOPULL;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
|
||||
HAL_GPIO_Init(MFX_IRQOUT_GPIO_PORT, &gpio_init_structure);
|
||||
(void)HAL_EXTI_GetHandle(&hio_exti, IO_EXTI_LINE);
|
||||
(void)HAL_EXTI_RegisterCallback(&hio_exti, HAL_EXTI_COMMON_CB_ID, IO_EXTI_Callback);
|
||||
|
||||
/* Enable and set GPIO EXTI Interrupt to the lowest priority */
|
||||
HAL_NVIC_SetPriority((IRQn_Type)(MFX_IRQOUT_EXTI_IRQn), BSP_IOEXPANDER_IT_PRIORITY, 0x0F);
|
||||
HAL_NVIC_EnableIRQ((IRQn_Type)(MFX_IRQOUT_EXTI_IRQn));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles IO interrupt request.
|
||||
* @param Instance IO instance
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_IO_IRQHandler(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
HAL_EXTI_IRQHandler(&hio_exti);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP TS Callback.
|
||||
* @param Instance IO instance
|
||||
* @retval None.
|
||||
*/
|
||||
__weak void BSP_IO_Callback(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
/* This function should be implemented by the user application.
|
||||
It is called into this driver when an event on TS touch detection */
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Private_Functions IO Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Register Bus IOs if component ID is OK
|
||||
* @retval error status
|
||||
*/
|
||||
static int32_t MFXSTM32L152_Probe(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
MFXSTM32L152_IO_t IOCtx;
|
||||
uint32_t mfxstm32l152_id, i;
|
||||
uint8_t i2c_address[] = {IO_I2C_ADDRESS, IO_I2C_ADDRESS_2};
|
||||
|
||||
/* Configure the audio driver */
|
||||
IOCtx.Init = BSP_I2C2_Init;
|
||||
IOCtx.DeInit = BSP_I2C2_DeInit;
|
||||
IOCtx.ReadReg = BSP_I2C2_ReadReg;
|
||||
IOCtx.WriteReg = BSP_I2C2_WriteReg;
|
||||
IOCtx.GetTick = BSP_GetTick;
|
||||
|
||||
for (i = 0U; i < 2U; i++)
|
||||
{
|
||||
IOCtx.Address = (uint16_t)i2c_address[i];
|
||||
if (MFXSTM32L152_RegisterBusIO(&Io_CompObj, &IOCtx) != MFXSTM32L152_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
else if (MFXSTM32L152_ReadID(&Io_CompObj, &mfxstm32l152_id) != MFXSTM32L152_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((mfxstm32l152_id == MFXSTM32L152_ID) || (mfxstm32l152_id == MFXSTM32L152_ID_2))
|
||||
{
|
||||
if (MFXSTM32L152_Init(&Io_CompObj) != MFXSTM32L152_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_UNKNOWN_COMPONENT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IO EXTI touch detection callbacks.
|
||||
* @retval None
|
||||
*/
|
||||
static void IO_EXTI_Callback(void)
|
||||
{
|
||||
BSP_IO_Callback(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,204 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_io.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_io.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_IO_H
|
||||
#define STM32H7B3I_EVAL_IO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
/* Include common IO driver */
|
||||
#include "../Common/io.h"
|
||||
/* Include IO component driver */
|
||||
#include "../Components/mfxstm32l152/mfxstm32l152.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_IO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Exported_Types IO Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t IsInitialized; /* IO_IsInitialized */
|
||||
uint32_t Functions; /* Selected functions */
|
||||
} IOEXPANDER_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Pin; /*!< Specifies the IO pins to be configured */
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins */
|
||||
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins */
|
||||
} BSP_IO_Init_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_IO_Exported_Constants IO Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief IOExpander modes
|
||||
*/
|
||||
#define IOEXPANDER_IO_MODE 1U
|
||||
#define IOEXPANDER_IDD_MODE 2U /* Not used */
|
||||
#define IOEXPANDER_TS_MODE 4U /* Not used */
|
||||
|
||||
/**
|
||||
* @brief IOExpander instances number
|
||||
*/
|
||||
#define IOEXPANDER_INSTANCES_NBR 1U
|
||||
|
||||
/**
|
||||
* @brief IOExpander pins control
|
||||
*/
|
||||
#define IO_PIN_RESET 0U
|
||||
#define IO_PIN_SET 1U
|
||||
|
||||
/**
|
||||
* @brief IOExpander IOs definition
|
||||
*/
|
||||
#define IO_PIN_0 MFXSTM32L152_GPIO_PIN_0
|
||||
#define IO_PIN_1 MFXSTM32L152_GPIO_PIN_1
|
||||
#define IO_PIN_2 MFXSTM32L152_GPIO_PIN_2
|
||||
#define IO_PIN_3 MFXSTM32L152_GPIO_PIN_3
|
||||
#define IO_PIN_4 MFXSTM32L152_GPIO_PIN_4
|
||||
#define IO_PIN_5 MFXSTM32L152_GPIO_PIN_5
|
||||
#define IO_PIN_6 MFXSTM32L152_GPIO_PIN_6
|
||||
#define IO_PIN_7 MFXSTM32L152_GPIO_PIN_7
|
||||
#define IO_PIN_8 MFXSTM32L152_GPIO_PIN_8
|
||||
#define IO_PIN_9 MFXSTM32L152_GPIO_PIN_9
|
||||
#define IO_PIN_10 MFXSTM32L152_GPIO_PIN_10
|
||||
#define IO_PIN_11 MFXSTM32L152_GPIO_PIN_11
|
||||
#define IO_PIN_12 MFXSTM32L152_GPIO_PIN_12
|
||||
#define IO_PIN_13 MFXSTM32L152_GPIO_PIN_13
|
||||
#define IO_PIN_14 MFXSTM32L152_GPIO_PIN_14
|
||||
#define IO_PIN_15 MFXSTM32L152_GPIO_PIN_15
|
||||
#define IO_PIN_16 MFXSTM32L152_GPIO_PIN_16
|
||||
#define IO_PIN_17 MFXSTM32L152_GPIO_PIN_17
|
||||
#define IO_PIN_18 MFXSTM32L152_GPIO_PIN_18
|
||||
#define IO_PIN_19 MFXSTM32L152_GPIO_PIN_19
|
||||
#define IO_PIN_20 MFXSTM32L152_GPIO_PIN_20
|
||||
#define IO_PIN_21 MFXSTM32L152_GPIO_PIN_21
|
||||
#define IO_PIN_22 MFXSTM32L152_GPIO_PIN_22
|
||||
#define IO_PIN_23 MFXSTM32L152_GPIO_PIN_23
|
||||
#define IO_PIN_ALL MFXSTM32L152_GPIO_PINS_ALL
|
||||
|
||||
/**
|
||||
* @brief IOExpander IOs pull define
|
||||
*/
|
||||
#define IO_NOPULL MFXSTM32L152_GPIO_NOPULL
|
||||
#define IO_PULLUP MFXSTM32L152_GPIO_PULLUP
|
||||
#define IO_PULLDOWN MFXSTM32L152_GPIO_PULLDOWN
|
||||
|
||||
/**
|
||||
* @brief IOExpander IOs mode define
|
||||
*/
|
||||
#define IO_MODE_OFF MFXSTM32L152_GPIO_MODE_OFF
|
||||
#define IO_MODE_ANALOG MFXSTM32L152_GPIO_MODE_ANALOG
|
||||
#define IO_MODE_INPUT MFXSTM32L152_GPIO_MODE_INPUT
|
||||
#define IO_MODE_OUTPUT_OD MFXSTM32L152_GPIO_MODE_OUTPUT_OD
|
||||
#define IO_MODE_OUTPUT_PP MFXSTM32L152_GPIO_MODE_OUTPUT_PP
|
||||
#define IO_MODE_IT_RISING_EDGE MFXSTM32L152_GPIO_MODE_IT_RISING_EDGE
|
||||
#define IO_MODE_IT_FALLING_EDGE MFXSTM32L152_GPIO_MODE_IT_FALLING_EDGE
|
||||
#define IO_MODE_IT_LOW_LEVEL MFXSTM32L152_GPIO_MODE_IT_LOW_LEVEL
|
||||
#define IO_MODE_IT_HIGH_LEVEL MFXSTM32L152_GPIO_MODE_IT_HIGH_LEVEL
|
||||
|
||||
/**
|
||||
* @brief MFX_IRQOUT pin
|
||||
*/
|
||||
#define MFX_IRQOUT_PIN GPIO_PIN_8
|
||||
#define MFX_IRQOUT_GPIO_PORT GPIOI
|
||||
#define MFX_IRQOUT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
|
||||
#define MFX_IRQOUT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOI_CLK_DISABLE()
|
||||
#define MFX_IRQOUT_EXTI_IRQn EXTI9_5_IRQn
|
||||
#define IO_EXTI_LINE EXTI_LINE8
|
||||
|
||||
#define IO_I2C_ADDRESS 0x84U
|
||||
#define IO_I2C_ADDRESS_2 0x86U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_IO_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern IOEXPANDER_Ctx_t IO_Ctx[IOEXPANDER_INSTANCES_NBR];
|
||||
extern MFXSTM32L152_Object_t Io_CompObj;
|
||||
extern EXTI_HandleTypeDef hio_exti;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_IO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_IO_Init(uint32_t Instance, BSP_IO_Init_t *Init);
|
||||
int32_t BSP_IO_DeInit(uint32_t Instance);
|
||||
|
||||
int32_t BSP_IO_GetIT(uint32_t Instance, uint32_t IoPin);
|
||||
int32_t BSP_IO_ClearIT(uint32_t Instance, uint32_t IO_Pins_To_Clear);
|
||||
|
||||
int32_t BSP_IO_WritePin(uint32_t Instance, uint32_t IoPin, uint32_t PinState);
|
||||
int32_t BSP_IO_ReadPin(uint32_t Instance, uint32_t IoPin);
|
||||
int32_t BSP_IO_TogglePin(uint32_t Instance, uint32_t IoPin);
|
||||
|
||||
int32_t BSP_IOEXPANDER_Init(uint32_t Instance, uint32_t Function);
|
||||
int32_t BSP_IOEXPANDER_DeInit(uint32_t Instance);
|
||||
void BSP_IOEXPANDER_ITConfig(void);
|
||||
void BSP_IO_IRQHandler(uint32_t Instance);
|
||||
void BSP_IO_Callback(uint32_t Instance);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_IO_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,317 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_lcd.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_lcd.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_LCD_H
|
||||
#define STM32H7B3I_EVAL_LCD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
|
||||
#ifndef USE_LCD_CTRL_RK070ER9427
|
||||
#define USE_LCD_CTRL_RK070ER9427 1U
|
||||
#endif
|
||||
|
||||
#if (USE_LCD_CTRL_RK070ER9427 == 1)
|
||||
/* Include RK070ER9427 LCD Driver IC driver code */
|
||||
#include "../Components/rk070er9427/rk070er9427.h"
|
||||
#endif
|
||||
#include "lcd.h"
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LCD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LCD_Exported_Constants LCD Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define LCD_INSTANCES_NBR 1U
|
||||
|
||||
#define LCD_ORIENTATION_LANDSCAPE 0x01U /* Landscape orientation choice of LCD screen */
|
||||
|
||||
#define LCD_DEFAULT_WIDTH 800
|
||||
#define LCD_DEFAULT_HEIGHT 480
|
||||
|
||||
#define BSP_LCD_RELOAD_NONE 0U /* No reload executed */
|
||||
#define BSP_LCD_RELOAD_IMMEDIATE LTDC_RELOAD_IMMEDIATE /* Immediate Reload */
|
||||
#define BSP_LCD_RELOAD_VERTICAL_BLANKING LTDC_RELOAD_VERTICAL_BLANKING /* Vertical Blanking Reload */
|
||||
/**
|
||||
* @brief LCD special pins
|
||||
*/
|
||||
/* LCD reset pin */
|
||||
#define LCD_RESET_PIN GPIO_PIN_2
|
||||
#define LCD_RESET_PULL GPIO_NOPULL
|
||||
#define LCD_RESET_GPIO_PORT GPIOA
|
||||
#define LCD_RESET_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define LCD_RESET_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
|
||||
/* LCD display enable pin */
|
||||
#define LCD_DISP_EN_PIN GPIO_PIN_7
|
||||
#define LCD_DISP_EN_GPIO_PORT GPIOK
|
||||
#define LCD_DISP_EN_GPIO_CLK_ENABLE() __HAL_RCC_GPIOK_CLK_ENABLE()
|
||||
#define LCD_DISP_EN_GPIO_CLK_DISABLE() __HAL_RCC_GPIOK_CLK_DISABLE()
|
||||
|
||||
/* Back-light control pin */
|
||||
#define LCD_BL_CTRL_PIN GPIO_PIN_1
|
||||
#define LCD_BL_CTRL_GPIO_PORT GPIOA
|
||||
#define LCD_BL_CTRL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
||||
#define LCD_BL_CTRL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
|
||||
|
||||
/**
|
||||
* @brief Definition for LCD Timer used to control the Brightnes
|
||||
*/
|
||||
#define LCD_TIMx TIM2
|
||||
#define LCD_TIMx_CLK_ENABLE() __HAL_RCC_TIM2_CLK_ENABLE()
|
||||
#define LCD_TIMx_CLK_DISABLE() __HAL_RCC_TIM2_CLK_DISABLE()
|
||||
#define LCD_TIMx_CHANNEL TIM_CHANNEL_2
|
||||
#define LCD_TIMx_CHANNEL_AF GPIO_AF1_TIM2
|
||||
#define LCD_TIMX_PERIOD_VALUE ((uint32_t)200) /* Period Value */
|
||||
#define LCD_TIMX_PRESCALER_VALUE ((uint32_t)27) /* Prescaler Value */
|
||||
|
||||
/* RGB565 colors definitions */
|
||||
#define LCD_COLOR_RGB565_BLUE 0x001FU
|
||||
#define LCD_COLOR_RGB565_GREEN 0x07E0U
|
||||
#define LCD_COLOR_RGB565_RED 0xF800U
|
||||
#define LCD_COLOR_RGB565_CYAN 0x07FFU
|
||||
#define LCD_COLOR_RGB565_MAGENTA 0xF81FU
|
||||
#define LCD_COLOR_RGB565_YELLOW 0xFFE0U
|
||||
#define LCD_COLOR_RGB565_LIGHTBLUE 0x841FU
|
||||
#define LCD_COLOR_RGB565_LIGHTGREEN 0x87F0U
|
||||
#define LCD_COLOR_RGB565_LIGHTRED 0xFC10U
|
||||
#define LCD_COLOR_RGB565_LIGHTCYAN 0x87FFU
|
||||
#define LCD_COLOR_RGB565_LIGHTMAGENTA 0xFC1FU
|
||||
#define LCD_COLOR_RGB565_LIGHTYELLOW 0xFFF0U
|
||||
#define LCD_COLOR_RGB565_DARKBLUE 0x0010U
|
||||
#define LCD_COLOR_RGB565_DARKGREEN 0x0400U
|
||||
#define LCD_COLOR_RGB565_DARKRED 0x8000U
|
||||
#define LCD_COLOR_RGB565_DARKCYAN 0x0410U
|
||||
#define LCD_COLOR_RGB565_DARKMAGENTA 0x8010U
|
||||
#define LCD_COLOR_RGB565_DARKYELLOW 0x8400U
|
||||
#define LCD_COLOR_RGB565_WHITE 0xFFFFU
|
||||
#define LCD_COLOR_RGB565_LIGHTGRAY 0xD69AU
|
||||
#define LCD_COLOR_RGB565_GRAY 0x8410U
|
||||
#define LCD_COLOR_RGB565_DARKGRAY 0x4208U
|
||||
#define LCD_COLOR_RGB565_BLACK 0x0000U
|
||||
#define LCD_COLOR_RGB565_BROWN 0xA145U
|
||||
#define LCD_COLOR_RGB565_ORANGE 0xFD20U
|
||||
/* Definition of Official ST COLOR */
|
||||
#define LCD_COLOR_RGB565_ST_BLUE_DARK 0x0001U
|
||||
#define LCD_COLOR_RGB565_ST_BLUE 0x01EBU
|
||||
#define LCD_COLOR_RGB565_ST_BLUE_LIGHT 0x06A7U
|
||||
#define LCD_COLOR_RGB565_ST_GREEN_LIGHT 0x05ECU
|
||||
#define LCD_COLOR_RGB565_ST_GREEN_DARK 0x001CU
|
||||
#define LCD_COLOR_RGB565_ST_YELLOW 0x07F0U
|
||||
#define LCD_COLOR_RGB565_ST_BROWN 0x02C8U
|
||||
#define LCD_COLOR_RGB565_ST_PINK 0x0681U
|
||||
#define LCD_COLOR_RGB565_ST_PURPLE 0x02CDU
|
||||
#define LCD_COLOR_RGB565_ST_GRAY_DARK 0x0251U
|
||||
#define LCD_COLOR_RGB565_ST_GRAY 0x04BAU
|
||||
#define LCD_COLOR_RGB565_ST_GRAY_LIGHT 0x05E7U
|
||||
|
||||
/* ARGB8888 colors definitions */
|
||||
#define LCD_COLOR_ARGB8888_BLUE 0xFF0000FFUL
|
||||
#define LCD_COLOR_ARGB8888_GREEN 0xFF00FF00UL
|
||||
#define LCD_COLOR_ARGB8888_RED 0xFFFF0000UL
|
||||
#define LCD_COLOR_ARGB8888_CYAN 0xFF00FFFFUL
|
||||
#define LCD_COLOR_ARGB8888_MAGENTA 0xFFFF00FFUL
|
||||
#define LCD_COLOR_ARGB8888_YELLOW 0xFFFFFF00UL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTBLUE 0xFF8080FFUL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTGREEN 0xFF80FF80UL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTRED 0xFFFF8080UL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTCYAN 0xFF80FFFFUL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTMAGENTA 0xFFFF80FFUL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTYELLOW 0xFFFFFF80UL
|
||||
#define LCD_COLOR_ARGB8888_DARKBLUE 0xFF000080UL
|
||||
#define LCD_COLOR_ARGB8888_DARKGREEN 0xFF008000UL
|
||||
#define LCD_COLOR_ARGB8888_DARKRED 0xFF800000UL
|
||||
#define LCD_COLOR_ARGB8888_DARKCYAN 0xFF008080UL
|
||||
#define LCD_COLOR_ARGB8888_DARKMAGENTA 0xFF800080UL
|
||||
#define LCD_COLOR_ARGB8888_DARKYELLOW 0xFF808000UL
|
||||
#define LCD_COLOR_ARGB8888_WHITE 0xFFFFFFFFUL
|
||||
#define LCD_COLOR_ARGB8888_LIGHTGRAY 0xFFD3D3D3UL
|
||||
#define LCD_COLOR_ARGB8888_GRAY 0xFF808080UL
|
||||
#define LCD_COLOR_ARGB8888_DARKGRAY 0xFF404040UL
|
||||
#define LCD_COLOR_ARGB8888_BLACK 0xFF000000UL
|
||||
#define LCD_COLOR_ARGB8888_BROWN 0xFFA52A2AUL
|
||||
#define LCD_COLOR_ARGB8888_ORANGE 0xFFFFA500UL
|
||||
/* Definition of Official ST Colors */
|
||||
#define LCD_COLOR_ARGB8888_ST_BLUE_DARK 0xFF002052UL
|
||||
#define LCD_COLOR_ARGB8888_ST_BLUE 0xFF39A9DCUL
|
||||
#define LCD_COLOR_ARGB8888_ST_BLUE_LIGHT 0xFFD1E4F3UL
|
||||
#define LCD_COLOR_ARGB8888_ST_GREEN_LIGHT 0xFFBBCC01UL
|
||||
#define LCD_COLOR_ARGB8888_ST_GREEN_DARK 0xFF003D14UL
|
||||
#define LCD_COLOR_ARGB8888_ST_YELLOW 0xFFFFD300UL
|
||||
#define LCD_COLOR_ARGB8888_ST_BROWN 0xFF5C0915UL
|
||||
#define LCD_COLOR_ARGB8888_ST_PINK 0xFFD4007AUL
|
||||
#define LCD_COLOR_ARGB8888_ST_PURPLE 0xFF590D58UL
|
||||
#define LCD_COLOR_ARGB8888_ST_GRAY_DARK 0xFF4F5251UL
|
||||
#define LCD_COLOR_ARGB8888_ST_GRAY 0xFF90989EUL
|
||||
#define LCD_COLOR_ARGB8888_ST_GRAY_LIGHT 0xFFB9C4CAUL
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_LCD_Exported_Types Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t XSize;
|
||||
uint32_t YSize;
|
||||
uint32_t ActiveLayer;
|
||||
uint32_t PixelFormat;
|
||||
uint32_t BppFactor;
|
||||
uint32_t IsMspCallbacksValid;
|
||||
uint32_t ReloadEnable;
|
||||
uint32_t Brightness;
|
||||
} BSP_LCD_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t X0;
|
||||
uint32_t X1;
|
||||
uint32_t Y0;
|
||||
uint32_t Y1;
|
||||
uint32_t PixelFormat;
|
||||
uint32_t Address;
|
||||
} MX_LTDC_LayerConfig_t;
|
||||
|
||||
#define BSP_LCD_LayerConfig_t MX_LTDC_LayerConfig_t
|
||||
|
||||
|
||||
#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
pLTDC_CallbackTypeDef pMspLtdcInitCb;
|
||||
pLTDC_CallbackTypeDef pMspLtdcDeInitCb;
|
||||
} BSP_LCD_Cb_t;
|
||||
#endif /*(USE_HAL_LTDC_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LCD_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern DMA2D_HandleTypeDef hlcd_dma2d;
|
||||
extern LTDC_HandleTypeDef hlcd_ltdc;
|
||||
extern BSP_LCD_Ctx_t Lcd_Ctx[LCD_INSTANCES_NBR];
|
||||
extern const LCD_UTILS_Drv_t LCD_Driver;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_LCD_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization APIs */
|
||||
int32_t BSP_LCD_Init(uint32_t Instance, uint32_t Orientation);
|
||||
int32_t BSP_LCD_InitEx(uint32_t Instance, uint32_t Orientation, uint32_t PixelFormat, uint32_t Width, uint32_t Height);
|
||||
int32_t BSP_LCD_DeInit(uint32_t Instance);
|
||||
|
||||
/* Register Callbacks APIs */
|
||||
#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_LCD_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_LCD_RegisterMspCallbacks(uint32_t Instance, BSP_LCD_Cb_t *CallBacks);
|
||||
#endif /*(USE_HAL_LTDC_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/* LCD specific APIs: Layer control & LCD HW reset */
|
||||
int32_t BSP_LCD_Relaod(uint32_t Instance, uint32_t ReloadType);
|
||||
int32_t BSP_LCD_ConfigLayer(uint32_t Instance, uint32_t LayerIndex, BSP_LCD_LayerConfig_t *Config);
|
||||
int32_t BSP_LCD_SetLayerVisible(uint32_t Instance, uint32_t LayerIndex, FunctionalState State);
|
||||
int32_t BSP_LCD_SetTransparency(uint32_t Instance, uint32_t LayerIndex, uint8_t Transparency);
|
||||
int32_t BSP_LCD_SetLayerAddress(uint32_t Instance, uint32_t LayerIndex, uint32_t Address);
|
||||
int32_t BSP_LCD_SetLayerWindow(uint32_t Instance, uint16_t LayerIndex, uint16_t Xpos, uint16_t Ypos, uint16_t Width,
|
||||
uint16_t Height);
|
||||
int32_t BSP_LCD_SetColorKeying(uint32_t Instance, uint32_t LayerIndex, uint32_t Color);
|
||||
int32_t BSP_LCD_ResetColorKeying(uint32_t Instance, uint32_t LayerIndex);
|
||||
void BSP_LCD_Reset(uint32_t Instance);
|
||||
|
||||
/* LCD generic APIs: Display control */
|
||||
int32_t BSP_LCD_DisplayOn(uint32_t Instance);
|
||||
int32_t BSP_LCD_DisplayOff(uint32_t Instance);
|
||||
int32_t BSP_LCD_SetBrightness(uint32_t Instance, uint32_t Brightness);
|
||||
int32_t BSP_LCD_GetBrightness(uint32_t Instance, uint32_t *Brightness);
|
||||
int32_t BSP_LCD_GetXSize(uint32_t Instance, uint32_t *XSize);
|
||||
int32_t BSP_LCD_GetYSize(uint32_t Instance, uint32_t *YSize);
|
||||
|
||||
/* LCD generic APIs: Draw operations. This list of APIs is required for
|
||||
lcd gfx utilities */
|
||||
int32_t BSP_LCD_SetActiveLayer(uint32_t Instance, uint32_t LayerIndex);
|
||||
int32_t BSP_LCD_GetPixelFormat(uint32_t Instance, uint32_t *PixelFormat);
|
||||
int32_t BSP_LCD_DrawBitmap(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint8_t *pBmp);
|
||||
int32_t BSP_LCD_DrawHLine(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
|
||||
int32_t BSP_LCD_DrawVLine(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
|
||||
int32_t BSP_LCD_FillRGBRect(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint8_t *pData, uint32_t Width,
|
||||
uint32_t Height);
|
||||
int32_t BSP_LCD_FillRect(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Width, uint32_t Height,
|
||||
uint32_t Color);
|
||||
int32_t BSP_LCD_ReadPixel(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t *Color);
|
||||
int32_t BSP_LCD_WritePixel(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Color);
|
||||
|
||||
/* LCD MX APIs */
|
||||
HAL_StatusTypeDef MX_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, uint32_t LayerIndex, MX_LTDC_LayerConfig_t *Config);
|
||||
HAL_StatusTypeDef MX_LTDC_ClockConfig(LTDC_HandleTypeDef *hltdc);
|
||||
HAL_StatusTypeDef MX_LTDC_Init(LTDC_HandleTypeDef *hltdc, uint32_t Width, uint32_t Height);
|
||||
HAL_StatusTypeDef MX_LTDC_ClockConfig2(LTDC_HandleTypeDef *hltdc);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants --------------------------------------------------------*/
|
||||
/** @defgroup STM32H7B3I_EVAL_LCD_Private_Constants Private Constants
|
||||
* @{
|
||||
*/
|
||||
/* Legacy defines */
|
||||
#define LCD_ORIENTATION_PORTRAIT 0x00U /* Portrait orientation choice of LCD screen */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_LCD_H */
|
||||
@@ -0,0 +1,680 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_nor.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes a standard driver for the MT28EW128ABA1LPC-0SIT NOR flash memory
|
||||
* device mounted on STM32H7B3I_EVAL boards.
|
||||
@verbatim
|
||||
How To use this driver:
|
||||
-----------------------
|
||||
- This driver is used to drive the MT28EW128ABA1LPC-0SIT NOR flash external memory mounted
|
||||
on STM32H7B3I_EVAL board.
|
||||
- This driver does not need a specific component driver for the NOR device
|
||||
to be included with.
|
||||
|
||||
Driver description:
|
||||
------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the NOR external memory using the BSP_NOR_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
FMC controller configuration to interface with the external NOR memory.
|
||||
|
||||
+ NOR flash operations
|
||||
o NOR external memory can be accessed with read/write operations once it is
|
||||
initialized.
|
||||
Read/write operation can be performed with AHB access using the functions
|
||||
BSP_NOR_ReadData()/BSP_NOR_WriteData(). The BSP_NOR_WriteData() performs write operation
|
||||
of an amount of data by unit (halfword). You can also perform a program data
|
||||
operation of an amount of data using the function BSP_NOR_ProgramData().
|
||||
o The function BSP_NOR_Read_ID() returns the chip IDs stored in the structure
|
||||
"NOR_IDTypeDef". (see the NOR IDs in the memory data sheet)
|
||||
o Perform erase block operation using the function BSP_NOR_Erase_Block() and by
|
||||
specifying the block address. You can perform an erase operation of the whole
|
||||
chip by calling the function BSP_NOR_Erase_Chip().
|
||||
o After other operations, the function BSP_NOR_ReturnToReadMode() allows the NOR
|
||||
flash to return to read mode to perform read operations on it.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_nor.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR NOR
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Exported_Variables NOR Exported Variables
|
||||
* @{
|
||||
*/
|
||||
NOR_HandleTypeDef hnor;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Private_Variables NOR Private Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
static uint32_t IsMspCallbacksValid = 0;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Private_Functions_Prototypes NOR Private Functions Prototypes
|
||||
* @{
|
||||
*/
|
||||
static void NOR_MspInit(NOR_HandleTypeDef *hNor);
|
||||
static void NOR_MspDeInit(NOR_HandleTypeDef *hNor);
|
||||
static void NOR_MspWait(NOR_HandleTypeDef *hNor, uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Exported_Functions NOR Exported Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_Init(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 0)
|
||||
/* Msp NOR initialization */
|
||||
NOR_MspInit(&hnor);
|
||||
#else
|
||||
/* Register the NOR MSP Callbacks */
|
||||
if (IsMspCallbacksValid == 0UL)
|
||||
{
|
||||
if (BSP_NOR_RegisterDefaultMspCallbacks(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
if (ret == BSP_ERROR_NONE)
|
||||
{
|
||||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
|
||||
/* __weak function can be rewritten by the application */
|
||||
if (MX_NOR_Init(&hnor) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* NOR device de-initialization */
|
||||
hnor.Instance = FMC_NORSRAM_DEVICE;
|
||||
hnor.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
||||
|
||||
if (HAL_NOR_DeInit(&hnor) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 0)
|
||||
/* NOR controller de-initialization */
|
||||
NOR_MspDeInit(&hnor);
|
||||
#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS == 0) */
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the NOR periperal.
|
||||
* @param hNor NOR handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
__weak HAL_StatusTypeDef MX_NOR_Init(NOR_HandleTypeDef *hNor)
|
||||
{
|
||||
static FMC_NORSRAM_TimingTypeDef Timing;
|
||||
|
||||
hNor->Instance = FMC_NORSRAM_DEVICE;
|
||||
hNor->Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
||||
|
||||
/* NOR device configuration */
|
||||
hNor->Init.NSBank = FMC_NORSRAM_BANK1;
|
||||
hNor->Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
|
||||
hNor->Init.MemoryType = FMC_MEMORY_TYPE_NOR;
|
||||
hNor->Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||||
hNor->Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
|
||||
hNor->Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
|
||||
hNor->Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
|
||||
hNor->Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
|
||||
hNor->Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
|
||||
hNor->Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
|
||||
hNor->Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||||
hNor->Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
|
||||
hNor->Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
|
||||
hNor->Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
|
||||
hNor->Init.PageSize = FMC_PAGE_SIZE_NONE;
|
||||
|
||||
/* Timing configuration derived from system clock (up to 280Mhz)
|
||||
for 93,33Mhz as NOR clock frequency */
|
||||
Timing.AddressSetupTime = 4;
|
||||
Timing.AddressHoldTime = 3;
|
||||
Timing.DataSetupTime = 20;
|
||||
Timing.BusTurnAroundDuration = 1;
|
||||
Timing.CLKDivision = 3;
|
||||
Timing.DataLatency = 2;
|
||||
Timing.AccessMode = FMC_ACCESS_MODE_B;
|
||||
|
||||
/* NOR controller initialization */
|
||||
if (HAL_NOR_Init(hNor, &Timing, &Timing) != HAL_OK)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Default BSP NOR Msp Callbacks
|
||||
* @param Instance NOR instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_RegisterDefaultMspCallbacks(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
__HAL_NOR_RESET_HANDLE_STATE(&hnor);
|
||||
|
||||
/* Register default MspInit/MspDeInit Callbacks */
|
||||
if (HAL_NOR_RegisterCallback(&hnor, HAL_NOR_MSP_INIT_CB_ID, NOR_MspInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_NOR_RegisterCallback(&hnor, HAL_NOR_MSP_DEINIT_CB_ID, NOR_MspDeInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1UL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP NOR Msp Callback registering
|
||||
* @param Instance NOR instance
|
||||
* @param Callbacks pointer to MspInit/MspDeInit callback functions
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_RegisterMspCallbacks(uint32_t Instance, BSP_NOR_Cb_t *Callbacks)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
__HAL_NOR_RESET_HANDLE_STATE(&hnor);
|
||||
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_NOR_RegisterCallback(&hnor, HAL_NOR_MSP_INIT_CB_ID, Callbacks->pMspInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_NOR_RegisterCallback(&hnor, HAL_NOR_MSP_DEINIT_CB_ID, Callbacks->pMspDeInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1UL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @brief Reads an amount of data from the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @param uwStartAddress Read start address
|
||||
* @param pData Pointer to data to be read
|
||||
* @param uwDataSize Size of data to read
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_ReadData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if (HAL_NOR_ReadBuffer(&hnor, NOR_DEVICE_ADDR + uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the NOR memory to read mode.
|
||||
* @param Instance NOR Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_ReturnToReadMode(uint32_t Instance)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if (HAL_NOR_ReturnToReadMode(&hnor) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes an amount of data to the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @param uwStartAddress Write start address
|
||||
* @param pData Pointer to data to be written
|
||||
* @param uwDataSize Size of data to write
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_WriteData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint32_t index = uwDataSize;
|
||||
uint32_t write_addr;
|
||||
uint16_t *write_data;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
write_data = pData;
|
||||
write_addr = uwStartAddress;
|
||||
while ((index > 0UL) && (ret == BSP_ERROR_NONE))
|
||||
{
|
||||
/* Write data to NOR */
|
||||
if (HAL_NOR_Program(&hnor, (uint32_t *)(NOR_DEVICE_ADDR + write_addr), write_data) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* NOR BSP Wait for Ready/Busy signal */
|
||||
NOR_MspWait(&hnor, PROGRAM_TIMEOUT);
|
||||
|
||||
/* Read NOR device status */
|
||||
if (HAL_NOR_GetStatus(&hnor, NOR_DEVICE_ADDR, PROGRAM_TIMEOUT) != HAL_NOR_STATUS_SUCCESS)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the counters */
|
||||
index--;
|
||||
write_addr += 2UL;
|
||||
write_data++;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Programs an amount of data to the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @param uwStartAddress Write start address
|
||||
* @param pData Pointer to data to be written
|
||||
* @param uwDataSize Size of data to write
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_ProgramData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}/* Send NOR program buffer operation */
|
||||
else if (HAL_NOR_ProgramBuffer(&hnor, uwStartAddress, pData, uwDataSize) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* NOR BSP Wait for Ready/Busy signal */
|
||||
NOR_MspWait(&hnor, PROGRAM_TIMEOUT);
|
||||
|
||||
/* Return the NOR memory status */
|
||||
if (HAL_NOR_GetStatus(&hnor, NOR_DEVICE_ADDR, PROGRAM_TIMEOUT) != HAL_NOR_STATUS_SUCCESS)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erases the specified block of the NOR device.
|
||||
* @param Instance NOR Instance
|
||||
* @param BlockAddress Block address to erase
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_EraseBlock(uint32_t Instance, uint32_t BlockAddress)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}/* Send NOR erase block operation */
|
||||
else if (HAL_NOR_Erase_Block(&hnor, BlockAddress, NOR_DEVICE_ADDR) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* NOR BSP Wait for Ready/Busy signal */
|
||||
NOR_MspWait(&hnor, PROGRAM_TIMEOUT);
|
||||
|
||||
/* Return the NOR memory status */
|
||||
if (HAL_NOR_GetStatus(&hnor, NOR_DEVICE_ADDR, BLOCKERASE_TIMEOUT) != HAL_NOR_STATUS_SUCCESS)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Erases the entire NOR chip.
|
||||
* @param Instance NOR Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_EraseChip(uint32_t Instance)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}/* Send NOR Erase chip operation */
|
||||
else if (HAL_NOR_Erase_Chip(&hnor, NOR_DEVICE_ADDR) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* NOR BSP Wait for Ready/Busy signal */
|
||||
NOR_MspWait(&hnor, PROGRAM_TIMEOUT);
|
||||
|
||||
/* Return the NOR memory status */
|
||||
if (HAL_NOR_GetStatus(&hnor, NOR_DEVICE_ADDR, CHIPERASE_TIMEOUT) != HAL_NOR_STATUS_SUCCESS)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads NOR flash IDs.
|
||||
* @param Instance NOR Instance
|
||||
* @param pNOR_ID Pointer to NOR ID structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_NOR_ReadID(uint32_t Instance, NOR_IDTypeDef *pNOR_ID)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= NOR_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if (HAL_NOR_Read_ID(&hnor, pNOR_ID) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Private_Functions NOR Private Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes the NOR MSP.
|
||||
* @param hNor NOR handle
|
||||
* @retval None
|
||||
*/
|
||||
static void NOR_MspInit(NOR_HandleTypeDef *hNor)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hNor);
|
||||
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Enable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
|
||||
/* Common GPIO configuration */
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_structure.Pull = GPIO_PULLUP;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
|
||||
/* GPIOC configuration */
|
||||
gpio_init_structure.Alternate = GPIO_AF9_FMC;
|
||||
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
|
||||
HAL_GPIO_Init(GPIOC, &gpio_init_structure);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Alternate = GPIO_AF12_FMC;
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | \
|
||||
GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
|
||||
GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOE, &gpio_init_structure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOF, &gpio_init_structure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5;
|
||||
HAL_GPIO_Init(GPIOG, &gpio_init_structure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes NOR MSP.
|
||||
* @param hNor NOR handle
|
||||
* @retval None
|
||||
*/
|
||||
static void NOR_MspDeInit(NOR_HandleTypeDef *hNor)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hNor);
|
||||
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* GPIOC configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
|
||||
HAL_GPIO_DeInit(GPIOC, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | \
|
||||
GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | \
|
||||
GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOD, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOE, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOF, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5;
|
||||
HAL_GPIO_DeInit(GPIOG, gpio_init_structure.Pin);
|
||||
|
||||
/* Disable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_DISABLE();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief NOR BSP Wait for Ready/Busy signal.
|
||||
* @param hNor Pointer to NOR handle
|
||||
* @param Timeout Timeout duration
|
||||
* @retval None
|
||||
*/
|
||||
static void NOR_MspWait(NOR_HandleTypeDef *hNor, uint32_t Timeout)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hNor);
|
||||
|
||||
uint32_t timeout = Timeout;
|
||||
|
||||
/* Polling on Ready/Busy signal */
|
||||
while ((HAL_GPIO_ReadPin(NOR_READY_BUSY_GPIO, NOR_READY_BUSY_PIN) != NOR_BUSY_STATE) && (timeout > 0U))
|
||||
{
|
||||
timeout--;
|
||||
}
|
||||
|
||||
timeout = Timeout;
|
||||
|
||||
/* Polling on Ready/Busy signal */
|
||||
while ((HAL_GPIO_ReadPin(NOR_READY_BUSY_GPIO, NOR_READY_BUSY_PIN) != NOR_READY_STATE) && (timeout > 0U))
|
||||
{
|
||||
timeout--;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,131 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_nor.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* thestm32h7b3i_eval_nor.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_NOR_H
|
||||
#define STM32H7B3I_EVAL_NOR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_NOR
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Exported_Types NOR Exported Types
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(NOR_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(NOR_HandleTypeDef *);
|
||||
} BSP_NOR_Cb_t;
|
||||
#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Exported_Constants NOR Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define NOR_INSTANCES_NBR 1U
|
||||
|
||||
#define NOR_DEVICE_ADDR 0x60000000U
|
||||
#define NOR_DEVICE_SIZE 0x4000000U
|
||||
|
||||
/* NOR operations Timeout definitions */
|
||||
#define BLOCKERASE_TIMEOUT 0x00A00000U /* NOR block erase timeout */
|
||||
#define CHIPERASE_TIMEOUT 0x30000000U /* NOR chip erase timeout */
|
||||
#define PROGRAM_TIMEOUT 0x00004400U /* NOR program timeout */
|
||||
|
||||
/* NOR Ready/Busy signal GPIO definitions */
|
||||
#define NOR_READY_BUSY_PIN GPIO_PIN_6
|
||||
#define NOR_READY_BUSY_GPIO GPIOD
|
||||
#define NOR_READY_STATE GPIO_PIN_SET
|
||||
#define NOR_BUSY_STATE GPIO_PIN_RESET
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_NOR_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern NOR_HandleTypeDef hnor;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_NOR_Exported_Functions NOR Exported Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_NOR_Init(uint32_t Instance);
|
||||
int32_t BSP_NOR_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_NOR_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_NOR_RegisterMspCallbacks(uint32_t Instance, BSP_NOR_Cb_t *Callbacks);
|
||||
#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_NOR_ReadData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
|
||||
int32_t BSP_NOR_WriteData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
|
||||
int32_t BSP_NOR_ProgramData(uint32_t Instance, uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
|
||||
int32_t BSP_NOR_EraseBlock(uint32_t Instance, uint32_t BlockAddress);
|
||||
int32_t BSP_NOR_EraseChip(uint32_t Instance);
|
||||
int32_t BSP_NOR_ReadID(uint32_t Instance, NOR_IDTypeDef *pNOR_ID);
|
||||
int32_t BSP_NOR_ReturnToReadMode(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_NOR_Init(NOR_HandleTypeDef *hNor);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_NOR_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,244 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_ospi.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_ospi.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_OSPI_H
|
||||
#define STM32H7B3I_EVAL_OSPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
#include "../Components/mx25lm51245g/mx25lm51245g.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_OSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Types OSPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
OSPI_ACCESS_NONE = 0, /*!< Instance not initialized, */
|
||||
OSPI_ACCESS_INDIRECT, /*!< Instance use indirect mode access */
|
||||
OSPI_ACCESS_MMP /*!< Instance use Memory Mapped Mode read */
|
||||
} OSPI_Access_t;
|
||||
|
||||
#if (USE_HAL_OSPI_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
pOSPI_CallbackTypeDef pMspInitCb;
|
||||
pOSPI_CallbackTypeDef pMspDeInitCb;
|
||||
} BSP_OSPI_Cb_t;
|
||||
#endif /* (USE_HAL_OSPI_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t MemorySize;
|
||||
uint32_t ClockPrescaler;
|
||||
uint32_t SampleShifting;
|
||||
uint32_t TransferRate;
|
||||
} MX_OSPI_Config;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Types OSPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
#define BSP_OSPI_NOR_Info_t MX25LM51245G_Info_t
|
||||
#define BSP_OSPI_NOR_Interface_t MX25LM51245G_Interface_t
|
||||
#define BSP_OSPI_NOR_Transfer_t MX25LM51245G_Transfer_t
|
||||
#define BSP_OSPI_NOR_Erase_t MX25LM51245G_Erase_t
|
||||
|
||||
typedef struct
|
||||
{
|
||||
OSPI_Access_t IsInitialized; /*!< Instance access Flash method */
|
||||
BSP_OSPI_NOR_Interface_t InterfaceMode; /*!< Flash Interface mode of Instance */
|
||||
BSP_OSPI_NOR_Transfer_t TransferRate; /*!< Flash Transfer mode of Instance */
|
||||
uint32_t IsMspCallbacksValid;
|
||||
} OSPI_NOR_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BSP_OSPI_NOR_Interface_t InterfaceMode; /*!< Current Flash Interface mode */
|
||||
BSP_OSPI_NOR_Transfer_t TransferRate; /*!< Current Flash Transfer rate */
|
||||
} BSP_OSPI_NOR_Init_t;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Constants OSPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/* Definition for OSPI clock resources */
|
||||
#define OSPI_CLK_ENABLE() __HAL_RCC_OSPI1_CLK_ENABLE()
|
||||
#define OSPI_CLK_DISABLE() __HAL_RCC_OSPI1_CLK_DISABLE()
|
||||
|
||||
#define OSPI_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define OSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define OSPI_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define OSPI_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define OSPI_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define OSPI_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define OSPI_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define OSPI_D5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define OSPI_D6_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
|
||||
#define OSPI_D7_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define OSPI_DQS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
|
||||
#define OSPI_FORCE_RESET() __HAL_RCC_OSPI1_FORCE_RESET()
|
||||
#define OSPI_RELEASE_RESET() __HAL_RCC_OSPI1_RELEASE_RESET()
|
||||
|
||||
/* Definition for OSPI Pins */
|
||||
/* OSPI_CLK */
|
||||
#define OSPI_CS_PIN GPIO_PIN_6
|
||||
#define OSPI_CS_GPIO_PORT GPIOG
|
||||
#define OSPI_CS_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_CLK_PIN GPIO_PIN_2
|
||||
#define OSPI_CLK_GPIO_PORT GPIOB
|
||||
#define OSPI_CLK_PIN_AF GPIO_AF9_OCTOSPIM_P1
|
||||
#define OSPI_D0_PIN GPIO_PIN_8
|
||||
#define OSPI_D0_GPIO_PORT GPIOF
|
||||
#define OSPI_D0_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D1_PIN GPIO_PIN_9
|
||||
#define OSPI_D1_GPIO_PORT GPIOF
|
||||
#define OSPI_D1_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D2_PIN GPIO_PIN_7
|
||||
#define OSPI_D2_GPIO_PORT GPIOF
|
||||
#define OSPI_D2_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D3_PIN GPIO_PIN_6
|
||||
#define OSPI_D3_GPIO_PORT GPIOF
|
||||
#define OSPI_D3_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D4_PIN GPIO_PIN_1
|
||||
#define OSPI_D4_GPIO_PORT GPIOC
|
||||
#define OSPI_D4_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D5_PIN GPIO_PIN_3
|
||||
#define OSPI_D5_GPIO_PORT GPIOH
|
||||
#define OSPI_D5_PIN_AF GPIO_AF9_OCTOSPIM_P1
|
||||
#define OSPI_D6_PIN GPIO_PIN_6
|
||||
#define OSPI_D6_GPIO_PORT GPIOD
|
||||
#define OSPI_D6_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
#define OSPI_D7_PIN GPIO_PIN_14
|
||||
#define OSPI_D7_GPIO_PORT GPIOG
|
||||
#define OSPI_D7_PIN_AF GPIO_AF9_OCTOSPIM_P1
|
||||
#define OSPI_DQS_PIN GPIO_PIN_5
|
||||
#define OSPI_DQS_GPIO_PORT GPIOC
|
||||
#define OSPI_DQS_PIN_AF GPIO_AF10_OCTOSPIM_P1
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Constants OSPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define OSPI_NOR_INSTANCES_NUMBER 1U
|
||||
|
||||
/* Definition for OSPI modes */
|
||||
#define BSP_OSPI_NOR_SPI_MODE (BSP_OSPI_NOR_Interface_t)MX25LM51245G_SPI_MODE /* 1 Cmd Line, 1 Address Line and 1 Data Line */
|
||||
#define BSP_OSPI_NOR_OPI_MODE (BSP_OSPI_NOR_Interface_t)MX25LM51245G_OPI_MODE /* 8 Cmd Lines, 8 Address Lines and 8 Data Lines */
|
||||
|
||||
/* Definition for OSPI transfer rates */
|
||||
#define BSP_OSPI_NOR_STR_TRANSFER (BSP_OSPI_NOR_Transfer_t)MX25LM51245G_STR_TRANSFER /* Single Transfer Rate */
|
||||
#define BSP_OSPI_NOR_DTR_TRANSFER (BSP_OSPI_NOR_Transfer_t)MX25LM51245G_DTR_TRANSFER /* Double Transfer Rate */
|
||||
|
||||
/* OSPI erase types */
|
||||
#define BSP_OSPI_NOR_ERASE_4K MX25LM51245G_ERASE_4K
|
||||
#define BSP_OSPI_NOR_ERASE_64K MX25LM51245G_ERASE_64K
|
||||
#define BSP_OSPI_NOR_ERASE_CHIP MX25LM51245G_ERASE_BULK
|
||||
|
||||
/* OSPI block sizes */
|
||||
#define BSP_OSPI_NOR_BLOCK_4K MX25LM51245G_SUBSECTOR_4K
|
||||
#define BSP_OSPI_NOR_BLOCK_64K MX25LM51245G_SECTOR_64K
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
/** @addtogroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern OSPI_HandleTypeDef hospi_nor[];
|
||||
extern OSPI_NOR_Ctx_t Ospi_Nor_Ctx[];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup STM32H7B3I_EVAL_OSPI_NOR_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_OSPI_NOR_Init(uint32_t Instance, BSP_OSPI_NOR_Init_t *Init);
|
||||
int32_t BSP_OSPI_NOR_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_OSPI_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_OSPI_NOR_RegisterMspCallbacks(uint32_t Instance, BSP_OSPI_Cb_t *CallBacks);
|
||||
int32_t BSP_OSPI_NOR_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
#endif /* (USE_HAL_OSPI_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_OSPI_NOR_Read(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
|
||||
int32_t BSP_OSPI_NOR_Write(uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
|
||||
int32_t BSP_OSPI_NOR_Erase_Block(uint32_t Instance, uint32_t BlockAddress, BSP_OSPI_NOR_Erase_t BlockSize);
|
||||
int32_t BSP_OSPI_NOR_Erase_Chip(uint32_t Instance);
|
||||
int32_t BSP_OSPI_NOR_GetStatus(uint32_t Instance);
|
||||
int32_t BSP_OSPI_NOR_GetInfo(uint32_t Instance, BSP_OSPI_NOR_Info_t *pInfo);
|
||||
int32_t BSP_OSPI_NOR_EnableMemoryMappedMode(uint32_t Instance);
|
||||
int32_t BSP_OSPI_NOR_DisableMemoryMappedMode(uint32_t Instance);
|
||||
int32_t BSP_OSPI_NOR_ReadID(uint32_t Instance, uint8_t *Id);
|
||||
int32_t BSP_OSPI_NOR_ConfigFlash(uint32_t Instance, BSP_OSPI_NOR_Interface_t Mode, BSP_OSPI_NOR_Transfer_t Rate);
|
||||
int32_t BSP_OSPI_NOR_SuspendErase(uint32_t Instance);
|
||||
int32_t BSP_OSPI_NOR_ResumeErase(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_OSPI_NOR_Init(OSPI_HandleTypeDef *hospi, MX_OSPI_Config *Config);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_OSPI_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,176 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_sd.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_sd.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_SD_H
|
||||
#define STM32H7B3I_EVAL_SD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SD SD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SD_Exported_Types SD Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SD Card information structure
|
||||
*/
|
||||
#define BSP_SD_CardInfo HAL_SD_CardInfoTypeDef
|
||||
|
||||
#if (USE_HAL_SD_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(SD_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(SD_HandleTypeDef *);
|
||||
} BSP_SD_Cb_t;
|
||||
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SD_Exported_Constants SD Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define SD_INSTANCES_NBR 2UL
|
||||
|
||||
#ifndef SD_WRITE_TIMEOUT
|
||||
#define SD_WRITE_TIMEOUT 100U
|
||||
#endif
|
||||
|
||||
#ifndef SD_READ_TIMEOUT
|
||||
#define SD_READ_TIMEOUT 100U
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief SD transfer state definition
|
||||
*/
|
||||
#define SD_TRANSFER_OK 0U
|
||||
#define SD_TRANSFER_BUSY 1U
|
||||
|
||||
/**
|
||||
* @brief SD-detect signal
|
||||
*/
|
||||
#define SD_PRESENT 1U
|
||||
#define SD_NOT_PRESENT 0U
|
||||
|
||||
|
||||
#define SD1_DETECT_PIN GPIO_PIN_10
|
||||
#define SD1_DETECT_GPIO_PORT GPIOF
|
||||
#define SD1_DETECT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define SD1_DETECT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOF_CLK_DISABLE()
|
||||
#define SD1_DETECT_EXTI_IRQn EXTI15_10_IRQn
|
||||
#define SD1_DETECT_EXTI_LINE EXTI_LINE_10
|
||||
|
||||
#define SD2_DETECT_PIN GPIO_PIN_11
|
||||
#define SD2_DETECT_GPIO_PORT GPIOI
|
||||
#define SD2_DETECT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
|
||||
#define SD2_DETECT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOI_CLK_DISABLE()
|
||||
#define SD2_DETECT_EXTI_IRQn EXTI15_10_IRQn
|
||||
#define SD2_DETECT_EXTI_LINE EXTI_LINE_11
|
||||
|
||||
#define SD_LDO_SEL_PIN GPIO_PIN_6
|
||||
#define SD_LDO_SEL_GPIO_PORT GPIOG
|
||||
#define SD_LDO_SEL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define SD_LDO_SEL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOG_CLK_DISABLE()
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SD_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern SD_HandleTypeDef hsd_sdmmc[SD_INSTANCES_NBR];
|
||||
extern EXTI_HandleTypeDef hsd_exti[SD_INSTANCES_NBR];
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SD_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_SD_Init(uint32_t Instance);
|
||||
int32_t BSP_SD_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_SD_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_SD_RegisterMspCallbacks(uint32_t Instance, BSP_SD_Cb_t *CallBacks);
|
||||
int32_t BSP_SD_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_SD_DetectITConfig(uint32_t Instance);
|
||||
int32_t BSP_SD_ReadBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr);
|
||||
int32_t BSP_SD_WriteBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
|
||||
int32_t BSP_SD_ReadBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
|
||||
int32_t BSP_SD_WriteBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
|
||||
int32_t BSP_SD_ReadBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
|
||||
int32_t BSP_SD_WriteBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
|
||||
int32_t BSP_SD_Erase(uint32_t Instance, uint32_t BlockIdx, uint32_t BlocksNbr);
|
||||
int32_t BSP_SD_GetCardState(uint32_t Instance);
|
||||
int32_t BSP_SD_GetCardInfo(uint32_t Instance, BSP_SD_CardInfo *CardInfo);
|
||||
int32_t BSP_SD_IsDetected(uint32_t Instance);
|
||||
|
||||
void BSP_SD_DETECT_IRQHandler(uint32_t Instance);
|
||||
void BSP_SD_IRQHandler(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings (e.g. DMA stream or IT)
|
||||
need to be changed for specific application needs */
|
||||
void BSP_SD_AbortCallback(uint32_t Instance);
|
||||
void BSP_SD_WriteCpltCallback(uint32_t Instance);
|
||||
void BSP_SD_ReadCpltCallback(uint32_t Instance);
|
||||
void BSP_SD_DetectCallback(uint32_t Instance, uint32_t Status);
|
||||
|
||||
HAL_StatusTypeDef MX_SDMMC1_SD_Init(SD_HandleTypeDef *hsd);
|
||||
HAL_StatusTypeDef MX_SDMMC2_SD_Init(SD_HandleTypeDef *hsd);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_SD_H */
|
||||
@@ -0,0 +1,587 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_sdram.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes the SDRAM driver for the IS42S32800J-6BLI memory
|
||||
* device mounted on STM32H7B3I_EVAL boards.
|
||||
@verbatim
|
||||
How To use this driver:
|
||||
-----------------------
|
||||
- This driver is used to drive the IS42S32800J-6BLI SDRAM external memory mounted
|
||||
on STM32H7B3I_EVAL board.
|
||||
- This driver does not need a specific component driver for the SDRAM device
|
||||
to be included with.
|
||||
|
||||
Driver description:
|
||||
------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the SDRAM external memory using the BSP_SDRAM_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
FMC controller configuration to interface with the external SDRAM memory.
|
||||
o It contains the SDRAM initialization sequence to program the SDRAM external
|
||||
device using the function BSP_SDRAM_Initialization_sequence(). Note that this
|
||||
sequence is standard for all SDRAM devices, but can include some differences
|
||||
from a device to another. If it is the case, the right sequence should be
|
||||
implemented separately.
|
||||
|
||||
+ SDRAM read/write operations
|
||||
o SDRAM external memory can be accessed with read/write operations once it is
|
||||
initialized.
|
||||
Read/write operation can be performed with AHB access using the functions
|
||||
BSP_SDRAM_ReadData()/BSP_SDRAM_WriteData(), or by DMA transfer using the functions
|
||||
BSP_SDRAM_ReadData_DMA()/BSP_SDRAM_WriteData_DMA().
|
||||
o The AHB access is performed with 32-bit width transaction, the DMA transfer
|
||||
configuration is fixed at single (no burst) word transfer (see the
|
||||
SDRAM_MspInit() static function).
|
||||
o User can implement his own functions for read/write access with his desired
|
||||
configurations.
|
||||
o If interrupt mode is used for DMA transfer, the function BSP_SDRAM_DMA_IRQHandler()
|
||||
is called in IRQ handler file, to serve the generated interrupt once the DMA
|
||||
transfer is complete.
|
||||
o You can send a command to the SDRAM device in runtime using the function
|
||||
BSP_SDRAM_Sendcmd(), and giving the desired command as parameter chosen between
|
||||
the predefined commands of the "FMC_SDRAM_CommandTypeDef" structure.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_sdram.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Exported_Variables SDRAM Exported Variables
|
||||
* @{
|
||||
*/
|
||||
SDRAM_HandleTypeDef hsdram[SDRAM_INSTANCES_NBR];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Private_Variables SDRAM Private Variables
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
||||
static uint32_t IsMspCallbacksValid = 0;
|
||||
#endif
|
||||
static SDRAM_DataLength_t ActiveDataLength;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Private_Functions_Prototypes SDRAM Private Functions Prototypes
|
||||
* @{
|
||||
*/
|
||||
static void SDRAM_MspDeInit(SDRAM_HandleTypeDef *hSdram);
|
||||
static void SDRAM_MspInit(SDRAM_HandleTypeDef *hSdram);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Exported_Functions SDRAM Exported Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes the SDRAM device.
|
||||
* @param Instance SDRAM Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_Init(uint32_t Instance)
|
||||
{
|
||||
return BSP_SDRAM_InitEx(Instance, SDRAM_DATA_LENGTH_32B);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SDRAM device.
|
||||
* @param Instance SDRAM Instance
|
||||
* @param DataLength Data length; Could be:
|
||||
* SDRAM_DATA_LENGTH_32B
|
||||
* SDRAM_DATA_LENGTH_16B
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_InitEx(uint32_t Instance, SDRAM_DataLength_t DataLength)
|
||||
{
|
||||
int32_t ret;
|
||||
static IS42S32800J_Context_t pRegMode;
|
||||
uint32_t row_bits_num, mem_bus_width;
|
||||
|
||||
if (Instance >= SDRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
ActiveDataLength = DataLength;
|
||||
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
||||
/* Register the SDRAM MSP Callbacks */
|
||||
if (IsMspCallbacksValid == 0U)
|
||||
{
|
||||
if (BSP_SDRAM_RegisterDefaultMspCallbacks(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
return BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
#else
|
||||
/* Msp SDRAM initialization */
|
||||
SDRAM_MspInit(&hsdram[Instance]);
|
||||
#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
|
||||
|
||||
if (ActiveDataLength == SDRAM_DATA_LENGTH_32B)
|
||||
{
|
||||
row_bits_num = FMC_SDRAM_ROW_BITS_NUM_12;
|
||||
mem_bus_width = FMC_SDRAM_MEM_BUS_WIDTH_32;
|
||||
}
|
||||
else
|
||||
{
|
||||
row_bits_num = FMC_SDRAM_ROW_BITS_NUM_13;
|
||||
mem_bus_width = FMC_SDRAM_MEM_BUS_WIDTH_16;
|
||||
}
|
||||
|
||||
if (MX_SDRAM_BANK2_Init(&hsdram[Instance], row_bits_num, mem_bus_width) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* External memory mode register configuration */
|
||||
pRegMode.TargetBank = FMC_SDRAM_CMD_TARGET_BANK2;
|
||||
pRegMode.RefreshMode = IS42S32800J_AUTOREFRESH_MODE_CMD;
|
||||
pRegMode.RefreshRate = REFRESH_COUNT;
|
||||
pRegMode.BurstLength = IS42S32800J_BURST_LENGTH_1;
|
||||
pRegMode.BurstType = IS42S32800J_BURST_TYPE_SEQUENTIAL;
|
||||
pRegMode.CASLatency = IS42S32800J_CAS_LATENCY_3;
|
||||
pRegMode.OperationMode = IS42S32800J_OPERATING_MODE_STANDARD;
|
||||
pRegMode.WriteBurstMode = IS42S32800J_WRITEBURST_MODE_SINGLE;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
if (IS42S32800J_Init(&hsdram[Instance], &pRegMode) != IS42S32800J_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the SDRAM device.
|
||||
* @param Instance SDRAM Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= SDRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SDRAM device de-initialization */
|
||||
hsdram[Instance].Instance = FMC_SDRAM_DEVICE;
|
||||
|
||||
(void)HAL_SDRAM_DeInit(&hsdram[Instance]);
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 0)
|
||||
/* SDRAM controller de-initialization */
|
||||
SDRAM_MspDeInit(&hsdram[Instance]);
|
||||
#endif /* (USE_HAL_SDRAM_REGISTER_CALLBACKS == 0) */
|
||||
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SDRAM periperal.
|
||||
* @param hSdram SDRAM handle
|
||||
* @param RowBitsNumber Number of row to set
|
||||
* @param MemoryDataWidth The momory width 16 or 32bits
|
||||
* @retval HAL status
|
||||
*/
|
||||
__weak HAL_StatusTypeDef MX_SDRAM_BANK2_Init(SDRAM_HandleTypeDef *hSdram, uint32_t RowBitsNumber,
|
||||
uint32_t MemoryDataWidth)
|
||||
{
|
||||
FMC_SDRAM_TimingTypeDef sdram_timing;
|
||||
|
||||
/* SDRAM device configuration */
|
||||
hSdram->Instance = FMC_SDRAM_DEVICE;
|
||||
|
||||
/* SDRAM handle configuration */
|
||||
hSdram->Init.SDBank = FMC_SDRAM_BANK2;
|
||||
hSdram->Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;
|
||||
hSdram->Init.RowBitsNumber = RowBitsNumber;
|
||||
hSdram->Init.MemoryDataWidth = MemoryDataWidth;
|
||||
hSdram->Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
hSdram->Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
|
||||
hSdram->Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
hSdram->Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_3;
|
||||
hSdram->Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
|
||||
hSdram->Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
|
||||
|
||||
/* tick = 1/(HCLK/3) = 1/93,3Mhz = 10 ns */
|
||||
/* Timing configuration for as SDRAM */
|
||||
sdram_timing.LoadToActiveDelay = 2; /* Load Mode Register to Active */
|
||||
sdram_timing.ExitSelfRefreshDelay = 7; /* Exit Self-refresh delay */
|
||||
sdram_timing.SelfRefreshTime = 4; /* Self refresh time */
|
||||
sdram_timing.RowCycleDelay = 7; /* Row cycle delay */
|
||||
sdram_timing.WriteRecoveryTime = 2; /* Recovery delay */
|
||||
sdram_timing.RPDelay = 2; /* Row precharge delay */
|
||||
sdram_timing.RCDDelay = 2; /* Row to column delay */
|
||||
|
||||
/* SDRAM controller initialization */
|
||||
if (HAL_SDRAM_Init(hSdram, &sdram_timing) != HAL_OK)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SDRAM periperal.
|
||||
* @retval HAL status
|
||||
*/
|
||||
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Default BSP SDRAM Msp Callbacks
|
||||
* @param Instance SDRAM Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_RegisterDefaultMspCallbacks(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Check if the instance is supported */
|
||||
if (Instance >= SDRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_SDRAM_RegisterCallback(&hsdram[Instance], HAL_SDRAM_MSP_INIT_CB_ID, SDRAM_MspInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
if (HAL_SDRAM_RegisterCallback(&hsdram[Instance], HAL_SDRAM_MSP_DEINIT_CB_ID, SDRAM_MspDeInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1;
|
||||
}
|
||||
}
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP SDRAM Msp Callback registering
|
||||
* @param Instance SDRAM Instance
|
||||
* @param CallBacks pointer to MspInit/MspDeInit callbacks functions
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_RegisterMspCallbacks(uint32_t Instance, BSP_SDRAM_Cb_t *CallBacks)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Check if the instance is supported */
|
||||
if (Instance >= SDRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_SDRAM_RegisterCallback(&hsdram[Instance], HAL_SDRAM_MSP_INIT_CB_ID, CallBacks->pMspInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
if (HAL_SDRAM_RegisterCallback(&hsdram[Instance], HAL_SDRAM_MSP_DEINIT_CB_ID, CallBacks->pMspDeInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1;
|
||||
}
|
||||
}
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
#endif /* (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/**
|
||||
* @brief Sends command to the SDRAM bank.
|
||||
* @param Instance SDRAM Instance
|
||||
* @param SdramCmd Pointer to SDRAM command structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SDRAM_SendCmd(uint32_t Instance, FMC_SDRAM_CommandTypeDef *SdramCmd)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Instance >= SDRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else if (IS42S32800J_Sendcmd(&hsdram[Instance], SdramCmd) != IS42S32800J_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SDRAM MDMA interrupt request.
|
||||
* @param Instance SDRAM instance
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_SDRAM_IRQHandler(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
HAL_MDMA_IRQHandler(hsdram[Instance].hmdma);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Private_Functions SDRAM Private Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes SDRAM MSP.
|
||||
* @param hSdram SDRAM handle
|
||||
* @retval None
|
||||
*/
|
||||
static void SDRAM_MspInit(SDRAM_HandleTypeDef *hSdram)
|
||||
{
|
||||
static MDMA_HandleTypeDef mdma_handle;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Enable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/* Enable chosen DMAx clock */
|
||||
SDRAM_MDMAx_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
||||
/* Common GPIO configuration */
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_structure.Pull = GPIO_PULLUP;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
gpio_init_structure.Alternate = GPIO_AF12_FMC;
|
||||
|
||||
/* GPIOA configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_7;
|
||||
HAL_GPIO_Init(GPIOA, &gpio_init_structure);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | \
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOE, &gpio_init_structure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOF, &gpio_init_structure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | \
|
||||
GPIO_PIN_8 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOG, &gpio_init_structure);
|
||||
|
||||
/* GPIOH configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
|
||||
HAL_GPIO_Init(GPIOH, &gpio_init_structure);
|
||||
|
||||
if (ActiveDataLength == SDRAM_DATA_LENGTH_32B)
|
||||
{
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
|
||||
/* GPIOH configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | \
|
||||
GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOH, &gpio_init_structure);
|
||||
|
||||
/* GPIOI configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
|
||||
HAL_GPIO_Init(GPIOI, &gpio_init_structure);
|
||||
}
|
||||
|
||||
/* Configure common MDMA parameters */
|
||||
mdma_handle.Init.Request = MDMA_REQUEST_SW;
|
||||
mdma_handle.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
|
||||
mdma_handle.Init.Priority = MDMA_PRIORITY_HIGH;
|
||||
if (ActiveDataLength == SDRAM_DATA_LENGTH_32B)
|
||||
{
|
||||
mdma_handle.Init.SourceInc = MDMA_SRC_INC_WORD;
|
||||
mdma_handle.Init.DestinationInc = MDMA_DEST_INC_WORD;
|
||||
mdma_handle.Init.SourceDataSize = MDMA_SRC_DATASIZE_WORD;
|
||||
mdma_handle.Init.DestDataSize = MDMA_DEST_DATASIZE_WORD;
|
||||
}
|
||||
else
|
||||
{
|
||||
mdma_handle.Init.SourceInc = MDMA_SRC_INC_HALFWORD;
|
||||
mdma_handle.Init.DestinationInc = MDMA_DEST_INC_HALFWORD;
|
||||
mdma_handle.Init.SourceDataSize = MDMA_SRC_DATASIZE_HALFWORD;
|
||||
mdma_handle.Init.DestDataSize = MDMA_DEST_DATASIZE_HALFWORD;
|
||||
}
|
||||
|
||||
mdma_handle.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
|
||||
mdma_handle.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
|
||||
mdma_handle.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
|
||||
mdma_handle.Init.BufferTransferLength = 128;
|
||||
mdma_handle.Init.SourceBlockAddressOffset = 0;
|
||||
mdma_handle.Init.DestBlockAddressOffset = 0;
|
||||
|
||||
mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
|
||||
|
||||
/* Associate the DMA handle */
|
||||
__HAL_LINKDMA(hSdram, hmdma, mdma_handle);
|
||||
|
||||
/* De-initialize the Stream for new transfer */
|
||||
(void)HAL_MDMA_DeInit(&mdma_handle);
|
||||
|
||||
/* Configure the DMA Stream */
|
||||
(void)HAL_MDMA_Init(&mdma_handle);
|
||||
|
||||
/* NVIC configuration for DMA transfer complete interrupt */
|
||||
HAL_NVIC_SetPriority(SDRAM_MDMAx_IRQn, BSP_SDRAM_IT_PRIORITY, 0);
|
||||
HAL_NVIC_EnableIRQ(SDRAM_MDMAx_IRQn);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes SDRAM MSP.
|
||||
* @param hSdram SDRAM handle
|
||||
* @retval None
|
||||
*/
|
||||
static void SDRAM_MspDeInit(SDRAM_HandleTypeDef *hSdram)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hSdram);
|
||||
|
||||
static DMA_HandleTypeDef mdma_handle;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Disable NVIC configuration for DMA interrupt */
|
||||
HAL_NVIC_DisableIRQ(SDRAM_MDMAx_IRQn);
|
||||
|
||||
/* Deinitialize the stream for new transfer */
|
||||
mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
|
||||
(void)HAL_DMA_DeInit(&mdma_handle);
|
||||
|
||||
/* GPIOA configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_7;
|
||||
HAL_GPIO_DeInit(GPIOA, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOD, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | \
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOE, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOF, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | \
|
||||
GPIO_PIN_8 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOG, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOH configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
|
||||
HAL_GPIO_DeInit(GPIOH, gpio_init_structure.Pin);
|
||||
|
||||
if (ActiveDataLength == SDRAM_DATA_LENGTH_32B)
|
||||
{
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
|
||||
/* GPIOH configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | \
|
||||
GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOH, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOI configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
|
||||
HAL_GPIO_DeInit(GPIOI, gpio_init_structure.Pin);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,143 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_sdram.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_sdram.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_SDRAM_H
|
||||
#define STM32H7B3I_EVAL_SDRAM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
#include "../Components/is42s32800j/is42s32800j.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM SDRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Exported_Types SDRAM Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SDRAM_DATA_LENGTH_16B,
|
||||
SDRAM_DATA_LENGTH_32B
|
||||
} SDRAM_DataLength_t;
|
||||
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(SDRAM_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(SDRAM_HandleTypeDef *);
|
||||
} BSP_SDRAM_Cb_t;
|
||||
#endif /* (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SDRAM_Exported_Constants SDRAM Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define SDRAM_INSTANCES_NBR 1U
|
||||
#define SDRAM_DEVICE_ADDR 0xD0000000U
|
||||
#define SDRAM_DEVICE_SIZE 0x02000000U /* 32 MBytes */
|
||||
|
||||
/* DMA definitions for SDRAM DMA transfer */
|
||||
#define SDRAM_MDMAx_CLK_ENABLE __HAL_RCC_MDMA_CLK_ENABLE
|
||||
#define SDRAM_MDMAx_CLK_DISABLE __HAL_RCC_MDMA_CLK_DISABLE
|
||||
#define SDRAM_MDMAx_CHANNEL MDMA_Channel0
|
||||
#define SDRAM_MDMAx_IRQn MDMA_IRQn
|
||||
#define SDRAM_MDMA_IRQHandler MDMA_IRQHandler
|
||||
|
||||
|
||||
/**
|
||||
* @brief FMC SDRAM Mode definition register defines
|
||||
*/
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_1 0x0000U
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_2 0x0001U
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_4 0x0002U
|
||||
#define SDRAM_MODEREG_BURST_LENGTH_8 0x0004U
|
||||
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL 0x0000U
|
||||
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED 0x0008U
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_2 0x0020U
|
||||
#define SDRAM_MODEREG_CAS_LATENCY_3 0x0030U
|
||||
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD 0x0000U
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED 0x0000U
|
||||
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE 0x0200U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SDRAM_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern SDRAM_HandleTypeDef hsdram[];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @addtogroup STM32H7B3I_EVAL_SDRAM_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_SDRAM_Init(uint32_t Instance);
|
||||
int32_t BSP_SDRAM_InitEx(uint32_t Instance, SDRAM_DataLength_t DataLength);
|
||||
int32_t BSP_SDRAM_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_SDRAM_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_SDRAM_RegisterMspCallbacks(uint32_t Instance, BSP_SDRAM_Cb_t *CallBacks);
|
||||
#endif /* (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_SDRAM_SendCmd(uint32_t Instance, FMC_SDRAM_CommandTypeDef *SdramCmd);
|
||||
void BSP_SDRAM_IRQHandler(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings need to be
|
||||
changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_SDRAM_BANK2_Init(SDRAM_HandleTypeDef *hSdram, uint32_t RowBitsNumber, uint32_t MemoryDataWidth);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_SDRAM_H */
|
||||
@@ -0,0 +1,456 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_sram.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file includes the SRAM driver for the IS61WV102416BLL-10M memory
|
||||
* device mounted on STM32H7B3I_EVAL boards.
|
||||
@verbatim
|
||||
How To use this driver:
|
||||
-----------------------
|
||||
- This driver is used to drive the IS61WV102416BLL-10M SRAM external memory mounted
|
||||
on STM32H7B3I_EVAL board.
|
||||
- This driver does not need a specific component driver for the SRAM device
|
||||
to be included with.
|
||||
|
||||
Driver description:
|
||||
------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the SRAM external memory using the BSP_SRAM_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
FMC controller configuration to interface with the external SRAM memory.
|
||||
|
||||
+ SRAM read/write operations
|
||||
o SRAM external memory can be accessed with read/write operations once it is
|
||||
initialized.
|
||||
Read/write operation can be performed with AHB access using the functions
|
||||
BSP_SRAM_ReadData()/BSP_SRAM_WriteData(), or by DMA transfer using the functions
|
||||
BSP_SRAM_ReadData_DMA()/BSP_SRAM_WriteData_DMA().
|
||||
o The AHB access is performed with 16-bit width transaction, the DMA transfer
|
||||
configuration is fixed at single (no burst) halfword transfer
|
||||
(see the SRAM_MspInit() static function).
|
||||
o User can implement his own functions for read/write access with his desired
|
||||
configurations.
|
||||
o If interrupt mode is used for DMA transfer, the function BSP_SRAM_DMA_IRQHandler()
|
||||
is called in IRQ handler file, to serve the generated interrupt once the DMA
|
||||
transfer is complete.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_sram.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Exported_Variables SRAM Exported Variables
|
||||
* @{
|
||||
*/
|
||||
SRAM_HandleTypeDef hsram[SRAM_INSTANCES_NBR];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Private_Variables SRAM Private Variables
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
static uint32_t IsMspCallbacksValid = 0;
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Private_Functions_Prototypes SRAM Private Functions Prototypes
|
||||
* @{
|
||||
*/
|
||||
static void SRAM_MspInit(SRAM_HandleTypeDef *hSram);
|
||||
static void SRAM_MspDeInit(SRAM_HandleTypeDef *hSram);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Exported_Functions SRAM Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the SRAM device.
|
||||
* @param Instance SRAM instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SRAM_Init(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= SRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 0)
|
||||
/* Msp SRAM initialization */
|
||||
SRAM_MspInit(&hsram[Instance]);
|
||||
#else
|
||||
/* Register the SRAM MSP Callbacks */
|
||||
if (IsMspCallbacksValid == 0U)
|
||||
{
|
||||
if (BSP_SRAM_RegisterDefaultMspCallbacks(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
}
|
||||
if (ret == BSP_ERROR_NONE)
|
||||
{
|
||||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||||
/* __weak function can be rewritten by the application */
|
||||
if (MX_SRAM_BANK3_Init(&hsram[Instance]) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the SRAM device.
|
||||
* @param Instance SRAM instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SRAM_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= SRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SRAM device de-initialization */
|
||||
hsram[Instance].Instance = FMC_NORSRAM_DEVICE;
|
||||
hsram[Instance].Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
||||
|
||||
(void)HAL_SRAM_DeInit(&hsram[Instance]);
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 0)
|
||||
/* SRAM controller de-initialization */
|
||||
SRAM_MspDeInit(&hsram[Instance]);
|
||||
#endif /* (USE_HAL_SRAM_REGISTER_CALLBACKS == 0) */
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SRAM peripheral.
|
||||
* @param hSram SRAM handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
__weak HAL_StatusTypeDef MX_SRAM_BANK3_Init(SRAM_HandleTypeDef *hSram)
|
||||
{
|
||||
static FMC_NORSRAM_TimingTypeDef sram_timing;
|
||||
|
||||
/* SRAM device configuration */
|
||||
hSram->Instance = FMC_NORSRAM_DEVICE;
|
||||
hSram->Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
||||
|
||||
/* SRAM device configuration */
|
||||
hSram->Init.NSBank = FMC_NORSRAM_BANK3;
|
||||
hSram->Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
|
||||
hSram->Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
|
||||
hSram->Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||||
hSram->Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
|
||||
hSram->Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
|
||||
hSram->Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
|
||||
hSram->Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
|
||||
hSram->Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
|
||||
hSram->Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
|
||||
hSram->Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||||
hSram->Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
|
||||
hSram->Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
|
||||
hSram->Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
|
||||
hSram->Init.PageSize = FMC_PAGE_SIZE_NONE;
|
||||
|
||||
/* Timing configuration derived from system clock (up to 280)
|
||||
for 93,33Mhz as SRAM clock frequency */
|
||||
sram_timing.AddressSetupTime = 2;
|
||||
sram_timing.AddressHoldTime = 1;
|
||||
sram_timing.DataSetupTime = 4;
|
||||
sram_timing.BusTurnAroundDuration = 1;
|
||||
sram_timing.CLKDivision = 3;
|
||||
sram_timing.DataLatency = 2;
|
||||
sram_timing.AccessMode = FMC_ACCESS_MODE_A;
|
||||
|
||||
/* SRAM controller initialization */
|
||||
if (HAL_SRAM_Init(hSram, &sram_timing, NULL) != HAL_OK)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Default BSP SRAM Msp Callbacks
|
||||
* @param Instance SRAM Instance
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SRAM_RegisterDefaultMspCallbacks(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Check if the instance is supported */
|
||||
if (Instance >= SRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_SRAM_RegisterCallback(&hsram[Instance], HAL_SRAM_MSP_INIT_CB_ID, SRAM_MspInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_SRAM_RegisterCallback(&hsram[Instance], HAL_SRAM_MSP_DEINIT_CB_ID, SRAM_MspDeInit) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1U;
|
||||
}
|
||||
}
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP SRAM Msp Callback registering
|
||||
* @param Instance SRAM Instance
|
||||
* @param CallBacks pointer to MspInit/MspDeInit callbacks functions
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_SRAM_RegisterMspCallbacks(uint32_t Instance, BSP_SRAM_Cb_t *CallBacks)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
/* Check if the instance is supported */
|
||||
if (Instance >= SRAM_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register MspInit/MspDeInit Callbacks */
|
||||
if (HAL_SRAM_RegisterCallback(&hsram[Instance], HAL_SRAM_MSP_INIT_CB_ID, CallBacks->pMspInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_SRAM_RegisterCallback(&hsram[Instance], HAL_SRAM_MSP_DEINIT_CB_ID, CallBacks->pMspDeInitCb) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
IsMspCallbacksValid = 1U;
|
||||
}
|
||||
}
|
||||
/* Return BSP status */
|
||||
return ret;
|
||||
}
|
||||
#endif /* (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/**
|
||||
* @brief This function handles SRAM MDMA interrupt request.
|
||||
* @param Instance SDRAM instance
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_SRAM_IRQHandler(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
HAL_MDMA_IRQHandler(hsram[Instance].hmdma);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Private_Functions SRAM Private Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Initializes SRAM MSP.
|
||||
* @param hSram SRAM handle
|
||||
* @retval None
|
||||
*/
|
||||
static void SRAM_MspInit(SRAM_HandleTypeDef *hSram)
|
||||
{
|
||||
static MDMA_HandleTypeDef mdma_handle;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hSram);
|
||||
|
||||
/* Enable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/* Enable chosen MDMAx clock */
|
||||
SRAM_MDMAx_CLK_ENABLE();
|
||||
|
||||
/* Enable GPIOs clock */
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
|
||||
/* Common GPIO configuration */
|
||||
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_structure.Pull = GPIO_PULLUP;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
gpio_init_structure.Alternate = GPIO_AF12_FMC;
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_8 | \
|
||||
GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOD, &gpio_init_structure);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | \
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOE, &gpio_init_structure);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_Init(GPIOF, &gpio_init_structure);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_10;
|
||||
HAL_GPIO_Init(GPIOG, &gpio_init_structure);
|
||||
|
||||
/* Configure common MDMA parameters */
|
||||
mdma_handle.Init.Request = MDMA_REQUEST_SW;
|
||||
mdma_handle.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
|
||||
mdma_handle.Init.Priority = MDMA_PRIORITY_HIGH;
|
||||
mdma_handle.Init.SourceInc = MDMA_SRC_INC_WORD;
|
||||
mdma_handle.Init.DestinationInc = MDMA_DEST_INC_WORD;
|
||||
mdma_handle.Init.SourceDataSize = MDMA_SRC_DATASIZE_WORD;
|
||||
mdma_handle.Init.DestDataSize = MDMA_DEST_DATASIZE_WORD;
|
||||
mdma_handle.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
|
||||
mdma_handle.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
|
||||
mdma_handle.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
|
||||
mdma_handle.Init.BufferTransferLength = 128;
|
||||
mdma_handle.Init.SourceBlockAddressOffset = 0;
|
||||
mdma_handle.Init.DestBlockAddressOffset = 0;
|
||||
|
||||
mdma_handle.Instance = SRAM_MDMAx_CHANNEL;
|
||||
|
||||
/* Associate the DMA handle */
|
||||
__HAL_LINKDMA(hSram, hmdma, mdma_handle);
|
||||
|
||||
/* De-initialize the Stream for new transfer */
|
||||
(void)HAL_MDMA_DeInit(&mdma_handle);
|
||||
|
||||
/* Configure the DMA Stream */
|
||||
(void)HAL_MDMA_Init(&mdma_handle);
|
||||
|
||||
/* NVIC configuration for DMA transfer complete interrupt */
|
||||
HAL_NVIC_SetPriority(SRAM_MDMAx_IRQn, BSP_SRAM_IT_PRIORITY, 0);
|
||||
HAL_NVIC_EnableIRQ(SRAM_MDMAx_IRQn);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief DeInitializes SRAM MSP.
|
||||
* @param hSram SRAM handle
|
||||
* @retval None
|
||||
*/
|
||||
static void SRAM_MspDeInit(SRAM_HandleTypeDef *hSram)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
static MDMA_HandleTypeDef mdma_handle;
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hSram);
|
||||
|
||||
/* GPIOD configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_8 | \
|
||||
GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | \
|
||||
GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOD, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOE configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | \
|
||||
GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | \
|
||||
GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOE, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOF configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
|
||||
HAL_GPIO_DeInit(GPIOF, gpio_init_structure.Pin);
|
||||
|
||||
/* GPIOG configuration */
|
||||
gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
|
||||
GPIO_PIN_5 | GPIO_PIN_10;
|
||||
HAL_GPIO_DeInit(GPIOG, gpio_init_structure.Pin);
|
||||
|
||||
/* Disable NVIC configuration for MDMA interrupt */
|
||||
HAL_NVIC_DisableIRQ(SRAM_MDMAx_IRQn);
|
||||
|
||||
/* De-initialize the channel for new transfer */
|
||||
mdma_handle.Instance = SRAM_MDMAx_CHANNEL;
|
||||
(void)HAL_MDMA_DeInit(&mdma_handle);
|
||||
|
||||
/* Disable chosen MDMAx clock */
|
||||
SRAM_MDMAx_CLK_DISABLE();
|
||||
|
||||
/* Disable FMC clock */
|
||||
__HAL_RCC_FMC_CLK_DISABLE();
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,124 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_sram.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_sram.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_SRAM_H
|
||||
#define STM32H7B3I_EVAL_SRAM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM SRAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Exported_Types SRAM Exported Types
|
||||
* @{
|
||||
*/
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void (* pMspInitCb)(SRAM_HandleTypeDef *);
|
||||
void (* pMspDeInitCb)(SRAM_HandleTypeDef *);
|
||||
} BSP_SRAM_Cb_t;
|
||||
#endif /* (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_SRAM_Exported_Constants SRAM Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#define SRAM_INSTANCES_NBR 1U
|
||||
|
||||
/**
|
||||
* @brief SRAM status structure definition
|
||||
*/
|
||||
#define SRAM_DEVICE_ADDR 0x68000000U
|
||||
#define SRAM_DEVICE_SIZE 0x200000U
|
||||
|
||||
/* DMA definitions for SRAM DMA transfer */
|
||||
#define SRAM_MDMAx_CLK_ENABLE __HAL_RCC_MDMA_CLK_ENABLE
|
||||
#define SRAM_MDMAx_CLK_DISABLE __HAL_RCC_MDMA_CLK_DISABLE
|
||||
#define SRAM_MDMAx_CHANNEL MDMA_Channel0
|
||||
#define SRAM_MDMAx_IRQn MDMA_IRQn
|
||||
#define SRAM_MDMA_IRQHandler MDMA_IRQHandler
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SRAM_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern SRAM_HandleTypeDef hsram[SRAM_INSTANCES_NBR];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_SRAM_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_SRAM_Init(uint32_t Instance);
|
||||
int32_t BSP_SRAM_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_SRAM_RegisterDefaultMspCallbacks(uint32_t Instance);
|
||||
int32_t BSP_SRAM_RegisterMspCallbacks(uint32_t Instance, BSP_SRAM_Cb_t *CallBacks);
|
||||
#endif /* (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
void BSP_SRAM_IRQHandler(uint32_t Instance);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_SRAM_BANK3_Init(SRAM_HandleTypeDef *hSram);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*STM32H7B3I_EVAL_SRAM_H */
|
||||
@@ -0,0 +1,749 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_ts.c
|
||||
* @author MCD Application Team
|
||||
* @brief This file provides a set of functions needed to manage the Touch
|
||||
* Screen on STM32H7B3I_EVAL board.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* File Info : -----------------------------------------------------------------
|
||||
User NOTES
|
||||
1. How To use this driver:
|
||||
--------------------------
|
||||
- This driver is used to drive the FT5336 touch screen module
|
||||
mounted over TFT-LCD on the STM32H7B3I_EVAL board.
|
||||
|
||||
2. Driver description:
|
||||
---------------------
|
||||
+ Initialization steps:
|
||||
o Initialize the TS module using the BSP_TS_Init() function. This
|
||||
function includes the MSP layer hardware resources initialization and the
|
||||
communication layer configuration to start the TS use. The LCD size properties
|
||||
(x and y) are passed as parameters.
|
||||
o If TS interrupt mode is desired, you must configure the TS interrupt mode
|
||||
by calling the function BSP_TS_ITConfig(). The TS interrupt mode is generated
|
||||
as an external interrupt whenever a touch is detected.
|
||||
The interrupt mode internally uses the IO functionalities driver driven by
|
||||
the IO expander, to configure the IT line.
|
||||
|
||||
+ Touch screen use
|
||||
o The touch screen state is captured whenever the function BSP_TS_GetState() is
|
||||
used. This function returns information about the last LCD touch occurred
|
||||
in the TS_State_t structure.
|
||||
o The IT is handled using the corresponding external interrupt IRQ handler,
|
||||
the user IT callback treatment is implemented on the same external interrupt
|
||||
callback.
|
||||
|
||||
------------------------------------------------------------------------------*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_ts.h"
|
||||
#include "stm32h7b3i_eval_bus.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS TS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Private_Types_Definitions TS Private Types Definitions
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GT911_TS_CTRL,
|
||||
FT5336_TS_CTRL
|
||||
} TS_Driver_t;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Private_Defines TS Private Types Defines
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Private_Macros TS Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define TS_MIN(a,b) ((a > b) ? b : a)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Private_Function_Prototypes TS Private Function Prototypes
|
||||
* @{
|
||||
*/
|
||||
static void TS_EXTI_Callback(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Privates_Variables TS Privates Variables
|
||||
* @{
|
||||
*/
|
||||
static TS_Drv_t *Ts_Drv = NULL;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Exported_Variables TS Exported Variables
|
||||
* @{
|
||||
*/
|
||||
EXTI_HandleTypeDef hts_exti[TS_INSTANCES_NBR] = {0};
|
||||
void *Ts_CompObj[TS_INSTANCES_NBR] = {0};
|
||||
TS_Ctx_t Ts_Ctx[TS_INSTANCES_NBR] = {0};
|
||||
TS_Driver_t Ts_Driver_Type = GT911_TS_CTRL;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Exported_Functions TS Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes and configures the touch screen functionalities and
|
||||
* configures all necessary hardware resources (GPIOs, I2C, clocks..).
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param TS_Init TS Init structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_Init(uint32_t Instance, TS_Init_t *TS_Init)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if ((Instance >= TS_INSTANCES_NBR) || (TS_Init->Width == 0U) || (TS_Init->Width > TS_MAX_WIDTH) || \
|
||||
(TS_Init->Height == 0U) || (TS_Init->Height > TS_MAX_HEIGHT) || \
|
||||
(TS_Init->Accuracy > TS_MIN((TS_Init->Width), (TS_Init->Height))))
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (GT911_Probe(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
Ts_Driver_Type = FT5336_TS_CTRL;
|
||||
if (FT5336_Probe(Instance) != BSP_ERROR_NONE)
|
||||
{
|
||||
ret = BSP_ERROR_NO_INIT;
|
||||
}
|
||||
}
|
||||
if (ret == BSP_ERROR_NONE)
|
||||
{
|
||||
TS_Capabilities_t Capabilities;
|
||||
uint32_t i;
|
||||
/* Store parameters on TS context */
|
||||
Ts_Ctx[Instance].Width = TS_Init->Width;
|
||||
Ts_Ctx[Instance].Height = TS_Init->Height;
|
||||
Ts_Ctx[Instance].Orientation = TS_Init->Orientation;
|
||||
Ts_Ctx[Instance].Accuracy = TS_Init->Accuracy;
|
||||
/* Get capabilities to retrieve maximum values of X and Y */
|
||||
if (Ts_Drv->GetCapabilities(Ts_CompObj[Instance], &Capabilities) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Store maximum X and Y on context */
|
||||
Ts_Ctx[Instance].MaxX = Capabilities.MaxXl;
|
||||
Ts_Ctx[Instance].MaxY = Capabilities.MaxYl;
|
||||
/* Initialize previous position in order to always detect first touch */
|
||||
for (i = 0; i < TS_TOUCH_NBR; i++)
|
||||
{
|
||||
Ts_Ctx[Instance].PreviousX[i] = TS_Init->Width + TS_Init->Accuracy + 1U;
|
||||
Ts_Ctx[Instance].PreviousY[i] = TS_Init->Height + TS_Init->Accuracy + 1U;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief De-Initializes the touch screen functionalities
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_DeInit(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Ts_Drv->DeInit(Ts_CompObj[Instance]) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Touch Screen instance capabilities
|
||||
* @param Instance Touch Screen instance
|
||||
* @param Capabilities pointer to Touch Screen capabilities
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_GetCapabilities(uint32_t Instance, TS_Capabilities_t *Capabilities)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
(void)Ts_Drv->GetCapabilities(Ts_CompObj[Instance], Capabilities);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and enables the touch screen interrupts.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_EnableIT(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Configure Interrupt mode for TS_INT pin falling edge : when a new touch is available */
|
||||
/* TS_INT pin is active on low level on new touch available */
|
||||
gpio_init_structure.Pin = TS_INT_PIN;
|
||||
gpio_init_structure.Pull = GPIO_NOPULL;
|
||||
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
gpio_init_structure.Mode = GPIO_MODE_IT_FALLING;
|
||||
HAL_GPIO_Init(TS_INT_GPIO_PORT, &gpio_init_structure);
|
||||
|
||||
if (Ts_Drv->EnableIT(Ts_CompObj[Instance]) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (HAL_EXTI_GetHandle(&hts_exti[Instance], TS_EXTI_LINE) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else if (HAL_EXTI_RegisterCallback(&hts_exti[Instance], HAL_EXTI_COMMON_CB_ID, TS_EXTI_Callback) != HAL_OK)
|
||||
{
|
||||
ret = BSP_ERROR_PERIPH_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable and set the TS_INT EXTI Interrupt to an intermediate priority */
|
||||
HAL_NVIC_SetPriority((IRQn_Type)(TS_INT_EXTI_IRQn), BSP_TS_IT_PRIORITY, 0x00);
|
||||
HAL_NVIC_EnableIRQ((IRQn_Type)(TS_INT_EXTI_IRQn));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables the touch screen interrupts.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_DisableIT(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
GPIO_InitTypeDef gpio_init_structure;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Configure TS_INT_PIN low level to generate MFX_IRQ_OUT in EXTI on MCU */
|
||||
gpio_init_structure.Pin = TS_INT_PIN;
|
||||
HAL_GPIO_DeInit(TS_INT_GPIO_PORT, gpio_init_structure.Pin);
|
||||
|
||||
/* Disable the TS in interrupt mode */
|
||||
/* In that case the INT output of FT5336 when new touch is available */
|
||||
/* is active on low level and directed on EXTI */
|
||||
if (Ts_Drv->DisableIT(Ts_CompObj[Instance]) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief BSP TS Callback.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval None.
|
||||
*/
|
||||
__weak void BSP_TS_Callback(uint32_t Instance)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Instance);
|
||||
|
||||
/* This function should be implemented by the user application.
|
||||
It is called into this driver when an event on TS touch detection */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns positions of a single touch screen.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param TS_State Pointer to touch screen current state structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_GetState(uint32_t Instance, TS_State_t *TS_State)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint32_t x_oriented, y_oriented;
|
||||
uint32_t x_diff, y_diff;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_State_t state;
|
||||
|
||||
/* Get each touch coordinates */
|
||||
if (Ts_Drv->GetState(Ts_CompObj[Instance], &state) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}/* Check and update the number of touches active detected */
|
||||
else if (state.TouchDetected != 0U)
|
||||
{
|
||||
x_oriented = state.TouchX;
|
||||
y_oriented = state.TouchY;
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_XY) == TS_SWAP_XY)
|
||||
{
|
||||
x_oriented = state.TouchY;
|
||||
y_oriented = state.TouchX;
|
||||
}
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_X) == TS_SWAP_X)
|
||||
{
|
||||
x_oriented = Ts_Ctx[Instance].MaxX - state.TouchX - 1UL;
|
||||
}
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_Y) == TS_SWAP_Y)
|
||||
{
|
||||
y_oriented = Ts_Ctx[Instance].MaxY - state.TouchY;
|
||||
}
|
||||
|
||||
/* Apply boundary */
|
||||
TS_State->TouchX = (x_oriented * Ts_Ctx[Instance].Width) / Ts_Ctx[Instance].MaxX;
|
||||
TS_State->TouchY = (y_oriented * Ts_Ctx[Instance].Height) / Ts_Ctx[Instance].MaxY;
|
||||
/* Store Current TS state */
|
||||
TS_State->TouchDetected = state.TouchDetected;
|
||||
|
||||
/* Check accuracy */
|
||||
x_diff = (TS_State->TouchX > Ts_Ctx[Instance].PreviousX[0]) ?
|
||||
(TS_State->TouchX - Ts_Ctx[Instance].PreviousX[0]) :
|
||||
(Ts_Ctx[Instance].PreviousX[0] - TS_State->TouchX);
|
||||
|
||||
y_diff = (TS_State->TouchY > Ts_Ctx[Instance].PreviousY[0]) ?
|
||||
(TS_State->TouchY - Ts_Ctx[Instance].PreviousY[0]) :
|
||||
(Ts_Ctx[Instance].PreviousY[0] - TS_State->TouchY);
|
||||
|
||||
|
||||
if ((x_diff > Ts_Ctx[Instance].Accuracy) || (y_diff > Ts_Ctx[Instance].Accuracy))
|
||||
{
|
||||
/* New touch detected */
|
||||
Ts_Ctx[Instance].PreviousX[0] = TS_State->TouchX;
|
||||
Ts_Ctx[Instance].PreviousY[0] = TS_State->TouchY;
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_State->TouchX = Ts_Ctx[Instance].PreviousX[0];
|
||||
TS_State->TouchY = Ts_Ctx[Instance].PreviousY[0];
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_State->TouchDetected = 0U;
|
||||
TS_State->TouchX = Ts_Ctx[Instance].PreviousX[0];
|
||||
TS_State->TouchY = Ts_Ctx[Instance].PreviousY[0];
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if (USE_TS_MULTI_TOUCH > 0)
|
||||
/**
|
||||
* @brief Returns positions of multi touch screen.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param TS_State Pointer to touch screen current state structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_Get_MultiTouchState(uint32_t Instance, TS_MultiTouch_State_t *TS_State)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint32_t index;
|
||||
uint32_t x_oriented, y_oriented;
|
||||
uint32_t x_diff, y_diff;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_MultiTouch_State_t state;
|
||||
|
||||
/* Get each touch coordinates */
|
||||
if (Ts_Drv->GetMultiTouchState(Ts_CompObj[Instance], &state) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check and update the number of touches active detected */
|
||||
if (state.TouchDetected != 0U)
|
||||
{
|
||||
for (index = 0; index < state.TouchDetected; index++)
|
||||
{
|
||||
x_oriented = state.TouchX[index];
|
||||
y_oriented = state.TouchY[index];
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_XY) == TS_SWAP_XY)
|
||||
{
|
||||
x_oriented = state.TouchY[index];
|
||||
y_oriented = state.TouchX[index];
|
||||
}
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_X) == TS_SWAP_X)
|
||||
{
|
||||
x_oriented = Ts_Ctx[Instance].MaxX - state.TouchX[index] - 1UL;
|
||||
}
|
||||
|
||||
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_Y) == TS_SWAP_Y)
|
||||
{
|
||||
y_oriented = Ts_Ctx[Instance].MaxY - state.TouchY[index];
|
||||
}
|
||||
|
||||
/* Apply boundary */
|
||||
TS_State->TouchX[index] = (x_oriented * Ts_Ctx[Instance].Width) / Ts_Ctx[Instance].MaxX;
|
||||
TS_State->TouchY[index] = (y_oriented * Ts_Ctx[Instance].Height) / Ts_Ctx[Instance].MaxY;
|
||||
/* Store Current TS state */
|
||||
TS_State->TouchDetected = state.TouchDetected;
|
||||
|
||||
/* Check accuracy */
|
||||
x_diff = (TS_State->TouchX[index] > Ts_Ctx[Instance].PreviousX[index]) ?
|
||||
(TS_State->TouchX[index] - Ts_Ctx[Instance].PreviousX[index]) :
|
||||
(Ts_Ctx[Instance].PreviousX[index] - TS_State->TouchX[index]);
|
||||
|
||||
y_diff = (TS_State->TouchY[index] > Ts_Ctx[Instance].PreviousY[index]) ?
|
||||
(TS_State->TouchY[index] - Ts_Ctx[Instance].PreviousY[index]) :
|
||||
(Ts_Ctx[Instance].PreviousY[index] - TS_State->TouchY[index]);
|
||||
|
||||
if ((x_diff > Ts_Ctx[Instance].Accuracy) || (y_diff > Ts_Ctx[Instance].Accuracy))
|
||||
{
|
||||
/* New touch detected */
|
||||
Ts_Ctx[Instance].PreviousX[index] = TS_State->TouchX[index];
|
||||
Ts_Ctx[Instance].PreviousY[index] = TS_State->TouchY[index];
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_State->TouchX[index] = Ts_Ctx[Instance].PreviousX[index];
|
||||
TS_State->TouchY[index] = Ts_Ctx[Instance].PreviousY[index];
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
TS_State->TouchDetected = 0U;
|
||||
for (index = 0; index < TS_TOUCH_NBR; index++)
|
||||
{
|
||||
TS_State->TouchX[index] = Ts_Ctx[Instance].PreviousX[index];
|
||||
TS_State->TouchY[index] = Ts_Ctx[Instance].PreviousY[index];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* USE_TS_MULTI_TOUCH == 1 */
|
||||
|
||||
#if (USE_TS_GESTURE == 1)
|
||||
/**
|
||||
* @brief Update gesture Id following a touch detected.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param GestureConfig Pointer to gesture configuration structure
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_GestureConfig(uint32_t Instance, TS_Gesture_Config_t *GestureConfig)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (Ts_Drv->GestureConfig(Ts_CompObj[Instance], GestureConfig) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update gesture Id following a touch detected.
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param GestureId Pointer to gesture ID
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_GetGestureId(uint32_t Instance, uint32_t *GestureId)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
uint8_t tmp = 0;
|
||||
|
||||
if (Instance >= TS_INSTANCES_NBR)
|
||||
{
|
||||
ret = BSP_ERROR_WRONG_PARAM;
|
||||
}/* Get gesture Id */
|
||||
else if (Ts_Drv->GetGesture(Ts_CompObj[Instance], &tmp) < 0)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Remap gesture Id to a TS_Gesture_Id_t value */
|
||||
switch (tmp)
|
||||
{
|
||||
case FT5336_GEST_ID_NO_GESTURE :
|
||||
*GestureId = GESTURE_ID_NO_GESTURE;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_UP :
|
||||
*GestureId = GESTURE_ID_MOVE_UP;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_RIGHT :
|
||||
*GestureId = GESTURE_ID_MOVE_RIGHT;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_DOWN :
|
||||
*GestureId = GESTURE_ID_MOVE_DOWN;
|
||||
break;
|
||||
case FT5336_GEST_ID_MOVE_LEFT :
|
||||
*GestureId = GESTURE_ID_MOVE_LEFT;
|
||||
break;
|
||||
case FT5336_GEST_ID_ZOOM_IN :
|
||||
*GestureId = GESTURE_ID_ZOOM_IN;
|
||||
break;
|
||||
case FT5336_GEST_ID_ZOOM_OUT :
|
||||
*GestureId = GESTURE_ID_ZOOM_OUT;
|
||||
break;
|
||||
default :
|
||||
*GestureId = GESTURE_ID_NO_GESTURE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif /* USE_TS_GESTURE == 1 */
|
||||
|
||||
/**
|
||||
* @brief Set TS orientation
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param Orientation Orientation to be set
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_Set_Orientation(uint32_t Instance, uint32_t Orientation)
|
||||
{
|
||||
Ts_Ctx[Instance].Orientation = Orientation;
|
||||
return BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get TS orientation
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @param Orientation Current Orientation to be returned
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t BSP_TS_Get_Orientation(uint32_t Instance, uint32_t *Orientation)
|
||||
{
|
||||
*Orientation = Ts_Ctx[Instance].Orientation;
|
||||
return BSP_ERROR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TS interrupt request.
|
||||
* @param Instance TS instance
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_TS_IRQHandler(uint32_t Instance)
|
||||
{
|
||||
HAL_EXTI_IRQHandler(&hts_exti[Instance]);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Private_Functions TS Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Register Bus IOs if component ID is OK
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t GT911_Probe(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
GT911_IO_t IOCtx;
|
||||
static GT911_Object_t GT911Obj;
|
||||
uint32_t gt911_id = 0;
|
||||
|
||||
/* Configure the touch screen driver */
|
||||
IOCtx.Address = TS_I2C_ADDRESS_GT;
|
||||
IOCtx.Init = BSP_I2C2_Init;
|
||||
IOCtx.DeInit = BSP_I2C2_DeInit;
|
||||
IOCtx.ReadReg = BSP_I2C2_ReadReg16;
|
||||
IOCtx.WriteReg = BSP_I2C2_WriteReg16;
|
||||
IOCtx.GetTick = BSP_GetTick;
|
||||
|
||||
if (GT911_RegisterBusIO(>911Obj, &IOCtx) != GT911_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
else if (GT911_ReadID(>911Obj, >911_id) != GT911_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else if (gt911_id != GT911_ID)
|
||||
{
|
||||
ret = BSP_ERROR_UNKNOWN_COMPONENT;
|
||||
}
|
||||
else
|
||||
{
|
||||
Ts_CompObj[Instance] = >911Obj;
|
||||
Ts_Drv = (TS_Drv_t *) >911_TS_Driver;
|
||||
|
||||
if (Ts_Drv->Init(Ts_CompObj[Instance]) != GT911_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register Bus IOs if component ID is OK
|
||||
* @param Instance TS instance. Could be only 0.
|
||||
* @retval BSP status
|
||||
*/
|
||||
int32_t FT5336_Probe(uint32_t Instance)
|
||||
{
|
||||
int32_t ret = BSP_ERROR_NONE;
|
||||
FT5336_IO_t IOCtx;
|
||||
static FT5336_Object_t FT5336Obj;
|
||||
uint32_t ft5336_id = 0;
|
||||
|
||||
/* Configure the touch screen driver */
|
||||
IOCtx.Address = TS_I2C_ADDRESS;
|
||||
IOCtx.Init = BSP_I2C2_Init;
|
||||
IOCtx.DeInit = BSP_I2C2_DeInit;
|
||||
IOCtx.ReadReg = BSP_I2C2_ReadReg;
|
||||
IOCtx.WriteReg = BSP_I2C2_WriteReg;
|
||||
IOCtx.GetTick = BSP_GetTick;
|
||||
|
||||
if (FT5336_RegisterBusIO(&FT5336Obj, &IOCtx) != FT5336_OK)
|
||||
{
|
||||
ret = BSP_ERROR_BUS_FAILURE;
|
||||
}
|
||||
else if (FT5336_ReadID(&FT5336Obj, &ft5336_id) != FT5336_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
else if (ft5336_id != FT5336_ID)
|
||||
{
|
||||
ret = BSP_ERROR_UNKNOWN_COMPONENT;
|
||||
}
|
||||
else
|
||||
{
|
||||
Ts_CompObj[Instance] = &FT5336Obj;
|
||||
Ts_Drv = (TS_Drv_t *) &FT5336_TS_Driver;
|
||||
|
||||
if (Ts_Drv->Init(Ts_CompObj[Instance]) != FT5336_OK)
|
||||
{
|
||||
ret = BSP_ERROR_COMPONENT_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TS EXTI touch detection callbacks.
|
||||
* @retval None
|
||||
*/
|
||||
static void TS_EXTI_Callback(void)
|
||||
{
|
||||
BSP_TS_Callback(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,227 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7b3i_eval_ts.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains the common defines and functions prototypes for
|
||||
* the stm32h7b3i_eval_ts.c driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32H7B3I_EVAL_TS_H
|
||||
#define STM32H7B3I_EVAL_TS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7b3i_eval_conf.h"
|
||||
#include "stm32h7b3i_eval_errno.h"
|
||||
|
||||
#include "../Components/ft5336/ft5336.h"
|
||||
#include "../Components/gt911/gt911.h"
|
||||
#include "../Components/Common/ts.h"
|
||||
|
||||
/** @addtogroup BSP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_TS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Exported_Constants TS Exported Constants
|
||||
* @{
|
||||
*/
|
||||
#ifndef USE_TS_MULTI_TOUCH
|
||||
#define USE_TS_MULTI_TOUCH 1U
|
||||
#endif
|
||||
#ifndef USE_TS_GESTURE
|
||||
#define USE_TS_GESTURE 1U
|
||||
#endif
|
||||
|
||||
#ifndef TS_TOUCH_NBR
|
||||
#define TS_TOUCH_NBR 2U
|
||||
#endif
|
||||
|
||||
#define TS_INSTANCES_NBR 1U
|
||||
|
||||
/* Maximum border values of the touchscreen pad */
|
||||
#define TS_MAX_WIDTH 800U /* Touchscreen pad max width */
|
||||
#define TS_MAX_HEIGHT 480U /* Touchscreen pad max height */
|
||||
|
||||
#define TS_SWAP_NONE 0x01U
|
||||
#define TS_SWAP_X 0x02U
|
||||
#define TS_SWAP_Y 0x04U
|
||||
#define TS_SWAP_XY 0x08U
|
||||
|
||||
/**
|
||||
* @brief TouchScreen Slave I2C address 1
|
||||
*/
|
||||
#define TS_I2C_ADDRESS 0x70U
|
||||
#define TS_I2C_ADDRESS_GT 0xBAU
|
||||
#define TS_I2C_ADDRESS_BACK 0x28U
|
||||
|
||||
/**
|
||||
* @brief Touch screen interrupt signal
|
||||
*/
|
||||
#define TS_INT_PIN GPIO_PIN_2
|
||||
#define TS_INT_GPIO_PORT GPIOH
|
||||
#define TS_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define TS_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOH_CLK_DISABLE()
|
||||
#define TS_INT_EXTI_IRQn EXTI2_IRQn
|
||||
#define TS_EXTI_LINE EXTI_LINE_2
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32H7B3I_EVAL_TS_Exported_Types TS Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Width; /* Screen Width */
|
||||
uint32_t Height; /* Screen Height */
|
||||
uint32_t Orientation; /* Touch Screen orientation from the upper left position */
|
||||
uint32_t Accuracy; /* Expressed in pixel and means the x or y difference vs old
|
||||
position to consider the new values valid */
|
||||
} TS_Init_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Width;
|
||||
uint32_t Height;
|
||||
uint32_t Orientation;
|
||||
uint32_t Accuracy;
|
||||
uint32_t MaxX;
|
||||
uint32_t MaxY;
|
||||
uint32_t PreviousX[TS_TOUCH_NBR];
|
||||
uint32_t PreviousY[TS_TOUCH_NBR];
|
||||
} TS_Ctx_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t MultiTouch;
|
||||
uint8_t Gesture;
|
||||
uint8_t MaxTouch;
|
||||
uint32_t MaxXl;
|
||||
uint32_t MaxYl;
|
||||
} TS_Capabilities_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t TouchDetected;
|
||||
uint32_t TouchX;
|
||||
uint32_t TouchY;
|
||||
} TS_State_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t TouchDetected;
|
||||
uint32_t TouchX[TS_TOUCH_NBR];
|
||||
uint32_t TouchY[TS_TOUCH_NBR];
|
||||
uint32_t TouchWeight[TS_TOUCH_NBR];
|
||||
uint32_t TouchEvent[TS_TOUCH_NBR];
|
||||
uint32_t TouchArea[TS_TOUCH_NBR];
|
||||
} TS_MultiTouch_State_t;
|
||||
|
||||
#if (USE_TS_GESTURE > 0)
|
||||
/**
|
||||
* @brief TS_Gesture_Id_t
|
||||
* Define Possible managed gesture identification values returned by touch screen
|
||||
* driver.
|
||||
*/
|
||||
#define GESTURE_ID_NO_GESTURE 0x00U /*!< Gesture not defined / recognized */
|
||||
#define GESTURE_ID_MOVE_UP 0x01U /*!< Gesture Move Up */
|
||||
#define GESTURE_ID_MOVE_RIGHT 0x02U /*!< Gesture Move Right */
|
||||
#define GESTURE_ID_MOVE_DOWN 0x03U /*!< Gesture Move Down */
|
||||
#define GESTURE_ID_MOVE_LEFT 0x04U /*!< Gesture Move Left */
|
||||
#define GESTURE_ID_ZOOM_IN 0x05U /*!< Gesture Zoom In */
|
||||
#define GESTURE_ID_ZOOM_OUT 0x06U /*!< Gesture Zoom Out */
|
||||
#define GESTURE_ID_NB_MAX 0x07U /*!< max number of gesture id */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Radian;
|
||||
uint32_t OffsetLeftRight;
|
||||
uint32_t OffsetUpDown;
|
||||
uint32_t DistanceLeftRight;
|
||||
uint32_t DistanceUpDown;
|
||||
uint32_t DistanceZoom;
|
||||
} TS_Gesture_Config_t;
|
||||
|
||||
#endif /* (USE_TS_GESTURE > 0) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_TS_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern void *Ts_CompObj[TS_INSTANCES_NBR];
|
||||
extern EXTI_HandleTypeDef hts_exti[TS_INSTANCES_NBR];
|
||||
extern TS_Ctx_t Ts_Ctx[TS_INSTANCES_NBR];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7B3I_EVAL_TS_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_TS_Init(uint32_t Instance, TS_Init_t *TS_Init);
|
||||
int32_t BSP_TS_DeInit(uint32_t Instance);
|
||||
int32_t BSP_TS_EnableIT(uint32_t Instance);
|
||||
int32_t BSP_TS_DisableIT(uint32_t Instance);
|
||||
int32_t BSP_TS_GetState(uint32_t Instance, TS_State_t *TS_State);
|
||||
#if (USE_TS_MULTI_TOUCH == 1)
|
||||
int32_t BSP_TS_Get_MultiTouchState(uint32_t Instance, TS_MultiTouch_State_t *TS_State);
|
||||
#endif /* USE_TS_MULTI_TOUCH == 1 */
|
||||
#if (USE_TS_GESTURE == 1)
|
||||
int32_t BSP_TS_GestureConfig(uint32_t Instance, TS_Gesture_Config_t *GestureConfig);
|
||||
int32_t BSP_TS_GetGestureId(uint32_t Instance, uint32_t *GestureId);
|
||||
#endif /* (USE_TS_GESTURE == 1) */
|
||||
int32_t BSP_TS_Set_Orientation(uint32_t Instance, uint32_t Orientation);
|
||||
int32_t BSP_TS_Get_Orientation(uint32_t Instance, uint32_t *Orientation);
|
||||
int32_t BSP_TS_GetCapabilities(uint32_t Instance, TS_Capabilities_t *Capabilities);
|
||||
void BSP_TS_Callback(uint32_t Instance);
|
||||
void BSP_TS_IRQHandler(uint32_t Instance);
|
||||
int32_t GT911_Probe(uint32_t Instance);
|
||||
int32_t FT5336_Probe(uint32_t Instance);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32H7B3I_EVAL_TS_H */
|
||||
Reference in New Issue
Block a user