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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module uart
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _uart1_isr
12 .globl _EADC
13 .globl _ET1
14 .globl _ET0
15 .globl _ES
16 .globl _EA
17 .globl _REN
18 .globl _RI
19 .globl _TI
20 .globl _TR1
21 .globl _TF1
22 .globl _IT0
23 .globl _IE0
24 .globl _TR0
25 .globl _TF0
26 .globl _CMPCR2
27 .globl _CMPCR1
28 .globl _TA
29 .globl _IRCBAND_REG
30 .globl _IAP_TPS
31 .globl _IAP_CONTR
32 .globl _IAP_TRIG
33 .globl _IAP_CMD
34 .globl _IAP_ADDRL
35 .globl _IAP_ADDRH
36 .globl _IAP_DATA
37 .globl _WDT_CONTR
38 .globl _PCA_PWM3
39 .globl _PCA_PWM2
40 .globl _PCA_PWM1
41 .globl _PCA_PWM0
42 .globl _CCAP3L
43 .globl _CCAP2L
44 .globl _CCAP1L
45 .globl _CCAP0L
46 .globl _CCAPM3
47 .globl _CCAPM2
48 .globl _CCAPM1
49 .globl _CCAPM0
50 .globl _CMOD
51 .globl _CCON
52 .globl _ADCTIM_X
53 .globl _ADCCFG
54 .globl _ADC_RESL
55 .globl _ADC_RES
56 .globl _ADC_CONTR
57 .globl _SPDAT
58 .globl _SPCTL
59 .globl _SPSTAT
60 .globl _IP2H
61 .globl _IP2
62 .globl _IP
63 .globl _IE2
64 .globl _IE
65 .globl _BRT
66 .globl _P_SW1
67 .globl _SADEN
68 .globl _SADDR
69 .globl _S2BUF
70 .globl _S2CON
71 .globl _SBUF
72 .globl _SCON
73 .globl _TM4PS_X
74 .globl _TM3PS_X
75 .globl _TM2PS_X
76 .globl _T4T3M
77 .globl _T4L
78 .globl _T4H
79 .globl _T3L
80 .globl _T3H
81 .globl _T2L
82 .globl _T2H
83 .globl _INTCLKO
84 .globl _AUXR
85 .globl _TH1
86 .globl _TH0
87 .globl _TL1
88 .globl _TL0
89 .globl _TMOD
90 .globl _TCON
91 .globl _P_SW2
92 .globl _P5M0
93 .globl _P5M1
94 .globl _P4M0
95 .globl _P4M1
96 .globl _P3M0
97 .globl _P3M1
98 .globl _P2M0
99 .globl _P2M1
100 .globl _P1M0
101 .globl _P1M1
102 .globl _P0M0
103 .globl _P0M1
104 .globl _PSW
105 .globl _B
106 .globl _ACC
107 .globl _PCON
108 .globl _DPH
109 .globl _DPL
110 .globl _SP
111 .globl _P5
112 .globl _P4
113 .globl _P3
114 .globl _P2
115 .globl _P1
116 .globl _P0
117 .globl _g_uart1_rx_tail
118 .globl _g_uart1_rx_head
119 .globl _g_uart1_rx_buf
120 .globl _uart1_send_bytes_PARM_2
121 .globl _uart1_init
122 .globl _uart1_send_byte
123 .globl _uart1_send_bytes
124 .globl _uart1_rx_available
125 .globl _uart1_read_byte
126 ;--------------------------------------------------------
127 ; special function registers
128 ;--------------------------------------------------------
129 .area RSEG (ABS,DATA)
000000 130 .org 0x0000
000080 131 _P0 = 0x0080
000090 132 _P1 = 0x0090
0000A0 133 _P2 = 0x00a0
0000B0 134 _P3 = 0x00b0
0000C0 135 _P4 = 0x00c0
0000C8 136 _P5 = 0x00c8
000081 137 _SP = 0x0081
000082 138 _DPL = 0x0082
000083 139 _DPH = 0x0083
000087 140 _PCON = 0x0087
0000E0 141 _ACC = 0x00e0
0000F0 142 _B = 0x00f0
0000D0 143 _PSW = 0x00d0
000093 144 _P0M1 = 0x0093
000094 145 _P0M0 = 0x0094
000091 146 _P1M1 = 0x0091
000092 147 _P1M0 = 0x0092
000095 148 _P2M1 = 0x0095
000096 149 _P2M0 = 0x0096
0000B1 150 _P3M1 = 0x00b1
0000B2 151 _P3M0 = 0x00b2
0000B3 152 _P4M1 = 0x00b3
0000B4 153 _P4M0 = 0x00b4
0000C9 154 _P5M1 = 0x00c9
0000CA 155 _P5M0 = 0x00ca
0000BA 156 _P_SW2 = 0x00ba
000088 157 _TCON = 0x0088
000089 158 _TMOD = 0x0089
00008A 159 _TL0 = 0x008a
00008B 160 _TL1 = 0x008b
00008C 161 _TH0 = 0x008c
00008D 162 _TH1 = 0x008d
00008E 163 _AUXR = 0x008e
00008F 164 _INTCLKO = 0x008f
0000D6 165 _T2H = 0x00d6
0000D7 166 _T2L = 0x00d7
0000D4 167 _T3H = 0x00d4
0000D5 168 _T3L = 0x00d5
0000D2 169 _T4H = 0x00d2
0000D3 170 _T4L = 0x00d3
0000D1 171 _T4T3M = 0x00d1
00FEA1 172 _TM2PS_X = 0xfea1
00FEA2 173 _TM3PS_X = 0xfea2
00FEA3 174 _TM4PS_X = 0xfea3
000098 175 _SCON = 0x0098
000099 176 _SBUF = 0x0099
00009A 177 _S2CON = 0x009a
00009B 178 _S2BUF = 0x009b
0000A9 179 _SADDR = 0x00a9
0000B9 180 _SADEN = 0x00b9
0000A2 181 _P_SW1 = 0x00a2
00009C 182 _BRT = 0x009c
0000A8 183 _IE = 0x00a8
0000AF 184 _IE2 = 0x00af
0000B8 185 _IP = 0x00b8
0000B6 186 _IP2 = 0x00b6
0000B7 187 _IP2H = 0x00b7
0000CD 188 _SPSTAT = 0x00cd
0000CE 189 _SPCTL = 0x00ce
0000CF 190 _SPDAT = 0x00cf
0000BC 191 _ADC_CONTR = 0x00bc
0000BD 192 _ADC_RES = 0x00bd
0000BE 193 _ADC_RESL = 0x00be
0000DE 194 _ADCCFG = 0x00de
00FEA8 195 _ADCTIM_X = 0xfea8
0000D8 196 _CCON = 0x00d8
0000D9 197 _CMOD = 0x00d9
0000DA 198 _CCAPM0 = 0x00da
0000DB 199 _CCAPM1 = 0x00db
0000DC 200 _CCAPM2 = 0x00dc
0000DD 201 _CCAPM3 = 0x00dd
0000EA 202 _CCAP0L = 0x00ea
0000EB 203 _CCAP1L = 0x00eb
0000EC 204 _CCAP2L = 0x00ec
0000ED 205 _CCAP3L = 0x00ed
0000F2 206 _PCA_PWM0 = 0x00f2
0000F3 207 _PCA_PWM1 = 0x00f3
0000F4 208 _PCA_PWM2 = 0x00f4
0000F5 209 _PCA_PWM3 = 0x00f5
0000C1 210 _WDT_CONTR = 0x00c1
0000C2 211 _IAP_DATA = 0x00c2
0000C3 212 _IAP_ADDRH = 0x00c3
0000C4 213 _IAP_ADDRL = 0x00c4
0000C5 214 _IAP_CMD = 0x00c5
0000C6 215 _IAP_TRIG = 0x00c6
0000C7 216 _IAP_CONTR = 0x00c7
0000F7 217 _IAP_TPS = 0x00f7
00009D 218 _IRCBAND_REG = 0x009d
0000AE 219 _TA = 0x00ae
0000E6 220 _CMPCR1 = 0x00e6
0000E7 221 _CMPCR2 = 0x00e7
222 ;--------------------------------------------------------
223 ; special function bits
224 ;--------------------------------------------------------
225 .area RSEG (ABS,DATA)
000000 226 .org 0x0000
00008D 227 _TF0 = 0x008d
00008C 228 _TR0 = 0x008c
000089 229 _IE0 = 0x0089
000088 230 _IT0 = 0x0088
00008F 231 _TF1 = 0x008f
00008E 232 _TR1 = 0x008e
000099 233 _TI = 0x0099
000098 234 _RI = 0x0098
00009C 235 _REN = 0x009c
0000AF 236 _EA = 0x00af
0000AC 237 _ES = 0x00ac
0000A9 238 _ET0 = 0x00a9
0000AB 239 _ET1 = 0x00ab
0000AD 240 _EADC = 0x00ad
241 ;--------------------------------------------------------
242 ; overlayable register banks
243 ;--------------------------------------------------------
244 .area REG_BANK_0 (REL,OVR,DATA)
000000 245 .ds 8
246 ;--------------------------------------------------------
247 ; overlayable bit register bank
248 ;--------------------------------------------------------
249 .area BIT_BANK (REL,OVR,DATA)
000000 250 bits:
000000 251 .ds 1
008000 252 b0 = bits[0]
008100 253 b1 = bits[1]
008200 254 b2 = bits[2]
008300 255 b3 = bits[3]
008400 256 b4 = bits[4]
008500 257 b5 = bits[5]
008600 258 b6 = bits[6]
008700 259 b7 = bits[7]
260 ;--------------------------------------------------------
261 ; internal ram data
262 ;--------------------------------------------------------
263 .area DSEG (DATA)
000000 264 _uart1_send_bytes_PARM_2:
000000 265 .ds 1
266 ;--------------------------------------------------------
267 ; overlayable items in internal ram
268 ;--------------------------------------------------------
269 .area OSEG (OVR,DATA)
270 ;--------------------------------------------------------
271 ; indirectly addressable internal ram data
272 ;--------------------------------------------------------
273 .area ISEG (DATA)
274 ;--------------------------------------------------------
275 ; absolute internal ram data
276 ;--------------------------------------------------------
277 .area IABS (ABS,DATA)
278 .area IABS (ABS,DATA)
279 ;--------------------------------------------------------
280 ; bit data
281 ;--------------------------------------------------------
282 .area BSEG (BIT)
000000 283 _uart1_rx_available_sloc0_1_0:
000000 284 .ds 1
285 ;--------------------------------------------------------
286 ; paged external ram data
287 ;--------------------------------------------------------
288 .area PSEG (PAG,XDATA)
289 ;--------------------------------------------------------
290 ; external ram data
291 ;--------------------------------------------------------
292 .area XSEG (XDATA)
000000 293 _g_uart1_rx_buf::
000000 294 .ds 64
295 ;--------------------------------------------------------
296 ; absolute external ram data
297 ;--------------------------------------------------------
298 .area XABS (ABS,XDATA)
299 ;--------------------------------------------------------
300 ; external initialized ram data
301 ;--------------------------------------------------------
302 .area XISEG (XDATA)
000000 303 _g_uart1_rx_head::
000000 304 .ds 1
000001 305 _g_uart1_rx_tail::
000001 306 .ds 1
307 .area HOME (CODE)
308 .area GSINIT0 (CODE)
309 .area GSINIT1 (CODE)
310 .area GSINIT2 (CODE)
311 .area GSINIT3 (CODE)
312 .area GSINIT4 (CODE)
313 .area GSINIT5 (CODE)
314 .area GSINIT (CODE)
315 .area GSFINAL (CODE)
316 .area CSEG (CODE)
317 ;--------------------------------------------------------
318 ; global & static initialisations
319 ;--------------------------------------------------------
320 .area HOME (CODE)
321 .area GSINIT (CODE)
322 .area GSFINAL (CODE)
323 .area GSINIT (CODE)
324 ;--------------------------------------------------------
325 ; Home
326 ;--------------------------------------------------------
327 .area HOME (CODE)
328 .area HOME (CODE)
329 ;--------------------------------------------------------
330 ; code
331 ;--------------------------------------------------------
332 .area CSEG (CODE)
333 ;------------------------------------------------------------
334 ;Allocation info for local variables in function 'uart1_init'
335 ;------------------------------------------------------------
336 ;baud Allocated to registers r4 r5 r6 r7
337 ;b Allocated to registers
338 ;------------------------------------------------------------
339 ; src/uart.c:17: void uart1_init(uint32_t baud)
340 ; -----------------------------------------
341 ; function uart1_init
342 ; -----------------------------------------
000000 343 _uart1_init:
000007 344 ar7 = 0x07
000006 345 ar6 = 0x06
000005 346 ar5 = 0x05
000004 347 ar4 = 0x04
000003 348 ar3 = 0x03
000002 349 ar2 = 0x02
000001 350 ar1 = 0x01
000000 351 ar0 = 0x00
000000 AC 82 [24] 352 mov r4,dpl
000002 AD 83 [24] 353 mov r5,dph
000004 AE F0 [24] 354 mov r6,b
000006 FF [12] 355 mov r7,a
356 ; src/uart.c:20: P3M0 |= 0x02; /* P3.1 推挽输出 */
000007 43 B2 02 [24] 357 orl _P3M0,#0x02
358 ; src/uart.c:21: P3M1 &= ~0x02;
00000A 53 B1 FD [24] 359 anl _P3M1,#0xfd
360 ; src/uart.c:22: P3M0 &= ~0x01; /* P3.0 准双向(默认上拉) */
00000D 53 B2 FE [24] 361 anl _P3M0,#0xfe
362 ; src/uart.c:23: P3M1 &= ~0x01;
000010 53 B1 FE [24] 363 anl _P3M1,#0xfe
364 ; src/uart.c:26: P_SW1 &= ~0x03;
000013 53 A2 FC [24] 365 anl _P_SW1,#0xfc
366 ; src/uart.c:28: SCON = 0x50; /* 模式 1 (8 位数据,可变波特率) + REN */
000016 75 98 50 [24] 367 mov _SCON,#0x50
368 ; src/uart.c:39: b = 256 - (uint16_t)(SYS_CLK_HZ / 16 / baud);
000019 8C*00 [24] 369 mov __divulong_PARM_2,r4
00001B 8D*01 [24] 370 mov (__divulong_PARM_2 + 1),r5
00001D 8E*02 [24] 371 mov (__divulong_PARM_2 + 2),r6
00001F 8F*03 [24] 372 mov (__divulong_PARM_2 + 3),r7
000021 90 E3 60 [24] 373 mov dptr,#0xe360
000024 75 F0 16 [24] 374 mov b,#0x16
000027 E4 [12] 375 clr a
000028 12r00r00 [24] 376 lcall __divulong
00002B AC 82 [24] 377 mov r4,dpl
00002D C3 [12] 378 clr c
00002E E4 [12] 379 clr a
00002F 9C [12] 380 subb a,r4
000030 F5 9C [12] 381 mov _BRT,a
382 ; src/uart.c:42: AUXR |= 0x10; /* S1ST2 = 1: T2 为波特率 (不用) — 实际不用 */
000032 43 8E 10 [24] 383 orl _AUXR,#0x10
384 ; src/uart.c:44: AUXR &= ~0x10; /* S1ST2 = 0: T1 为波特率(传统) */
000035 53 8E EF [24] 385 anl _AUXR,#0xef
386 ; src/uart.c:45: AUXR |= 0x01; /* S1BRT = 1: UART1 使用 BRT */
000038 43 8E 01 [24] 387 orl _AUXR,#0x01
388 ; src/uart.c:48: ES = 1;
389 ; assignBit
00003B D2 AC [12] 390 setb _ES
391 ; src/uart.c:49: EA = 1;
392 ; assignBit
00003D D2 AF [12] 393 setb _EA
394 ; src/uart.c:50: }
00003F 22 [24] 395 ret
396 ;------------------------------------------------------------
397 ;Allocation info for local variables in function 'uart1_send_byte'
398 ;------------------------------------------------------------
399 ;b Allocated to registers r7
400 ;------------------------------------------------------------
401 ; src/uart.c:52: void uart1_send_byte(uint8_t b)
402 ; -----------------------------------------
403 ; function uart1_send_byte
404 ; -----------------------------------------
000040 405 _uart1_send_byte:
000040 AF 82 [24] 406 mov r7,dpl
407 ; src/uart.c:54: while (!TI);
000042 408 00101$:
409 ; src/uart.c:55: TI = 0;
410 ; assignBit
000042 10 99 02 [24] 411 jbc _TI,00114$
000045 80 FB [24] 412 sjmp 00101$
000047 413 00114$:
414 ; src/uart.c:56: SBUF = b;
000047 8F 99 [24] 415 mov _SBUF,r7
416 ; src/uart.c:57: }
000049 22 [24] 417 ret
418 ;------------------------------------------------------------
419 ;Allocation info for local variables in function 'uart1_send_bytes'
420 ;------------------------------------------------------------
421 ;len Allocated with name '_uart1_send_bytes_PARM_2'
422 ;buf Allocated to registers
423 ;------------------------------------------------------------
424 ; src/uart.c:59: void uart1_send_bytes(const uint8_t *buf, uint8_t len)
425 ; -----------------------------------------
426 ; function uart1_send_bytes
427 ; -----------------------------------------
00004A 428 _uart1_send_bytes:
00004A AD 82 [24] 429 mov r5,dpl
00004C AE 83 [24] 430 mov r6,dph
00004E AF F0 [24] 431 mov r7,b
432 ; src/uart.c:61: while (len--) uart1_send_byte(*buf++);
000050 AC*00 [24] 433 mov r4,_uart1_send_bytes_PARM_2
000052 434 00101$:
000052 8C 03 [24] 435 mov ar3,r4
000054 1C [12] 436 dec r4
000055 EB [12] 437 mov a,r3
000056 60 26 [24] 438 jz 00104$
000058 8D 82 [24] 439 mov dpl,r5
00005A 8E 83 [24] 440 mov dph,r6
00005C 8F F0 [24] 441 mov b,r7
00005E 12r00r00 [24] 442 lcall __gptrget
000061 FB [12] 443 mov r3,a
000062 A3 [24] 444 inc dptr
000063 AD 82 [24] 445 mov r5,dpl
000065 AE 83 [24] 446 mov r6,dph
000067 8B 82 [24] 447 mov dpl,r3
000069 C0 07 [24] 448 push ar7
00006B C0 06 [24] 449 push ar6
00006D C0 05 [24] 450 push ar5
00006F C0 04 [24] 451 push ar4
000071 12r00r40 [24] 452 lcall _uart1_send_byte
000074 D0 04 [24] 453 pop ar4
000076 D0 05 [24] 454 pop ar5
000078 D0 06 [24] 455 pop ar6
00007A D0 07 [24] 456 pop ar7
00007C 80 D4 [24] 457 sjmp 00101$
00007E 458 00104$:
459 ; src/uart.c:62: }
00007E 22 [24] 460 ret
461 ;------------------------------------------------------------
462 ;Allocation info for local variables in function 'uart1_rx_available'
463 ;------------------------------------------------------------
464 ; src/uart.c:64: uint8_t uart1_rx_available(void)
465 ; -----------------------------------------
466 ; function uart1_rx_available
467 ; -----------------------------------------
00007F 468 _uart1_rx_available:
469 ; src/uart.c:66: return (g_uart1_rx_head != g_uart1_rx_tail);
00007F 90r00r00 [24] 470 mov dptr,#_g_uart1_rx_head
000082 E0 [24] 471 movx a,@dptr
000083 FF [12] 472 mov r7,a
000084 90r00r01 [24] 473 mov dptr,#_g_uart1_rx_tail
000087 E0 [24] 474 movx a,@dptr
000088 FE [12] 475 mov r6,a
000089 EF [12] 476 mov a,r7
00008A B5 06 03 [24] 477 cjne a,ar6,00103$
00008D D3 [12] 478 setb c
00008E 80 01 [24] 479 sjmp 00104$
000090 480 00103$:
000090 C3 [12] 481 clr c
000091 482 00104$:
000091 B3 [12] 483 cpl c
000092 92*00 [24] 484 mov _uart1_rx_available_sloc0_1_0,c
000094 E4 [12] 485 clr a
000095 33 [12] 486 rlc a
000096 F5 82 [12] 487 mov dpl,a
488 ; src/uart.c:67: }
000098 22 [24] 489 ret
490 ;------------------------------------------------------------
491 ;Allocation info for local variables in function 'uart1_read_byte'
492 ;------------------------------------------------------------
493 ;b Allocated to registers r7
494 ;------------------------------------------------------------
495 ; src/uart.c:69: uint8_t uart1_read_byte(void)
496 ; -----------------------------------------
497 ; function uart1_read_byte
498 ; -----------------------------------------
000099 499 _uart1_read_byte:
500 ; src/uart.c:71: if (g_uart1_rx_head == g_uart1_rx_tail) return 0;
000099 90r00r00 [24] 501 mov dptr,#_g_uart1_rx_head
00009C E0 [24] 502 movx a,@dptr
00009D FF [12] 503 mov r7,a
00009E 90r00r01 [24] 504 mov dptr,#_g_uart1_rx_tail
0000A1 E0 [24] 505 movx a,@dptr
0000A2 FE [12] 506 mov r6,a
0000A3 EF [12] 507 mov a,r7
0000A4 B5 06 04 [24] 508 cjne a,ar6,00102$
0000A7 75 82 00 [24] 509 mov dpl,#0x00
0000AA 22 [24] 510 ret
0000AB 511 00102$:
512 ; src/uart.c:72: uint8_t b = g_uart1_rx_buf[g_uart1_rx_tail];
0000AB 90r00r01 [24] 513 mov dptr,#_g_uart1_rx_tail
0000AE E0 [24] 514 movx a,@dptr
0000AF 24r00 [12] 515 add a,#_g_uart1_rx_buf
0000B1 F5 82 [12] 516 mov dpl,a
0000B3 E4 [12] 517 clr a
0000B4 34s00 [12] 518 addc a,#(_g_uart1_rx_buf >> 8)
0000B6 F5 83 [12] 519 mov dph,a
0000B8 E0 [24] 520 movx a,@dptr
0000B9 FF [12] 521 mov r7,a
522 ; src/uart.c:73: g_uart1_rx_tail = (g_uart1_rx_tail + 1) % UART1_RX_BUF_SIZE;
0000BA 90r00r01 [24] 523 mov dptr,#_g_uart1_rx_tail
0000BD E0 [24] 524 movx a,@dptr
0000BE FE [12] 525 mov r6,a
0000BF 7D 00 [12] 526 mov r5,#0x00
0000C1 8E 82 [24] 527 mov dpl,r6
0000C3 8D 83 [24] 528 mov dph,r5
0000C5 A3 [24] 529 inc dptr
0000C6 75*00 40 [24] 530 mov __modsint_PARM_2,#0x40
531 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
0000C9 8D*01 [24] 532 mov (__modsint_PARM_2 + 1),r5
0000CB C0 07 [24] 533 push ar7
0000CD 12r00r00 [24] 534 lcall __modsint
0000D0 AD 82 [24] 535 mov r5,dpl
0000D2 D0 07 [24] 536 pop ar7
0000D4 90r00r01 [24] 537 mov dptr,#_g_uart1_rx_tail
0000D7 ED [12] 538 mov a,r5
0000D8 F0 [24] 539 movx @dptr,a
540 ; src/uart.c:74: return b;
0000D9 8F 82 [24] 541 mov dpl,r7
542 ; src/uart.c:75: }
0000DB 22 [24] 543 ret
544 ;------------------------------------------------------------
545 ;Allocation info for local variables in function 'uart1_isr'
546 ;------------------------------------------------------------
547 ;next Allocated to registers r6
548 ;------------------------------------------------------------
549 ; src/uart.c:78: void uart1_isr(void) __interrupt (INT_ADDR_UART1)
550 ; -----------------------------------------
551 ; function uart1_isr
552 ; -----------------------------------------
0000DC 553 _uart1_isr:
0000DC C0*00 [24] 554 push bits
0000DE C0 E0 [24] 555 push acc
0000E0 C0 F0 [24] 556 push b
0000E2 C0 82 [24] 557 push dpl
0000E4 C0 83 [24] 558 push dph
0000E6 C0 07 [24] 559 push (0+7)
0000E8 C0 06 [24] 560 push (0+6)
0000EA C0 05 [24] 561 push (0+5)
0000EC C0 04 [24] 562 push (0+4)
0000EE C0 03 [24] 563 push (0+3)
0000F0 C0 02 [24] 564 push (0+2)
0000F2 C0 01 [24] 565 push (0+1)
0000F4 C0 00 [24] 566 push (0+0)
0000F6 C0 D0 [24] 567 push psw
0000F8 75 D0 00 [24] 568 mov psw,#0x00
569 ; src/uart.c:80: if (RI) {
570 ; src/uart.c:81: RI = 0;
571 ; assignBit
0000FB 10 98 02 [24] 572 jbc _RI,00121$
0000FE 80 37 [24] 573 sjmp 00104$
000100 574 00121$:
575 ; src/uart.c:82: uint8_t next = (g_uart1_rx_head + 1) % UART1_RX_BUF_SIZE;
000100 90r00r00 [24] 576 mov dptr,#_g_uart1_rx_head
000103 E0 [24] 577 movx a,@dptr
000104 FF [12] 578 mov r7,a
000105 7E 00 [12] 579 mov r6,#0x00
000107 8F 82 [24] 580 mov dpl,r7
000109 8E 83 [24] 581 mov dph,r6
00010B A3 [24] 582 inc dptr
00010C 75*00 40 [24] 583 mov __modsint_PARM_2,#0x40
584 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
00010F 8E*01 [24] 585 mov (__modsint_PARM_2 + 1),r6
000111 12r00r00 [24] 586 lcall __modsint
000114 AE 82 [24] 587 mov r6,dpl
588 ; src/uart.c:83: if (next != g_uart1_rx_tail) {
000116 90r00r01 [24] 589 mov dptr,#_g_uart1_rx_tail
000119 E0 [24] 590 movx a,@dptr
00011A FF [12] 591 mov r7,a
00011B EE [12] 592 mov a,r6
00011C B5 07 02 [24] 593 cjne a,ar7,00122$
00011F 80 16 [24] 594 sjmp 00104$
000121 595 00122$:
596 ; src/uart.c:84: g_uart1_rx_buf[g_uart1_rx_head] = SBUF;
000121 90r00r00 [24] 597 mov dptr,#_g_uart1_rx_head
000124 E0 [24] 598 movx a,@dptr
000125 FF [12] 599 mov r7,a
000126 24r00 [12] 600 add a,#_g_uart1_rx_buf
000128 F5 82 [12] 601 mov dpl,a
00012A E4 [12] 602 clr a
00012B 34s00 [12] 603 addc a,#(_g_uart1_rx_buf >> 8)
00012D F5 83 [12] 604 mov dph,a
00012F E5 99 [12] 605 mov a,_SBUF
000131 F0 [24] 606 movx @dptr,a
607 ; src/uart.c:85: g_uart1_rx_head = next;
000132 90r00r00 [24] 608 mov dptr,#_g_uart1_rx_head
000135 EE [12] 609 mov a,r6
000136 F0 [24] 610 movx @dptr,a
000137 611 00104$:
612 ; src/uart.c:88: if (TI) {
613 ; src/uart.c:89: TI = 0;
614 ; assignBit
000137 10 99 02 [24] 615 jbc _TI,00123$
00013A 80 00 [24] 616 sjmp 00107$
00013C 617 00123$:
00013C 618 00107$:
619 ; src/uart.c:91: }
00013C D0 D0 [24] 620 pop psw
00013E D0 00 [24] 621 pop (0+0)
000140 D0 01 [24] 622 pop (0+1)
000142 D0 02 [24] 623 pop (0+2)
000144 D0 03 [24] 624 pop (0+3)
000146 D0 04 [24] 625 pop (0+4)
000148 D0 05 [24] 626 pop (0+5)
00014A D0 06 [24] 627 pop (0+6)
00014C D0 07 [24] 628 pop (0+7)
00014E D0 83 [24] 629 pop dph
000150 D0 82 [24] 630 pop dpl
000152 D0 F0 [24] 631 pop b
000154 D0 E0 [24] 632 pop acc
000156 D0*00 [24] 633 pop bits
000158 32 [24] 634 reti
635 .area CSEG (CODE)
636 .area CONST (CODE)
000000 637 _DEFAULT_ADDR:
000000 E7 638 .db #0xe7 ; 231
000001 E7 639 .db #0xe7 ; 231
000002 E7 640 .db #0xe7 ; 231
000003 E7 641 .db #0xe7 ; 231
000004 C2 642 .db #0xc2 ; 194
643 .area XINIT (CODE)
000000 644 __xinit__g_uart1_rx_head:
000000 00 645 .db #0x00 ; 0
000001 646 __xinit__g_uart1_rx_tail:
000001 00 647 .db #0x00 ; 0
648 .area CABS (ABS,CODE)