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16 KiB
NASM

;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module pwm
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _pwm_tick_isr
.globl _gpio_write
.globl _gpio_set_mode
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _pwm_set_from_sbus_PARM_2
.globl _pwm_set_PARM_2
.globl _pwm_init
.globl _pwm_set
.globl _pwm_set_from_sbus
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; overlayable bit register bank
;--------------------------------------------------------
.area BIT_BANK (REL,OVR,DATA)
bits:
.ds 1
b0 = bits[0]
b1 = bits[1]
b2 = bits[2]
b3 = bits[3]
b4 = bits[4]
b5 = bits[5]
b6 = bits[6]
b7 = bits[7]
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_pwm_set_PARM_2:
.ds 2
_pwm_set_from_sbus_PARM_2:
.ds 2
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
_s_high_remain:
.ds 4
_s_period_cnt:
.ds 2
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_init'
;------------------------------------------------------------
;i Allocated to registers r7
;------------------------------------------------------------
; src/pwm.c:30: void pwm_init(void)
; -----------------------------------------
; function pwm_init
; -----------------------------------------
_pwm_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00102$:
; src/pwm.c:34: s_high_remain[i] = 1500 / PWM_UNIT_US; /* 默认 1500us 中位 */
mov a,r7
add a,#_s_high_remain
mov dpl,a
clr a
addc a,#(_s_high_remain >> 8)
mov dph,a
mov a,#0x4b
movx @dptr,a
; src/pwm.c:35: gpio_set_mode(CH_PORT[i], CH_BIT[i], GPIO_MODE_PUSHPULL);
mov a,r7
add a,#_CH_PORT
mov r5,a
clr a
addc a,#(_CH_PORT >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
clr a
movc a,@a+dptr
mov r4,a
mov a,r7
add a,#_CH_BIT
mov r2,a
clr a
addc a,#(_CH_BIT >> 8)
mov r3,a
mov dpl,r2
mov dph,r3
clr a
movc a,@a+dptr
mov _gpio_set_mode_PARM_2,a
mov _gpio_set_mode_PARM_3,#0x01
mov dpl,r4
push ar7
push ar6
push ar5
push ar3
push ar2
lcall _gpio_set_mode
pop ar2
pop ar3
pop ar5
pop ar6
; src/pwm.c:36: gpio_write(CH_PORT[i], CH_BIT[i], 0);
mov dpl,r5
mov dph,r6
clr a
movc a,@a+dptr
mov r5,a
mov dpl,r2
mov dph,r3
clr a
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x00
mov dpl,r5
lcall _gpio_write
pop ar7
; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00115$
00115$:
jc 00102$
; src/pwm.c:38: s_period_cnt = 0;
mov dptr,#_s_period_cnt
clr a
movx @dptr,a
inc dptr
movx @dptr,a
; src/pwm.c:41: TMOD &= 0xF0;
anl _TMOD,#0xf0
; src/pwm.c:42: TMOD |= 0x00; /* T0 模式 0 (16 位自动重载) */
mov _TMOD,_TMOD
; src/pwm.c:44: AUXR &= ~0x80; /* T0x12 = 0: 12T 模式 → 24MHz/12 = 2MHz */
anl _AUXR,#0x7f
; src/pwm.c:46: AUXR |= 0x80; /* T0x12 = 1: 1T 模式 → 24MHz */
orl _AUXR,#0x80
; src/pwm.c:49: TL0 = 0x40;
mov _TL0,#0x40
; src/pwm.c:50: TH0 = 0xFE;
mov _TH0,#0xfe
; src/pwm.c:52: ET0 = 1; /* 使能 T0 中断 */
; assignBit
setb _ET0
; src/pwm.c:53: TR0 = 1; /* 启动 T0 */
; assignBit
setb _TR0
; src/pwm.c:54: EA = 1;
; assignBit
setb _EA
; src/pwm.c:55: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_set'
;------------------------------------------------------------
;width_us Allocated with name '_pwm_set_PARM_2'
;ch Allocated to registers r7
;cnt Allocated to registers
;------------------------------------------------------------
; src/pwm.c:57: void pwm_set(uint8_t ch, uint16_t width_us)
; -----------------------------------------
; function pwm_set
; -----------------------------------------
_pwm_set:
mov r7,dpl
; src/pwm.c:59: if (ch >= CH_COUNT) return;
cjne r7,#0x04,00121$
00121$:
jc 00102$
ret
00102$:
; src/pwm.c:61: if (width_us < 800) width_us = 800;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
clr c
mov a,r5
subb a,#0x20
mov a,r6
subb a,#0x03
jnc 00104$
mov _pwm_set_PARM_2,#0x20
mov (_pwm_set_PARM_2 + 1),#0x03
00104$:
; src/pwm.c:62: if (width_us > 2200) width_us = 2200;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
clr c
mov a,#0x98
subb a,r5
mov a,#0x08
subb a,r6
jnc 00106$
mov _pwm_set_PARM_2,#0x98
mov (_pwm_set_PARM_2 + 1),#0x08
00106$:
; src/pwm.c:64: uint16_t cnt = (width_us + PWM_UNIT_US / 2) / PWM_UNIT_US;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
mov a,#0x0a
add a,r5
mov dpl,a
clr a
addc a,r6
mov dph,a
mov __divuint_PARM_2,#0x14
mov (__divuint_PARM_2 + 1),#0x00
push ar7
lcall __divuint
mov r5,dpl
pop ar7
; src/pwm.c:65: CRITICAL(s_high_remain[ch] = cnt;);
; assignBit
clr _EA
mov a,r7
add a,#_s_high_remain
mov dpl,a
clr a
addc a,#(_s_high_remain >> 8)
mov dph,a
mov a,r5
movx @dptr,a
; assignBit
setb _EA
; src/pwm.c:66: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_set_from_sbus'
;------------------------------------------------------------
;sbus_val Allocated with name '_pwm_set_from_sbus_PARM_2'
;ch Allocated to registers r7
;offset Allocated to registers
;width Allocated to registers r3 r4
;------------------------------------------------------------
; src/pwm.c:68: void pwm_set_from_sbus(uint8_t ch, uint16_t sbus_val)
; -----------------------------------------
; function pwm_set_from_sbus
; -----------------------------------------
_pwm_set_from_sbus:
mov r7,dpl
; src/pwm.c:72: if (sbus_val < 172) sbus_val = 172;
mov r5,_pwm_set_from_sbus_PARM_2
mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
clr c
mov a,r5
subb a,#0xac
mov a,r6
subb a,#0x00
jnc 00102$
mov _pwm_set_from_sbus_PARM_2,#0xac
mov (_pwm_set_from_sbus_PARM_2 + 1),#0x00
00102$:
; src/pwm.c:73: if (sbus_val > 1811) sbus_val = 1811;
mov r5,_pwm_set_from_sbus_PARM_2
mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
clr c
mov a,#0x13
subb a,r5
mov a,#0x07
subb a,r6
jnc 00104$
mov _pwm_set_from_sbus_PARM_2,#0x13
mov (_pwm_set_from_sbus_PARM_2 + 1),#0x07
00104$:
; src/pwm.c:74: int32_t offset = (int32_t)sbus_val - 1024; /* -852..787 */
mov r3,_pwm_set_from_sbus_PARM_2
mov r4,(_pwm_set_from_sbus_PARM_2 + 1)
mov r5,#0x00
mov r6,#0x00
mov __mullong_PARM_2,r3
mov a,r4
add a,#0xfc
mov (__mullong_PARM_2 + 1),a
mov a,r5
addc a,#0xff
mov (__mullong_PARM_2 + 2),a
mov a,r6
addc a,#0xff
mov (__mullong_PARM_2 + 3),a
; src/pwm.c:76: uint16_t width = 1500 + (uint16_t)((offset * 1000) / 1024);
mov dptr,#0x03e8
clr a
mov b,a
push ar7
lcall __mullong
mov r3,dpl
mov r4,dph
mov r5,b
mov r6,a
clr a
mov __divslong_PARM_2,a
mov (__divslong_PARM_2 + 1),#0x04
mov (__divslong_PARM_2 + 2),a
mov (__divslong_PARM_2 + 3),a
mov dpl,r3
mov dph,r4
mov b,r5
mov a,r6
lcall __divslong
mov r3,dpl
mov r4,dph
pop ar7
mov a,#0xdc
add a,r3
mov r3,a
mov a,#0x05
addc a,r4
mov r4,a
; src/pwm.c:77: if (width < 800) width = 800;
mov ar5,r3
mov ar6,r4
clr c
mov a,r5
subb a,#0x20
mov a,r6
subb a,#0x03
jnc 00106$
mov r3,#0x20
mov r4,#0x03
00106$:
; src/pwm.c:78: if (width > 2200) width = 2200;
mov ar5,r3
mov ar6,r4
clr c
mov a,#0x98
subb a,r5
mov a,#0x08
subb a,r6
jnc 00108$
mov r3,#0x98
mov r4,#0x08
00108$:
; src/pwm.c:79: pwm_set(ch, width);
mov _pwm_set_PARM_2,r3
mov (_pwm_set_PARM_2 + 1),r4
mov dpl,r7
; src/pwm.c:80: }
ljmp _pwm_set
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_tick_isr'
;------------------------------------------------------------
;i Allocated to registers r7
;------------------------------------------------------------
; src/pwm.c:83: void pwm_tick_isr(void) __interrupt (INT_ADDR_T0)
; -----------------------------------------
; function pwm_tick_isr
; -----------------------------------------
_pwm_tick_isr:
push bits
push acc
push b
push dpl
push dph
push (0+7)
push (0+6)
push (0+5)
push (0+4)
push (0+3)
push (0+2)
push (0+1)
push (0+0)
push psw
mov psw,#0x00
; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00109$:
; src/pwm.c:89: if (s_high_remain[i] > 0) {
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
jz 00110$
; src/pwm.c:90: s_high_remain[i]--;
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
mov r4,a
dec r4
mov dpl,r5
mov dph,r6
mov a,r4
movx @dptr,a
; src/pwm.c:91: if (s_high_remain[i] == 0) {
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
jnz 00110$
; src/pwm.c:92: gpio_write(CH_PORT[i], CH_BIT[i], 0); /* 拉低 */
mov a,r7
mov dptr,#_CH_PORT
movc a,@a+dptr
mov r6,a
mov a,r7
mov dptr,#_CH_BIT
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x00
mov dpl,r6
push ar7
lcall _gpio_write
pop ar7
00110$:
; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00143$
00143$:
jc 00109$
; src/pwm.c:97: s_period_cnt++;
mov dptr,#_s_period_cnt
movx a,@dptr
mov r6,a
inc dptr
movx a,@dptr
mov r7,a
mov dptr,#_s_period_cnt
mov a,#0x01
add a,r6
movx @dptr,a
clr a
addc a,r7
inc dptr
movx @dptr,a
; src/pwm.c:98: if (s_period_cnt >= PWM_PERIOD_COUNT) {
mov dptr,#_s_period_cnt
movx a,@dptr
mov r6,a
inc dptr
movx a,@dptr
mov r7,a
clr c
mov a,r6
subb a,#0xe8
mov a,r7
subb a,#0x03
jc 00113$
; src/pwm.c:99: s_period_cnt = 0;
mov dptr,#_s_period_cnt
clr a
movx @dptr,a
inc dptr
movx @dptr,a
; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00111$:
; src/pwm.c:102: gpio_write(CH_PORT[i], CH_BIT[i], 1);
mov a,r7
mov dptr,#_CH_PORT
movc a,@a+dptr
mov r6,a
mov a,r7
mov dptr,#_CH_BIT
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x01
mov dpl,r6
push ar7
lcall _gpio_write
pop ar7
; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00146$
00146$:
jc 00111$
00113$:
; src/pwm.c:105: }
pop psw
pop (0+0)
pop (0+1)
pop (0+2)
pop (0+3)
pop (0+4)
pop (0+5)
pop (0+6)
pop (0+7)
pop dph
pop dpl
pop b
pop acc
pop bits
reti
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
_CH_PORT:
.db #0x03 ; 3
.db #0x03 ; 3
.db #0x03 ; 3
.db #0x03 ; 3
_CH_BIT:
.db #0x07 ; 7
.db #0x06 ; 6
.db #0x05 ; 5
.db #0x04 ; 4
.area XINIT (CODE)
.area CABS (ABS,CODE)