1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 4.2.0 #13081 (Linux) 4 ;-------------------------------------------------------- 5 .module pwm 6 .optsdcc -mmcs51 --model-small 7 8 ;-------------------------------------------------------- 9 ; Public variables in this module 10 ;-------------------------------------------------------- 11 .globl _pwm_tick_isr 12 .globl _gpio_write 13 .globl _gpio_set_mode 14 .globl _EADC 15 .globl _ET1 16 .globl _ET0 17 .globl _ES 18 .globl _EA 19 .globl _REN 20 .globl _RI 21 .globl _TI 22 .globl _TR1 23 .globl _TF1 24 .globl _IT0 25 .globl _IE0 26 .globl _TR0 27 .globl _TF0 28 .globl _CMPCR2 29 .globl _CMPCR1 30 .globl _TA 31 .globl _IRCBAND_REG 32 .globl _IAP_TPS 33 .globl _IAP_CONTR 34 .globl _IAP_TRIG 35 .globl _IAP_CMD 36 .globl _IAP_ADDRL 37 .globl _IAP_ADDRH 38 .globl _IAP_DATA 39 .globl _WDT_CONTR 40 .globl _PCA_PWM3 41 .globl _PCA_PWM2 42 .globl _PCA_PWM1 43 .globl _PCA_PWM0 44 .globl _CCAP3L 45 .globl _CCAP2L 46 .globl _CCAP1L 47 .globl _CCAP0L 48 .globl _CCAPM3 49 .globl _CCAPM2 50 .globl _CCAPM1 51 .globl _CCAPM0 52 .globl _CMOD 53 .globl _CCON 54 .globl _ADCTIM_X 55 .globl _ADCCFG 56 .globl _ADC_RESL 57 .globl _ADC_RES 58 .globl _ADC_CONTR 59 .globl _SPDAT 60 .globl _SPCTL 61 .globl _SPSTAT 62 .globl _IP2H 63 .globl _IP2 64 .globl _IP 65 .globl _IE2 66 .globl _IE 67 .globl _BRT 68 .globl _P_SW1 69 .globl _SADEN 70 .globl _SADDR 71 .globl _S2BUF 72 .globl _S2CON 73 .globl _SBUF 74 .globl _SCON 75 .globl _TM4PS_X 76 .globl _TM3PS_X 77 .globl _TM2PS_X 78 .globl _T4T3M 79 .globl _T4L 80 .globl _T4H 81 .globl _T3L 82 .globl _T3H 83 .globl _T2L 84 .globl _T2H 85 .globl _INTCLKO 86 .globl _AUXR 87 .globl _TH1 88 .globl _TH0 89 .globl _TL1 90 .globl _TL0 91 .globl _TMOD 92 .globl _TCON 93 .globl _P_SW2 94 .globl _P5M0 95 .globl _P5M1 96 .globl _P4M0 97 .globl _P4M1 98 .globl _P3M0 99 .globl _P3M1 100 .globl _P2M0 101 .globl _P2M1 102 .globl _P1M0 103 .globl _P1M1 104 .globl _P0M0 105 .globl _P0M1 106 .globl _PSW 107 .globl _B 108 .globl _ACC 109 .globl _PCON 110 .globl _DPH 111 .globl _DPL 112 .globl _SP 113 .globl _P5 114 .globl _P4 115 .globl _P3 116 .globl _P2 117 .globl _P1 118 .globl _P0 119 .globl _pwm_set_from_sbus_PARM_2 120 .globl _pwm_set_PARM_2 121 .globl _pwm_init 122 .globl _pwm_set 123 .globl _pwm_set_from_sbus 124 ;-------------------------------------------------------- 125 ; special function registers 126 ;-------------------------------------------------------- 127 .area RSEG (ABS,DATA) 000000 128 .org 0x0000 000080 129 _P0 = 0x0080 000090 130 _P1 = 0x0090 0000A0 131 _P2 = 0x00a0 0000B0 132 _P3 = 0x00b0 0000C0 133 _P4 = 0x00c0 0000C8 134 _P5 = 0x00c8 000081 135 _SP = 0x0081 000082 136 _DPL = 0x0082 000083 137 _DPH = 0x0083 000087 138 _PCON = 0x0087 0000E0 139 _ACC = 0x00e0 0000F0 140 _B = 0x00f0 0000D0 141 _PSW = 0x00d0 000093 142 _P0M1 = 0x0093 000094 143 _P0M0 = 0x0094 000091 144 _P1M1 = 0x0091 000092 145 _P1M0 = 0x0092 000095 146 _P2M1 = 0x0095 000096 147 _P2M0 = 0x0096 0000B1 148 _P3M1 = 0x00b1 0000B2 149 _P3M0 = 0x00b2 0000B3 150 _P4M1 = 0x00b3 0000B4 151 _P4M0 = 0x00b4 0000C9 152 _P5M1 = 0x00c9 0000CA 153 _P5M0 = 0x00ca 0000BA 154 _P_SW2 = 0x00ba 000088 155 _TCON = 0x0088 000089 156 _TMOD = 0x0089 00008A 157 _TL0 = 0x008a 00008B 158 _TL1 = 0x008b 00008C 159 _TH0 = 0x008c 00008D 160 _TH1 = 0x008d 00008E 161 _AUXR = 0x008e 00008F 162 _INTCLKO = 0x008f 0000D6 163 _T2H = 0x00d6 0000D7 164 _T2L = 0x00d7 0000D4 165 _T3H = 0x00d4 0000D5 166 _T3L = 0x00d5 0000D2 167 _T4H = 0x00d2 0000D3 168 _T4L = 0x00d3 0000D1 169 _T4T3M = 0x00d1 00FEA1 170 _TM2PS_X = 0xfea1 00FEA2 171 _TM3PS_X = 0xfea2 00FEA3 172 _TM4PS_X = 0xfea3 000098 173 _SCON = 0x0098 000099 174 _SBUF = 0x0099 00009A 175 _S2CON = 0x009a 00009B 176 _S2BUF = 0x009b 0000A9 177 _SADDR = 0x00a9 0000B9 178 _SADEN = 0x00b9 0000A2 179 _P_SW1 = 0x00a2 00009C 180 _BRT = 0x009c 0000A8 181 _IE = 0x00a8 0000AF 182 _IE2 = 0x00af 0000B8 183 _IP = 0x00b8 0000B6 184 _IP2 = 0x00b6 0000B7 185 _IP2H = 0x00b7 0000CD 186 _SPSTAT = 0x00cd 0000CE 187 _SPCTL = 0x00ce 0000CF 188 _SPDAT = 0x00cf 0000BC 189 _ADC_CONTR = 0x00bc 0000BD 190 _ADC_RES = 0x00bd 0000BE 191 _ADC_RESL = 0x00be 0000DE 192 _ADCCFG = 0x00de 00FEA8 193 _ADCTIM_X = 0xfea8 0000D8 194 _CCON = 0x00d8 0000D9 195 _CMOD = 0x00d9 0000DA 196 _CCAPM0 = 0x00da 0000DB 197 _CCAPM1 = 0x00db 0000DC 198 _CCAPM2 = 0x00dc 0000DD 199 _CCAPM3 = 0x00dd 0000EA 200 _CCAP0L = 0x00ea 0000EB 201 _CCAP1L = 0x00eb 0000EC 202 _CCAP2L = 0x00ec 0000ED 203 _CCAP3L = 0x00ed 0000F2 204 _PCA_PWM0 = 0x00f2 0000F3 205 _PCA_PWM1 = 0x00f3 0000F4 206 _PCA_PWM2 = 0x00f4 0000F5 207 _PCA_PWM3 = 0x00f5 0000C1 208 _WDT_CONTR = 0x00c1 0000C2 209 _IAP_DATA = 0x00c2 0000C3 210 _IAP_ADDRH = 0x00c3 0000C4 211 _IAP_ADDRL = 0x00c4 0000C5 212 _IAP_CMD = 0x00c5 0000C6 213 _IAP_TRIG = 0x00c6 0000C7 214 _IAP_CONTR = 0x00c7 0000F7 215 _IAP_TPS = 0x00f7 00009D 216 _IRCBAND_REG = 0x009d 0000AE 217 _TA = 0x00ae 0000E6 218 _CMPCR1 = 0x00e6 0000E7 219 _CMPCR2 = 0x00e7 220 ;-------------------------------------------------------- 221 ; special function bits 222 ;-------------------------------------------------------- 223 .area RSEG (ABS,DATA) 000000 224 .org 0x0000 00008D 225 _TF0 = 0x008d 00008C 226 _TR0 = 0x008c 000089 227 _IE0 = 0x0089 000088 228 _IT0 = 0x0088 00008F 229 _TF1 = 0x008f 00008E 230 _TR1 = 0x008e 000099 231 _TI = 0x0099 000098 232 _RI = 0x0098 00009C 233 _REN = 0x009c 0000AF 234 _EA = 0x00af 0000AC 235 _ES = 0x00ac 0000A9 236 _ET0 = 0x00a9 0000AB 237 _ET1 = 0x00ab 0000AD 238 _EADC = 0x00ad 239 ;-------------------------------------------------------- 240 ; overlayable register banks 241 ;-------------------------------------------------------- 242 .area REG_BANK_0 (REL,OVR,DATA) 000000 243 .ds 8 244 ;-------------------------------------------------------- 245 ; overlayable bit register bank 246 ;-------------------------------------------------------- 247 .area BIT_BANK (REL,OVR,DATA) 000000 248 bits: 000000 249 .ds 1 008000 250 b0 = bits[0] 008100 251 b1 = bits[1] 008200 252 b2 = bits[2] 008300 253 b3 = bits[3] 008400 254 b4 = bits[4] 008500 255 b5 = bits[5] 008600 256 b6 = bits[6] 008700 257 b7 = bits[7] 258 ;-------------------------------------------------------- 259 ; internal ram data 260 ;-------------------------------------------------------- 261 .area DSEG (DATA) 000000 262 _pwm_set_PARM_2: 000000 263 .ds 2 000002 264 _pwm_set_from_sbus_PARM_2: 000002 265 .ds 2 266 ;-------------------------------------------------------- 267 ; overlayable items in internal ram 268 ;-------------------------------------------------------- 269 ;-------------------------------------------------------- 270 ; indirectly addressable internal ram data 271 ;-------------------------------------------------------- 272 .area ISEG (DATA) 273 ;-------------------------------------------------------- 274 ; absolute internal ram data 275 ;-------------------------------------------------------- 276 .area IABS (ABS,DATA) 277 .area IABS (ABS,DATA) 278 ;-------------------------------------------------------- 279 ; bit data 280 ;-------------------------------------------------------- 281 .area BSEG (BIT) 282 ;-------------------------------------------------------- 283 ; paged external ram data 284 ;-------------------------------------------------------- 285 .area PSEG (PAG,XDATA) 286 ;-------------------------------------------------------- 287 ; external ram data 288 ;-------------------------------------------------------- 289 .area XSEG (XDATA) 000000 290 _s_high_remain: 000000 291 .ds 4 000004 292 _s_period_cnt: 000004 293 .ds 2 294 ;-------------------------------------------------------- 295 ; absolute external ram data 296 ;-------------------------------------------------------- 297 .area XABS (ABS,XDATA) 298 ;-------------------------------------------------------- 299 ; external initialized ram data 300 ;-------------------------------------------------------- 301 .area XISEG (XDATA) 302 .area HOME (CODE) 303 .area GSINIT0 (CODE) 304 .area GSINIT1 (CODE) 305 .area GSINIT2 (CODE) 306 .area GSINIT3 (CODE) 307 .area GSINIT4 (CODE) 308 .area GSINIT5 (CODE) 309 .area GSINIT (CODE) 310 .area GSFINAL (CODE) 311 .area CSEG (CODE) 312 ;-------------------------------------------------------- 313 ; global & static initialisations 314 ;-------------------------------------------------------- 315 .area HOME (CODE) 316 .area GSINIT (CODE) 317 .area GSFINAL (CODE) 318 .area GSINIT (CODE) 319 ;-------------------------------------------------------- 320 ; Home 321 ;-------------------------------------------------------- 322 .area HOME (CODE) 323 .area HOME (CODE) 324 ;-------------------------------------------------------- 325 ; code 326 ;-------------------------------------------------------- 327 .area CSEG (CODE) 328 ;------------------------------------------------------------ 329 ;Allocation info for local variables in function 'pwm_init' 330 ;------------------------------------------------------------ 331 ;i Allocated to registers r7 332 ;------------------------------------------------------------ 333 ; src/pwm.c:30: void pwm_init(void) 334 ; ----------------------------------------- 335 ; function pwm_init 336 ; ----------------------------------------- 000000 337 _pwm_init: 000007 338 ar7 = 0x07 000006 339 ar6 = 0x06 000005 340 ar5 = 0x05 000004 341 ar4 = 0x04 000003 342 ar3 = 0x03 000002 343 ar2 = 0x02 000001 344 ar1 = 0x01 000000 345 ar0 = 0x00 346 ; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) { 000000 7F 00 [12] 347 mov r7,#0x00 000002 348 00102$: 349 ; src/pwm.c:34: s_high_remain[i] = 1500 / PWM_UNIT_US; /* 默认 1500us 中位 */ 000002 EF [12] 350 mov a,r7 000003 24r00 [12] 351 add a,#_s_high_remain 000005 F5 82 [12] 352 mov dpl,a 000007 E4 [12] 353 clr a 000008 34s00 [12] 354 addc a,#(_s_high_remain >> 8) 00000A F5 83 [12] 355 mov dph,a 00000C 74 4B [12] 356 mov a,#0x4b 00000E F0 [24] 357 movx @dptr,a 358 ; src/pwm.c:35: gpio_set_mode(CH_PORT[i], CH_BIT[i], GPIO_MODE_PUSHPULL); 00000F EF [12] 359 mov a,r7 000010 24r05 [12] 360 add a,#_CH_PORT 000012 FD [12] 361 mov r5,a 000013 E4 [12] 362 clr a 000014 34s00 [12] 363 addc a,#(_CH_PORT >> 8) 000016 FE [12] 364 mov r6,a 000017 8D 82 [24] 365 mov dpl,r5 000019 8E 83 [24] 366 mov dph,r6 00001B E4 [12] 367 clr a 00001C 93 [24] 368 movc a,@a+dptr 00001D FC [12] 369 mov r4,a 00001E EF [12] 370 mov a,r7 00001F 24r09 [12] 371 add a,#_CH_BIT 000021 FA [12] 372 mov r2,a 000022 E4 [12] 373 clr a 000023 34s00 [12] 374 addc a,#(_CH_BIT >> 8) 000025 FB [12] 375 mov r3,a 000026 8A 82 [24] 376 mov dpl,r2 000028 8B 83 [24] 377 mov dph,r3 00002A E4 [12] 378 clr a 00002B 93 [24] 379 movc a,@a+dptr 00002C F5*00 [12] 380 mov _gpio_set_mode_PARM_2,a 00002E 75*00 01 [24] 381 mov _gpio_set_mode_PARM_3,#0x01 000031 8C 82 [24] 382 mov dpl,r4 000033 C0 07 [24] 383 push ar7 000035 C0 06 [24] 384 push ar6 000037 C0 05 [24] 385 push ar5 000039 C0 03 [24] 386 push ar3 00003B C0 02 [24] 387 push ar2 00003D 12r00r00 [24] 388 lcall _gpio_set_mode 000040 D0 02 [24] 389 pop ar2 000042 D0 03 [24] 390 pop ar3 000044 D0 05 [24] 391 pop ar5 000046 D0 06 [24] 392 pop ar6 393 ; src/pwm.c:36: gpio_write(CH_PORT[i], CH_BIT[i], 0); 000048 8D 82 [24] 394 mov dpl,r5 00004A 8E 83 [24] 395 mov dph,r6 00004C E4 [12] 396 clr a 00004D 93 [24] 397 movc a,@a+dptr 00004E FD [12] 398 mov r5,a 00004F 8A 82 [24] 399 mov dpl,r2 000051 8B 83 [24] 400 mov dph,r3 000053 E4 [12] 401 clr a 000054 93 [24] 402 movc a,@a+dptr 000055 F5*00 [12] 403 mov _gpio_write_PARM_2,a 000057 75*00 00 [24] 404 mov _gpio_write_PARM_3,#0x00 00005A 8D 82 [24] 405 mov dpl,r5 00005C 12r00r00 [24] 406 lcall _gpio_write 00005F D0 07 [24] 407 pop ar7 408 ; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) { 000061 0F [12] 409 inc r7 000062 BF 04 00 [24] 410 cjne r7,#0x04,00115$ 000065 411 00115$: 000065 40 9B [24] 412 jc 00102$ 413 ; src/pwm.c:38: s_period_cnt = 0; 000067 90r00r04 [24] 414 mov dptr,#_s_period_cnt 00006A E4 [12] 415 clr a 00006B F0 [24] 416 movx @dptr,a 00006C A3 [24] 417 inc dptr 00006D F0 [24] 418 movx @dptr,a 419 ; src/pwm.c:41: TMOD &= 0xF0; 00006E 53 89 F0 [24] 420 anl _TMOD,#0xf0 421 ; src/pwm.c:42: TMOD |= 0x00; /* T0 模式 0 (16 位自动重载) */ 000071 85 89 89 [24] 422 mov _TMOD,_TMOD 423 ; src/pwm.c:44: AUXR &= ~0x80; /* T0x12 = 0: 12T 模式 → 24MHz/12 = 2MHz */ 000074 53 8E 7F [24] 424 anl _AUXR,#0x7f 425 ; src/pwm.c:46: AUXR |= 0x80; /* T0x12 = 1: 1T 模式 → 24MHz */ 000077 43 8E 80 [24] 426 orl _AUXR,#0x80 427 ; src/pwm.c:49: TL0 = 0x40; 00007A 75 8A 40 [24] 428 mov _TL0,#0x40 429 ; src/pwm.c:50: TH0 = 0xFE; 00007D 75 8C FE [24] 430 mov _TH0,#0xfe 431 ; src/pwm.c:52: ET0 = 1; /* 使能 T0 中断 */ 432 ; assignBit 000080 D2 A9 [12] 433 setb _ET0 434 ; src/pwm.c:53: TR0 = 1; /* 启动 T0 */ 435 ; assignBit 000082 D2 8C [12] 436 setb _TR0 437 ; src/pwm.c:54: EA = 1; 438 ; assignBit 000084 D2 AF [12] 439 setb _EA 440 ; src/pwm.c:55: } 000086 22 [24] 441 ret 442 ;------------------------------------------------------------ 443 ;Allocation info for local variables in function 'pwm_set' 444 ;------------------------------------------------------------ 445 ;width_us Allocated with name '_pwm_set_PARM_2' 446 ;ch Allocated to registers r7 447 ;cnt Allocated to registers 448 ;------------------------------------------------------------ 449 ; src/pwm.c:57: void pwm_set(uint8_t ch, uint16_t width_us) 450 ; ----------------------------------------- 451 ; function pwm_set 452 ; ----------------------------------------- 000087 453 _pwm_set: 000087 AF 82 [24] 454 mov r7,dpl 455 ; src/pwm.c:59: if (ch >= CH_COUNT) return; 000089 BF 04 00 [24] 456 cjne r7,#0x04,00121$ 00008C 457 00121$: 00008C 40 01 [24] 458 jc 00102$ 00008E 22 [24] 459 ret 00008F 460 00102$: 461 ; src/pwm.c:61: if (width_us < 800) width_us = 800; 00008F AD*00 [24] 462 mov r5,_pwm_set_PARM_2 000091 AE*01 [24] 463 mov r6,(_pwm_set_PARM_2 + 1) 000093 C3 [12] 464 clr c 000094 ED [12] 465 mov a,r5 000095 94 20 [12] 466 subb a,#0x20 000097 EE [12] 467 mov a,r6 000098 94 03 [12] 468 subb a,#0x03 00009A 50 06 [24] 469 jnc 00104$ 00009C 75*00 20 [24] 470 mov _pwm_set_PARM_2,#0x20 00009F 75*01 03 [24] 471 mov (_pwm_set_PARM_2 + 1),#0x03 0000A2 472 00104$: 473 ; src/pwm.c:62: if (width_us > 2200) width_us = 2200; 0000A2 AD*00 [24] 474 mov r5,_pwm_set_PARM_2 0000A4 AE*01 [24] 475 mov r6,(_pwm_set_PARM_2 + 1) 0000A6 C3 [12] 476 clr c 0000A7 74 98 [12] 477 mov a,#0x98 0000A9 9D [12] 478 subb a,r5 0000AA 74 08 [12] 479 mov a,#0x08 0000AC 9E [12] 480 subb a,r6 0000AD 50 06 [24] 481 jnc 00106$ 0000AF 75*00 98 [24] 482 mov _pwm_set_PARM_2,#0x98 0000B2 75*01 08 [24] 483 mov (_pwm_set_PARM_2 + 1),#0x08 0000B5 484 00106$: 485 ; src/pwm.c:64: uint16_t cnt = (width_us + PWM_UNIT_US / 2) / PWM_UNIT_US; 0000B5 AD*00 [24] 486 mov r5,_pwm_set_PARM_2 0000B7 AE*01 [24] 487 mov r6,(_pwm_set_PARM_2 + 1) 0000B9 74 0A [12] 488 mov a,#0x0a 0000BB 2D [12] 489 add a,r5 0000BC F5 82 [12] 490 mov dpl,a 0000BE E4 [12] 491 clr a 0000BF 3E [12] 492 addc a,r6 0000C0 F5 83 [12] 493 mov dph,a 0000C2 75*00 14 [24] 494 mov __divuint_PARM_2,#0x14 0000C5 75*01 00 [24] 495 mov (__divuint_PARM_2 + 1),#0x00 0000C8 C0 07 [24] 496 push ar7 0000CA 12r00r00 [24] 497 lcall __divuint 0000CD AD 82 [24] 498 mov r5,dpl 0000CF D0 07 [24] 499 pop ar7 500 ; src/pwm.c:65: CRITICAL(s_high_remain[ch] = cnt;); 501 ; assignBit 0000D1 C2 AF [12] 502 clr _EA 0000D3 EF [12] 503 mov a,r7 0000D4 24r00 [12] 504 add a,#_s_high_remain 0000D6 F5 82 [12] 505 mov dpl,a 0000D8 E4 [12] 506 clr a 0000D9 34s00 [12] 507 addc a,#(_s_high_remain >> 8) 0000DB F5 83 [12] 508 mov dph,a 0000DD ED [12] 509 mov a,r5 0000DE F0 [24] 510 movx @dptr,a 511 ; assignBit 0000DF D2 AF [12] 512 setb _EA 513 ; src/pwm.c:66: } 0000E1 22 [24] 514 ret 515 ;------------------------------------------------------------ 516 ;Allocation info for local variables in function 'pwm_set_from_sbus' 517 ;------------------------------------------------------------ 518 ;sbus_val Allocated with name '_pwm_set_from_sbus_PARM_2' 519 ;ch Allocated to registers r7 520 ;offset Allocated to registers 521 ;width Allocated to registers r3 r4 522 ;------------------------------------------------------------ 523 ; src/pwm.c:68: void pwm_set_from_sbus(uint8_t ch, uint16_t sbus_val) 524 ; ----------------------------------------- 525 ; function pwm_set_from_sbus 526 ; ----------------------------------------- 0000E2 527 _pwm_set_from_sbus: 0000E2 AF 82 [24] 528 mov r7,dpl 529 ; src/pwm.c:72: if (sbus_val < 172) sbus_val = 172; 0000E4 AD*02 [24] 530 mov r5,_pwm_set_from_sbus_PARM_2 0000E6 AE*03 [24] 531 mov r6,(_pwm_set_from_sbus_PARM_2 + 1) 0000E8 C3 [12] 532 clr c 0000E9 ED [12] 533 mov a,r5 0000EA 94 AC [12] 534 subb a,#0xac 0000EC EE [12] 535 mov a,r6 0000ED 94 00 [12] 536 subb a,#0x00 0000EF 50 06 [24] 537 jnc 00102$ 0000F1 75*02 AC [24] 538 mov _pwm_set_from_sbus_PARM_2,#0xac 0000F4 75*03 00 [24] 539 mov (_pwm_set_from_sbus_PARM_2 + 1),#0x00 0000F7 540 00102$: 541 ; src/pwm.c:73: if (sbus_val > 1811) sbus_val = 1811; 0000F7 AD*02 [24] 542 mov r5,_pwm_set_from_sbus_PARM_2 0000F9 AE*03 [24] 543 mov r6,(_pwm_set_from_sbus_PARM_2 + 1) 0000FB C3 [12] 544 clr c 0000FC 74 13 [12] 545 mov a,#0x13 0000FE 9D [12] 546 subb a,r5 0000FF 74 07 [12] 547 mov a,#0x07 000101 9E [12] 548 subb a,r6 000102 50 06 [24] 549 jnc 00104$ 000104 75*02 13 [24] 550 mov _pwm_set_from_sbus_PARM_2,#0x13 000107 75*03 07 [24] 551 mov (_pwm_set_from_sbus_PARM_2 + 1),#0x07 00010A 552 00104$: 553 ; src/pwm.c:74: int32_t offset = (int32_t)sbus_val - 1024; /* -852..787 */ 00010A AB*02 [24] 554 mov r3,_pwm_set_from_sbus_PARM_2 00010C AC*03 [24] 555 mov r4,(_pwm_set_from_sbus_PARM_2 + 1) 00010E 7D 00 [12] 556 mov r5,#0x00 000110 7E 00 [12] 557 mov r6,#0x00 000112 8B*00 [24] 558 mov __mullong_PARM_2,r3 000114 EC [12] 559 mov a,r4 000115 24 FC [12] 560 add a,#0xfc 000117 F5*01 [12] 561 mov (__mullong_PARM_2 + 1),a 000119 ED [12] 562 mov a,r5 00011A 34 FF [12] 563 addc a,#0xff 00011C F5*02 [12] 564 mov (__mullong_PARM_2 + 2),a 00011E EE [12] 565 mov a,r6 00011F 34 FF [12] 566 addc a,#0xff 000121 F5*03 [12] 567 mov (__mullong_PARM_2 + 3),a 568 ; src/pwm.c:76: uint16_t width = 1500 + (uint16_t)((offset * 1000) / 1024); 000123 90 03 E8 [24] 569 mov dptr,#0x03e8 000126 E4 [12] 570 clr a 000127 F5 F0 [12] 571 mov b,a 000129 C0 07 [24] 572 push ar7 00012B 12r00r00 [24] 573 lcall __mullong 00012E AB 82 [24] 574 mov r3,dpl 000130 AC 83 [24] 575 mov r4,dph 000132 AD F0 [24] 576 mov r5,b 000134 FE [12] 577 mov r6,a 000135 E4 [12] 578 clr a 000136 F5*00 [12] 579 mov __divslong_PARM_2,a 000138 75*01 04 [24] 580 mov (__divslong_PARM_2 + 1),#0x04 00013B F5*02 [12] 581 mov (__divslong_PARM_2 + 2),a 00013D F5*03 [12] 582 mov (__divslong_PARM_2 + 3),a 00013F 8B 82 [24] 583 mov dpl,r3 000141 8C 83 [24] 584 mov dph,r4 000143 8D F0 [24] 585 mov b,r5 000145 EE [12] 586 mov a,r6 000146 12r00r00 [24] 587 lcall __divslong 000149 AB 82 [24] 588 mov r3,dpl 00014B AC 83 [24] 589 mov r4,dph 00014D D0 07 [24] 590 pop ar7 00014F 74 DC [12] 591 mov a,#0xdc 000151 2B [12] 592 add a,r3 000152 FB [12] 593 mov r3,a 000153 74 05 [12] 594 mov a,#0x05 000155 3C [12] 595 addc a,r4 000156 FC [12] 596 mov r4,a 597 ; src/pwm.c:77: if (width < 800) width = 800; 000157 8B 05 [24] 598 mov ar5,r3 000159 8C 06 [24] 599 mov ar6,r4 00015B C3 [12] 600 clr c 00015C ED [12] 601 mov a,r5 00015D 94 20 [12] 602 subb a,#0x20 00015F EE [12] 603 mov a,r6 000160 94 03 [12] 604 subb a,#0x03 000162 50 04 [24] 605 jnc 00106$ 000164 7B 20 [12] 606 mov r3,#0x20 000166 7C 03 [12] 607 mov r4,#0x03 000168 608 00106$: 609 ; src/pwm.c:78: if (width > 2200) width = 2200; 000168 8B 05 [24] 610 mov ar5,r3 00016A 8C 06 [24] 611 mov ar6,r4 00016C C3 [12] 612 clr c 00016D 74 98 [12] 613 mov a,#0x98 00016F 9D [12] 614 subb a,r5 000170 74 08 [12] 615 mov a,#0x08 000172 9E [12] 616 subb a,r6 000173 50 04 [24] 617 jnc 00108$ 000175 7B 98 [12] 618 mov r3,#0x98 000177 7C 08 [12] 619 mov r4,#0x08 000179 620 00108$: 621 ; src/pwm.c:79: pwm_set(ch, width); 000179 8B*00 [24] 622 mov _pwm_set_PARM_2,r3 00017B 8C*01 [24] 623 mov (_pwm_set_PARM_2 + 1),r4 00017D 8F 82 [24] 624 mov dpl,r7 625 ; src/pwm.c:80: } 00017F 02r00r87 [24] 626 ljmp _pwm_set 627 ;------------------------------------------------------------ 628 ;Allocation info for local variables in function 'pwm_tick_isr' 629 ;------------------------------------------------------------ 630 ;i Allocated to registers r7 631 ;------------------------------------------------------------ 632 ; src/pwm.c:83: void pwm_tick_isr(void) __interrupt (INT_ADDR_T0) 633 ; ----------------------------------------- 634 ; function pwm_tick_isr 635 ; ----------------------------------------- 000182 636 _pwm_tick_isr: 000182 C0*00 [24] 637 push bits 000184 C0 E0 [24] 638 push acc 000186 C0 F0 [24] 639 push b 000188 C0 82 [24] 640 push dpl 00018A C0 83 [24] 641 push dph 00018C C0 07 [24] 642 push (0+7) 00018E C0 06 [24] 643 push (0+6) 000190 C0 05 [24] 644 push (0+5) 000192 C0 04 [24] 645 push (0+4) 000194 C0 03 [24] 646 push (0+3) 000196 C0 02 [24] 647 push (0+2) 000198 C0 01 [24] 648 push (0+1) 00019A C0 00 [24] 649 push (0+0) 00019C C0 D0 [24] 650 push psw 00019E 75 D0 00 [24] 651 mov psw,#0x00 652 ; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) { 0001A1 7F 00 [12] 653 mov r7,#0x00 0001A3 654 00109$: 655 ; src/pwm.c:89: if (s_high_remain[i] > 0) { 0001A3 EF [12] 656 mov a,r7 0001A4 24r00 [12] 657 add a,#_s_high_remain 0001A6 FD [12] 658 mov r5,a 0001A7 E4 [12] 659 clr a 0001A8 34s00 [12] 660 addc a,#(_s_high_remain >> 8) 0001AA FE [12] 661 mov r6,a 0001AB 8D 82 [24] 662 mov dpl,r5 0001AD 8E 83 [24] 663 mov dph,r6 0001AF E0 [24] 664 movx a,@dptr 0001B0 60 3D [24] 665 jz 00110$ 666 ; src/pwm.c:90: s_high_remain[i]--; 0001B2 EF [12] 667 mov a,r7 0001B3 24r00 [12] 668 add a,#_s_high_remain 0001B5 FD [12] 669 mov r5,a 0001B6 E4 [12] 670 clr a 0001B7 34s00 [12] 671 addc a,#(_s_high_remain >> 8) 0001B9 FE [12] 672 mov r6,a 0001BA 8D 82 [24] 673 mov dpl,r5 0001BC 8E 83 [24] 674 mov dph,r6 0001BE E0 [24] 675 movx a,@dptr 0001BF FC [12] 676 mov r4,a 0001C0 1C [12] 677 dec r4 0001C1 8D 82 [24] 678 mov dpl,r5 0001C3 8E 83 [24] 679 mov dph,r6 0001C5 EC [12] 680 mov a,r4 0001C6 F0 [24] 681 movx @dptr,a 682 ; src/pwm.c:91: if (s_high_remain[i] == 0) { 0001C7 EF [12] 683 mov a,r7 0001C8 24r00 [12] 684 add a,#_s_high_remain 0001CA FD [12] 685 mov r5,a 0001CB E4 [12] 686 clr a 0001CC 34s00 [12] 687 addc a,#(_s_high_remain >> 8) 0001CE FE [12] 688 mov r6,a 0001CF 8D 82 [24] 689 mov dpl,r5 0001D1 8E 83 [24] 690 mov dph,r6 0001D3 E0 [24] 691 movx a,@dptr 0001D4 70 19 [24] 692 jnz 00110$ 693 ; src/pwm.c:92: gpio_write(CH_PORT[i], CH_BIT[i], 0); /* 拉低 */ 0001D6 EF [12] 694 mov a,r7 0001D7 90r00r05 [24] 695 mov dptr,#_CH_PORT 0001DA 93 [24] 696 movc a,@a+dptr 0001DB FE [12] 697 mov r6,a 0001DC EF [12] 698 mov a,r7 0001DD 90r00r09 [24] 699 mov dptr,#_CH_BIT 0001E0 93 [24] 700 movc a,@a+dptr 0001E1 F5*00 [12] 701 mov _gpio_write_PARM_2,a 0001E3 75*00 00 [24] 702 mov _gpio_write_PARM_3,#0x00 0001E6 8E 82 [24] 703 mov dpl,r6 0001E8 C0 07 [24] 704 push ar7 0001EA 12r00r00 [24] 705 lcall _gpio_write 0001ED D0 07 [24] 706 pop ar7 0001EF 707 00110$: 708 ; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) { 0001EF 0F [12] 709 inc r7 0001F0 BF 04 00 [24] 710 cjne r7,#0x04,00143$ 0001F3 711 00143$: 0001F3 40 AE [24] 712 jc 00109$ 713 ; src/pwm.c:97: s_period_cnt++; 0001F5 90r00r04 [24] 714 mov dptr,#_s_period_cnt 0001F8 E0 [24] 715 movx a,@dptr 0001F9 FE [12] 716 mov r6,a 0001FA A3 [24] 717 inc dptr 0001FB E0 [24] 718 movx a,@dptr 0001FC FF [12] 719 mov r7,a 0001FD 90r00r04 [24] 720 mov dptr,#_s_period_cnt 000200 74 01 [12] 721 mov a,#0x01 000202 2E [12] 722 add a,r6 000203 F0 [24] 723 movx @dptr,a 000204 E4 [12] 724 clr a 000205 3F [12] 725 addc a,r7 000206 A3 [24] 726 inc dptr 000207 F0 [24] 727 movx @dptr,a 728 ; src/pwm.c:98: if (s_period_cnt >= PWM_PERIOD_COUNT) { 000208 90r00r04 [24] 729 mov dptr,#_s_period_cnt 00020B E0 [24] 730 movx a,@dptr 00020C FE [12] 731 mov r6,a 00020D A3 [24] 732 inc dptr 00020E E0 [24] 733 movx a,@dptr 00020F FF [12] 734 mov r7,a 000210 C3 [12] 735 clr c 000211 EE [12] 736 mov a,r6 000212 94 E8 [12] 737 subb a,#0xe8 000214 EF [12] 738 mov a,r7 000215 94 03 [12] 739 subb a,#0x03 000217 40 28 [24] 740 jc 00113$ 741 ; src/pwm.c:99: s_period_cnt = 0; 000219 90r00r04 [24] 742 mov dptr,#_s_period_cnt 00021C E4 [12] 743 clr a 00021D F0 [24] 744 movx @dptr,a 00021E A3 [24] 745 inc dptr 00021F F0 [24] 746 movx @dptr,a 747 ; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) { 000220 7F 00 [12] 748 mov r7,#0x00 000222 749 00111$: 750 ; src/pwm.c:102: gpio_write(CH_PORT[i], CH_BIT[i], 1); 000222 EF [12] 751 mov a,r7 000223 90r00r05 [24] 752 mov dptr,#_CH_PORT 000226 93 [24] 753 movc a,@a+dptr 000227 FE [12] 754 mov r6,a 000228 EF [12] 755 mov a,r7 000229 90r00r09 [24] 756 mov dptr,#_CH_BIT 00022C 93 [24] 757 movc a,@a+dptr 00022D F5*00 [12] 758 mov _gpio_write_PARM_2,a 00022F 75*00 01 [24] 759 mov _gpio_write_PARM_3,#0x01 000232 8E 82 [24] 760 mov dpl,r6 000234 C0 07 [24] 761 push ar7 000236 12r00r00 [24] 762 lcall _gpio_write 000239 D0 07 [24] 763 pop ar7 764 ; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) { 00023B 0F [12] 765 inc r7 00023C BF 04 00 [24] 766 cjne r7,#0x04,00146$ 00023F 767 00146$: 00023F 40 E1 [24] 768 jc 00111$ 000241 769 00113$: 770 ; src/pwm.c:105: } 000241 D0 D0 [24] 771 pop psw 000243 D0 00 [24] 772 pop (0+0) 000245 D0 01 [24] 773 pop (0+1) 000247 D0 02 [24] 774 pop (0+2) 000249 D0 03 [24] 775 pop (0+3) 00024B D0 04 [24] 776 pop (0+4) 00024D D0 05 [24] 777 pop (0+5) 00024F D0 06 [24] 778 pop (0+6) 000251 D0 07 [24] 779 pop (0+7) 000253 D0 83 [24] 780 pop dph 000255 D0 82 [24] 781 pop dpl 000257 D0 F0 [24] 782 pop b 000259 D0 E0 [24] 783 pop acc 00025B D0*00 [24] 784 pop bits 00025D 32 [24] 785 reti 786 .area CSEG (CODE) 787 .area CONST (CODE) 000000 788 _DEFAULT_ADDR: 000000 E7 789 .db #0xe7 ; 231 000001 E7 790 .db #0xe7 ; 231 000002 E7 791 .db #0xe7 ; 231 000003 E7 792 .db #0xe7 ; 231 000004 C2 793 .db #0xc2 ; 194 000005 794 _CH_PORT: 000005 03 795 .db #0x03 ; 3 000006 03 796 .db #0x03 ; 3 000007 03 797 .db #0x03 ; 3 000008 03 798 .db #0x03 ; 3 000009 799 _CH_BIT: 000009 07 800 .db #0x07 ; 7 00000A 06 801 .db #0x06 ; 6 00000B 05 802 .db #0x05 ; 5 00000C 04 803 .db #0x04 ; 4 804 .area XINIT (CODE) 805 .area CABS (ABS,CODE)