;-------------------------------------------------------- ; File Created by SDCC : free open source ANSI-C Compiler ; Version 4.2.0 #13081 (Linux) ;-------------------------------------------------------- .module uart .optsdcc -mmcs51 --model-small ;-------------------------------------------------------- ; Public variables in this module ;-------------------------------------------------------- .globl _uart1_isr .globl _EADC .globl _ET1 .globl _ET0 .globl _ES .globl _EA .globl _REN .globl _RI .globl _TI .globl _TR1 .globl _TF1 .globl _IT0 .globl _IE0 .globl _TR0 .globl _TF0 .globl _CMPCR2 .globl _CMPCR1 .globl _TA .globl _IRCBAND_REG .globl _IAP_TPS .globl _IAP_CONTR .globl _IAP_TRIG .globl _IAP_CMD .globl _IAP_ADDRL .globl _IAP_ADDRH .globl _IAP_DATA .globl _WDT_CONTR .globl _PCA_PWM3 .globl _PCA_PWM2 .globl _PCA_PWM1 .globl _PCA_PWM0 .globl _CCAP3L .globl _CCAP2L .globl _CCAP1L .globl _CCAP0L .globl _CCAPM3 .globl _CCAPM2 .globl _CCAPM1 .globl _CCAPM0 .globl _CMOD .globl _CCON .globl _ADCTIM_X .globl _ADCCFG .globl _ADC_RESL .globl _ADC_RES .globl _ADC_CONTR .globl _SPDAT .globl _SPCTL .globl _SPSTAT .globl _IP2H .globl _IP2 .globl _IP .globl _IE2 .globl _IE .globl _BRT .globl _P_SW1 .globl _SADEN .globl _SADDR .globl _S2BUF .globl _S2CON .globl _SBUF .globl _SCON .globl _TM4PS_X .globl _TM3PS_X .globl _TM2PS_X .globl _T4T3M .globl _T4L .globl _T4H .globl _T3L .globl _T3H .globl _T2L .globl _T2H .globl _INTCLKO .globl _AUXR .globl _TH1 .globl _TH0 .globl _TL1 .globl _TL0 .globl _TMOD .globl _TCON .globl _P_SW2 .globl _P5M0 .globl _P5M1 .globl _P4M0 .globl _P4M1 .globl _P3M0 .globl _P3M1 .globl _P2M0 .globl _P2M1 .globl _P1M0 .globl _P1M1 .globl _P0M0 .globl _P0M1 .globl _PSW .globl _B .globl _ACC .globl _PCON .globl _DPH .globl _DPL .globl _SP .globl _P5 .globl _P4 .globl _P3 .globl _P2 .globl _P1 .globl _P0 .globl _g_uart1_rx_tail .globl _g_uart1_rx_head .globl _g_uart1_rx_buf .globl _uart1_send_bytes_PARM_2 .globl _uart1_init .globl _uart1_send_byte .globl _uart1_send_bytes .globl _uart1_rx_available .globl _uart1_read_byte ;-------------------------------------------------------- ; special function registers ;-------------------------------------------------------- .area RSEG (ABS,DATA) .org 0x0000 _P0 = 0x0080 _P1 = 0x0090 _P2 = 0x00a0 _P3 = 0x00b0 _P4 = 0x00c0 _P5 = 0x00c8 _SP = 0x0081 _DPL = 0x0082 _DPH = 0x0083 _PCON = 0x0087 _ACC = 0x00e0 _B = 0x00f0 _PSW = 0x00d0 _P0M1 = 0x0093 _P0M0 = 0x0094 _P1M1 = 0x0091 _P1M0 = 0x0092 _P2M1 = 0x0095 _P2M0 = 0x0096 _P3M1 = 0x00b1 _P3M0 = 0x00b2 _P4M1 = 0x00b3 _P4M0 = 0x00b4 _P5M1 = 0x00c9 _P5M0 = 0x00ca _P_SW2 = 0x00ba _TCON = 0x0088 _TMOD = 0x0089 _TL0 = 0x008a _TL1 = 0x008b _TH0 = 0x008c _TH1 = 0x008d _AUXR = 0x008e _INTCLKO = 0x008f _T2H = 0x00d6 _T2L = 0x00d7 _T3H = 0x00d4 _T3L = 0x00d5 _T4H = 0x00d2 _T4L = 0x00d3 _T4T3M = 0x00d1 _TM2PS_X = 0xfea1 _TM3PS_X = 0xfea2 _TM4PS_X = 0xfea3 _SCON = 0x0098 _SBUF = 0x0099 _S2CON = 0x009a _S2BUF = 0x009b _SADDR = 0x00a9 _SADEN = 0x00b9 _P_SW1 = 0x00a2 _BRT = 0x009c _IE = 0x00a8 _IE2 = 0x00af _IP = 0x00b8 _IP2 = 0x00b6 _IP2H = 0x00b7 _SPSTAT = 0x00cd _SPCTL = 0x00ce _SPDAT = 0x00cf _ADC_CONTR = 0x00bc _ADC_RES = 0x00bd _ADC_RESL = 0x00be _ADCCFG = 0x00de _ADCTIM_X = 0xfea8 _CCON = 0x00d8 _CMOD = 0x00d9 _CCAPM0 = 0x00da _CCAPM1 = 0x00db _CCAPM2 = 0x00dc _CCAPM3 = 0x00dd _CCAP0L = 0x00ea _CCAP1L = 0x00eb _CCAP2L = 0x00ec _CCAP3L = 0x00ed _PCA_PWM0 = 0x00f2 _PCA_PWM1 = 0x00f3 _PCA_PWM2 = 0x00f4 _PCA_PWM3 = 0x00f5 _WDT_CONTR = 0x00c1 _IAP_DATA = 0x00c2 _IAP_ADDRH = 0x00c3 _IAP_ADDRL = 0x00c4 _IAP_CMD = 0x00c5 _IAP_TRIG = 0x00c6 _IAP_CONTR = 0x00c7 _IAP_TPS = 0x00f7 _IRCBAND_REG = 0x009d _TA = 0x00ae _CMPCR1 = 0x00e6 _CMPCR2 = 0x00e7 ;-------------------------------------------------------- ; special function bits ;-------------------------------------------------------- .area RSEG (ABS,DATA) .org 0x0000 _TF0 = 0x008d _TR0 = 0x008c _IE0 = 0x0089 _IT0 = 0x0088 _TF1 = 0x008f _TR1 = 0x008e _TI = 0x0099 _RI = 0x0098 _REN = 0x009c _EA = 0x00af _ES = 0x00ac _ET0 = 0x00a9 _ET1 = 0x00ab _EADC = 0x00ad ;-------------------------------------------------------- ; overlayable register banks ;-------------------------------------------------------- .area REG_BANK_0 (REL,OVR,DATA) .ds 8 ;-------------------------------------------------------- ; overlayable bit register bank ;-------------------------------------------------------- .area BIT_BANK (REL,OVR,DATA) bits: .ds 1 b0 = bits[0] b1 = bits[1] b2 = bits[2] b3 = bits[3] b4 = bits[4] b5 = bits[5] b6 = bits[6] b7 = bits[7] ;-------------------------------------------------------- ; internal ram data ;-------------------------------------------------------- .area DSEG (DATA) _uart1_send_bytes_PARM_2: .ds 1 ;-------------------------------------------------------- ; overlayable items in internal ram ;-------------------------------------------------------- .area OSEG (OVR,DATA) ;-------------------------------------------------------- ; indirectly addressable internal ram data ;-------------------------------------------------------- .area ISEG (DATA) ;-------------------------------------------------------- ; absolute internal ram data ;-------------------------------------------------------- .area IABS (ABS,DATA) .area IABS (ABS,DATA) ;-------------------------------------------------------- ; bit data ;-------------------------------------------------------- .area BSEG (BIT) _uart1_rx_available_sloc0_1_0: .ds 1 ;-------------------------------------------------------- ; paged external ram data ;-------------------------------------------------------- .area PSEG (PAG,XDATA) ;-------------------------------------------------------- ; external ram data ;-------------------------------------------------------- .area XSEG (XDATA) _g_uart1_rx_buf:: .ds 64 ;-------------------------------------------------------- ; absolute external ram data ;-------------------------------------------------------- .area XABS (ABS,XDATA) ;-------------------------------------------------------- ; external initialized ram data ;-------------------------------------------------------- .area XISEG (XDATA) _g_uart1_rx_head:: .ds 1 _g_uart1_rx_tail:: .ds 1 .area HOME (CODE) .area GSINIT0 (CODE) .area GSINIT1 (CODE) .area GSINIT2 (CODE) .area GSINIT3 (CODE) .area GSINIT4 (CODE) .area GSINIT5 (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area CSEG (CODE) ;-------------------------------------------------------- ; global & static initialisations ;-------------------------------------------------------- .area HOME (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area GSINIT (CODE) ;-------------------------------------------------------- ; Home ;-------------------------------------------------------- .area HOME (CODE) .area HOME (CODE) ;-------------------------------------------------------- ; code ;-------------------------------------------------------- .area CSEG (CODE) ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_init' ;------------------------------------------------------------ ;baud Allocated to registers r4 r5 r6 r7 ;b Allocated to registers ;------------------------------------------------------------ ; src/uart.c:17: void uart1_init(uint32_t baud) ; ----------------------------------------- ; function uart1_init ; ----------------------------------------- _uart1_init: ar7 = 0x07 ar6 = 0x06 ar5 = 0x05 ar4 = 0x04 ar3 = 0x03 ar2 = 0x02 ar1 = 0x01 ar0 = 0x00 mov r4,dpl mov r5,dph mov r6,b mov r7,a ; src/uart.c:20: P3M0 |= 0x02; /* P3.1 推挽输出 */ orl _P3M0,#0x02 ; src/uart.c:21: P3M1 &= ~0x02; anl _P3M1,#0xfd ; src/uart.c:22: P3M0 &= ~0x01; /* P3.0 准双向(默认上拉) */ anl _P3M0,#0xfe ; src/uart.c:23: P3M1 &= ~0x01; anl _P3M1,#0xfe ; src/uart.c:26: P_SW1 &= ~0x03; anl _P_SW1,#0xfc ; src/uart.c:28: SCON = 0x50; /* 模式 1 (8 位数据,可变波特率) + REN */ mov _SCON,#0x50 ; src/uart.c:39: b = 256 - (uint16_t)(SYS_CLK_HZ / 16 / baud); mov __divulong_PARM_2,r4 mov (__divulong_PARM_2 + 1),r5 mov (__divulong_PARM_2 + 2),r6 mov (__divulong_PARM_2 + 3),r7 mov dptr,#0xe360 mov b,#0x16 clr a lcall __divulong mov r4,dpl clr c clr a subb a,r4 mov _BRT,a ; src/uart.c:42: AUXR |= 0x10; /* S1ST2 = 1: T2 为波特率 (不用) — 实际不用 */ orl _AUXR,#0x10 ; src/uart.c:44: AUXR &= ~0x10; /* S1ST2 = 0: T1 为波特率(传统) */ anl _AUXR,#0xef ; src/uart.c:45: AUXR |= 0x01; /* S1BRT = 1: UART1 使用 BRT */ orl _AUXR,#0x01 ; src/uart.c:48: ES = 1; ; assignBit setb _ES ; src/uart.c:49: EA = 1; ; assignBit setb _EA ; src/uart.c:50: } ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_send_byte' ;------------------------------------------------------------ ;b Allocated to registers r7 ;------------------------------------------------------------ ; src/uart.c:52: void uart1_send_byte(uint8_t b) ; ----------------------------------------- ; function uart1_send_byte ; ----------------------------------------- _uart1_send_byte: mov r7,dpl ; src/uart.c:54: while (!TI); 00101$: ; src/uart.c:55: TI = 0; ; assignBit jbc _TI,00114$ sjmp 00101$ 00114$: ; src/uart.c:56: SBUF = b; mov _SBUF,r7 ; src/uart.c:57: } ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_send_bytes' ;------------------------------------------------------------ ;len Allocated with name '_uart1_send_bytes_PARM_2' ;buf Allocated to registers ;------------------------------------------------------------ ; src/uart.c:59: void uart1_send_bytes(const uint8_t *buf, uint8_t len) ; ----------------------------------------- ; function uart1_send_bytes ; ----------------------------------------- _uart1_send_bytes: mov r5,dpl mov r6,dph mov r7,b ; src/uart.c:61: while (len--) uart1_send_byte(*buf++); mov r4,_uart1_send_bytes_PARM_2 00101$: mov ar3,r4 dec r4 mov a,r3 jz 00104$ mov dpl,r5 mov dph,r6 mov b,r7 lcall __gptrget mov r3,a inc dptr mov r5,dpl mov r6,dph mov dpl,r3 push ar7 push ar6 push ar5 push ar4 lcall _uart1_send_byte pop ar4 pop ar5 pop ar6 pop ar7 sjmp 00101$ 00104$: ; src/uart.c:62: } ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_rx_available' ;------------------------------------------------------------ ; src/uart.c:64: uint8_t uart1_rx_available(void) ; ----------------------------------------- ; function uart1_rx_available ; ----------------------------------------- _uart1_rx_available: ; src/uart.c:66: return (g_uart1_rx_head != g_uart1_rx_tail); mov dptr,#_g_uart1_rx_head movx a,@dptr mov r7,a mov dptr,#_g_uart1_rx_tail movx a,@dptr mov r6,a mov a,r7 cjne a,ar6,00103$ setb c sjmp 00104$ 00103$: clr c 00104$: cpl c mov _uart1_rx_available_sloc0_1_0,c clr a rlc a mov dpl,a ; src/uart.c:67: } ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_read_byte' ;------------------------------------------------------------ ;b Allocated to registers r7 ;------------------------------------------------------------ ; src/uart.c:69: uint8_t uart1_read_byte(void) ; ----------------------------------------- ; function uart1_read_byte ; ----------------------------------------- _uart1_read_byte: ; src/uart.c:71: if (g_uart1_rx_head == g_uart1_rx_tail) return 0; mov dptr,#_g_uart1_rx_head movx a,@dptr mov r7,a mov dptr,#_g_uart1_rx_tail movx a,@dptr mov r6,a mov a,r7 cjne a,ar6,00102$ mov dpl,#0x00 ret 00102$: ; src/uart.c:72: uint8_t b = g_uart1_rx_buf[g_uart1_rx_tail]; mov dptr,#_g_uart1_rx_tail movx a,@dptr add a,#_g_uart1_rx_buf mov dpl,a clr a addc a,#(_g_uart1_rx_buf >> 8) mov dph,a movx a,@dptr mov r7,a ; src/uart.c:73: g_uart1_rx_tail = (g_uart1_rx_tail + 1) % UART1_RX_BUF_SIZE; mov dptr,#_g_uart1_rx_tail movx a,@dptr mov r6,a mov r5,#0x00 mov dpl,r6 mov dph,r5 inc dptr mov __modsint_PARM_2,#0x40 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00 mov (__modsint_PARM_2 + 1),r5 push ar7 lcall __modsint mov r5,dpl pop ar7 mov dptr,#_g_uart1_rx_tail mov a,r5 movx @dptr,a ; src/uart.c:74: return b; mov dpl,r7 ; src/uart.c:75: } ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'uart1_isr' ;------------------------------------------------------------ ;next Allocated to registers r6 ;------------------------------------------------------------ ; src/uart.c:78: void uart1_isr(void) __interrupt (INT_ADDR_UART1) ; ----------------------------------------- ; function uart1_isr ; ----------------------------------------- _uart1_isr: push bits push acc push b push dpl push dph push (0+7) push (0+6) push (0+5) push (0+4) push (0+3) push (0+2) push (0+1) push (0+0) push psw mov psw,#0x00 ; src/uart.c:80: if (RI) { ; src/uart.c:81: RI = 0; ; assignBit jbc _RI,00121$ sjmp 00104$ 00121$: ; src/uart.c:82: uint8_t next = (g_uart1_rx_head + 1) % UART1_RX_BUF_SIZE; mov dptr,#_g_uart1_rx_head movx a,@dptr mov r7,a mov r6,#0x00 mov dpl,r7 mov dph,r6 inc dptr mov __modsint_PARM_2,#0x40 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00 mov (__modsint_PARM_2 + 1),r6 lcall __modsint mov r6,dpl ; src/uart.c:83: if (next != g_uart1_rx_tail) { mov dptr,#_g_uart1_rx_tail movx a,@dptr mov r7,a mov a,r6 cjne a,ar7,00122$ sjmp 00104$ 00122$: ; src/uart.c:84: g_uart1_rx_buf[g_uart1_rx_head] = SBUF; mov dptr,#_g_uart1_rx_head movx a,@dptr mov r7,a add a,#_g_uart1_rx_buf mov dpl,a clr a addc a,#(_g_uart1_rx_buf >> 8) mov dph,a mov a,_SBUF movx @dptr,a ; src/uart.c:85: g_uart1_rx_head = next; mov dptr,#_g_uart1_rx_head mov a,r6 movx @dptr,a 00104$: ; src/uart.c:88: if (TI) { ; src/uart.c:89: TI = 0; ; assignBit jbc _TI,00123$ sjmp 00107$ 00123$: 00107$: ; src/uart.c:91: } pop psw pop (0+0) pop (0+1) pop (0+2) pop (0+3) pop (0+4) pop (0+5) pop (0+6) pop (0+7) pop dph pop dpl pop b pop acc pop bits reti .area CSEG (CODE) .area CONST (CODE) _DEFAULT_ADDR: .db #0xe7 ; 231 .db #0xe7 ; 231 .db #0xe7 ; 231 .db #0xe7 ; 231 .db #0xc2 ; 194 .area XINIT (CODE) __xinit__g_uart1_rx_head: .db #0x00 ; 0 __xinit__g_uart1_rx_tail: .db #0x00 ; 0 .area CABS (ABS,CODE)