1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 4.2.0 #13081 (Linux) 4 ;-------------------------------------------------------- 5 .module nrf24l01 6 .optsdcc -mmcs51 --model-small 7 8 ;-------------------------------------------------------- 9 ; Public variables in this module 10 ;-------------------------------------------------------- 11 .globl _gpio_write 12 .globl _gpio_set_mode 13 .globl _delay_ms 14 .globl _delay_us 15 .globl _spi_transfer 16 .globl _EADC 17 .globl _ET1 18 .globl _ET0 19 .globl _ES 20 .globl _EA 21 .globl _REN 22 .globl _RI 23 .globl _TI 24 .globl _TR1 25 .globl _TF1 26 .globl _IT0 27 .globl _IE0 28 .globl _TR0 29 .globl _TF0 30 .globl _CMPCR2 31 .globl _CMPCR1 32 .globl _TA 33 .globl _IRCBAND_REG 34 .globl _IAP_TPS 35 .globl _IAP_CONTR 36 .globl _IAP_TRIG 37 .globl _IAP_CMD 38 .globl _IAP_ADDRL 39 .globl _IAP_ADDRH 40 .globl _IAP_DATA 41 .globl _WDT_CONTR 42 .globl _PCA_PWM3 43 .globl _PCA_PWM2 44 .globl _PCA_PWM1 45 .globl _PCA_PWM0 46 .globl _CCAP3L 47 .globl _CCAP2L 48 .globl _CCAP1L 49 .globl _CCAP0L 50 .globl _CCAPM3 51 .globl _CCAPM2 52 .globl _CCAPM1 53 .globl _CCAPM0 54 .globl _CMOD 55 .globl _CCON 56 .globl _ADCTIM_X 57 .globl _ADCCFG 58 .globl _ADC_RESL 59 .globl _ADC_RES 60 .globl _ADC_CONTR 61 .globl _SPDAT 62 .globl _SPCTL 63 .globl _SPSTAT 64 .globl _IP2H 65 .globl _IP2 66 .globl _IP 67 .globl _IE2 68 .globl _IE 69 .globl _BRT 70 .globl _P_SW1 71 .globl _SADEN 72 .globl _SADDR 73 .globl _S2BUF 74 .globl _S2CON 75 .globl _SBUF 76 .globl _SCON 77 .globl _TM4PS_X 78 .globl _TM3PS_X 79 .globl _TM2PS_X 80 .globl _T4T3M 81 .globl _T4L 82 .globl _T4H 83 .globl _T3L 84 .globl _T3H 85 .globl _T2L 86 .globl _T2H 87 .globl _INTCLKO 88 .globl _AUXR 89 .globl _TH1 90 .globl _TH0 91 .globl _TL1 92 .globl _TL0 93 .globl _TMOD 94 .globl _TCON 95 .globl _P_SW2 96 .globl _P5M0 97 .globl _P5M1 98 .globl _P4M0 99 .globl _P4M1 100 .globl _P3M0 101 .globl _P3M1 102 .globl _P2M0 103 .globl _P2M1 104 .globl _P1M0 105 .globl _P1M1 106 .globl _P0M0 107 .globl _P0M1 108 .globl _PSW 109 .globl _B 110 .globl _ACC 111 .globl _PCON 112 .globl _DPH 113 .globl _DPL 114 .globl _SP 115 .globl _P5 116 .globl _P4 117 .globl _P3 118 .globl _P2 119 .globl _P1 120 .globl _P0 121 .globl _g_nrf_status 122 .globl _nrf24_init 123 .globl _nrf24_check 124 .globl _nrf24_set_channel 125 .globl _nrf24_set_address 126 .globl _nrf24_set_rx_mode 127 .globl _nrf24_data_ready 128 .globl _nrf24_write_ack_payload 129 .globl _nrf24_irq_handler 130 ;-------------------------------------------------------- 131 ; special function registers 132 ;-------------------------------------------------------- 133 .area RSEG (ABS,DATA) 000000 134 .org 0x0000 000080 135 _P0 = 0x0080 000090 136 _P1 = 0x0090 0000A0 137 _P2 = 0x00a0 0000B0 138 _P3 = 0x00b0 0000C0 139 _P4 = 0x00c0 0000C8 140 _P5 = 0x00c8 000081 141 _SP = 0x0081 000082 142 _DPL = 0x0082 000083 143 _DPH = 0x0083 000087 144 _PCON = 0x0087 0000E0 145 _ACC = 0x00e0 0000F0 146 _B = 0x00f0 0000D0 147 _PSW = 0x00d0 000093 148 _P0M1 = 0x0093 000094 149 _P0M0 = 0x0094 000091 150 _P1M1 = 0x0091 000092 151 _P1M0 = 0x0092 000095 152 _P2M1 = 0x0095 000096 153 _P2M0 = 0x0096 0000B1 154 _P3M1 = 0x00b1 0000B2 155 _P3M0 = 0x00b2 0000B3 156 _P4M1 = 0x00b3 0000B4 157 _P4M0 = 0x00b4 0000C9 158 _P5M1 = 0x00c9 0000CA 159 _P5M0 = 0x00ca 0000BA 160 _P_SW2 = 0x00ba 000088 161 _TCON = 0x0088 000089 162 _TMOD = 0x0089 00008A 163 _TL0 = 0x008a 00008B 164 _TL1 = 0x008b 00008C 165 _TH0 = 0x008c 00008D 166 _TH1 = 0x008d 00008E 167 _AUXR = 0x008e 00008F 168 _INTCLKO = 0x008f 0000D6 169 _T2H = 0x00d6 0000D7 170 _T2L = 0x00d7 0000D4 171 _T3H = 0x00d4 0000D5 172 _T3L = 0x00d5 0000D2 173 _T4H = 0x00d2 0000D3 174 _T4L = 0x00d3 0000D1 175 _T4T3M = 0x00d1 00FEA1 176 _TM2PS_X = 0xfea1 00FEA2 177 _TM3PS_X = 0xfea2 00FEA3 178 _TM4PS_X = 0xfea3 000098 179 _SCON = 0x0098 000099 180 _SBUF = 0x0099 00009A 181 _S2CON = 0x009a 00009B 182 _S2BUF = 0x009b 0000A9 183 _SADDR = 0x00a9 0000B9 184 _SADEN = 0x00b9 0000A2 185 _P_SW1 = 0x00a2 00009C 186 _BRT = 0x009c 0000A8 187 _IE = 0x00a8 0000AF 188 _IE2 = 0x00af 0000B8 189 _IP = 0x00b8 0000B6 190 _IP2 = 0x00b6 0000B7 191 _IP2H = 0x00b7 0000CD 192 _SPSTAT = 0x00cd 0000CE 193 _SPCTL = 0x00ce 0000CF 194 _SPDAT = 0x00cf 0000BC 195 _ADC_CONTR = 0x00bc 0000BD 196 _ADC_RES = 0x00bd 0000BE 197 _ADC_RESL = 0x00be 0000DE 198 _ADCCFG = 0x00de 00FEA8 199 _ADCTIM_X = 0xfea8 0000D8 200 _CCON = 0x00d8 0000D9 201 _CMOD = 0x00d9 0000DA 202 _CCAPM0 = 0x00da 0000DB 203 _CCAPM1 = 0x00db 0000DC 204 _CCAPM2 = 0x00dc 0000DD 205 _CCAPM3 = 0x00dd 0000EA 206 _CCAP0L = 0x00ea 0000EB 207 _CCAP1L = 0x00eb 0000EC 208 _CCAP2L = 0x00ec 0000ED 209 _CCAP3L = 0x00ed 0000F2 210 _PCA_PWM0 = 0x00f2 0000F3 211 _PCA_PWM1 = 0x00f3 0000F4 212 _PCA_PWM2 = 0x00f4 0000F5 213 _PCA_PWM3 = 0x00f5 0000C1 214 _WDT_CONTR = 0x00c1 0000C2 215 _IAP_DATA = 0x00c2 0000C3 216 _IAP_ADDRH = 0x00c3 0000C4 217 _IAP_ADDRL = 0x00c4 0000C5 218 _IAP_CMD = 0x00c5 0000C6 219 _IAP_TRIG = 0x00c6 0000C7 220 _IAP_CONTR = 0x00c7 0000F7 221 _IAP_TPS = 0x00f7 00009D 222 _IRCBAND_REG = 0x009d 0000AE 223 _TA = 0x00ae 0000E6 224 _CMPCR1 = 0x00e6 0000E7 225 _CMPCR2 = 0x00e7 226 ;-------------------------------------------------------- 227 ; special function bits 228 ;-------------------------------------------------------- 229 .area RSEG (ABS,DATA) 000000 230 .org 0x0000 00008D 231 _TF0 = 0x008d 00008C 232 _TR0 = 0x008c 000089 233 _IE0 = 0x0089 000088 234 _IT0 = 0x0088 00008F 235 _TF1 = 0x008f 00008E 236 _TR1 = 0x008e 000099 237 _TI = 0x0099 000098 238 _RI = 0x0098 00009C 239 _REN = 0x009c 0000AF 240 _EA = 0x00af 0000AC 241 _ES = 0x00ac 0000A9 242 _ET0 = 0x00a9 0000AB 243 _ET1 = 0x00ab 0000AD 244 _EADC = 0x00ad 245 ;-------------------------------------------------------- 246 ; overlayable register banks 247 ;-------------------------------------------------------- 248 .area REG_BANK_0 (REL,OVR,DATA) 000000 249 .ds 8 250 ;-------------------------------------------------------- 251 ; internal ram data 252 ;-------------------------------------------------------- 253 .area DSEG (DATA) 000000 254 _nrf_w_reg_PARM_2: 000000 255 .ds 1 000001 256 _nrf_w_buf_PARM_2: 000001 257 .ds 3 000004 258 _nrf_w_buf_PARM_3: 000004 259 .ds 1 000005 260 _nrf_r_buf_PARM_2: 000005 261 .ds 3 000008 262 _nrf_r_buf_PARM_3: 000008 263 .ds 1 000009 264 _nrf24_check_buf_65536_33: 000009 265 .ds 5 00000E 266 _nrf24_check_rb_65536_33: 00000E 267 .ds 5 268 ;-------------------------------------------------------- 269 ; overlayable items in internal ram 270 ;-------------------------------------------------------- 271 ;-------------------------------------------------------- 272 ; indirectly addressable internal ram data 273 ;-------------------------------------------------------- 274 .area ISEG (DATA) 275 ;-------------------------------------------------------- 276 ; absolute internal ram data 277 ;-------------------------------------------------------- 278 .area IABS (ABS,DATA) 279 .area IABS (ABS,DATA) 280 ;-------------------------------------------------------- 281 ; bit data 282 ;-------------------------------------------------------- 283 .area BSEG (BIT) 284 ;-------------------------------------------------------- 285 ; paged external ram data 286 ;-------------------------------------------------------- 287 .area PSEG (PAG,XDATA) 288 ;-------------------------------------------------------- 289 ; external ram data 290 ;-------------------------------------------------------- 291 .area XSEG (XDATA) 000000 292 _g_nrf_status:: 000000 293 .ds 36 294 ;-------------------------------------------------------- 295 ; absolute external ram data 296 ;-------------------------------------------------------- 297 .area XABS (ABS,XDATA) 298 ;-------------------------------------------------------- 299 ; external initialized ram data 300 ;-------------------------------------------------------- 301 .area XISEG (XDATA) 302 .area HOME (CODE) 303 .area GSINIT0 (CODE) 304 .area GSINIT1 (CODE) 305 .area GSINIT2 (CODE) 306 .area GSINIT3 (CODE) 307 .area GSINIT4 (CODE) 308 .area GSINIT5 (CODE) 309 .area GSINIT (CODE) 310 .area GSFINAL (CODE) 311 .area CSEG (CODE) 312 ;-------------------------------------------------------- 313 ; global & static initialisations 314 ;-------------------------------------------------------- 315 .area HOME (CODE) 316 .area GSINIT (CODE) 317 .area GSFINAL (CODE) 318 .area GSINIT (CODE) 319 ;-------------------------------------------------------- 320 ; Home 321 ;-------------------------------------------------------- 322 .area HOME (CODE) 323 .area HOME (CODE) 324 ;-------------------------------------------------------- 325 ; code 326 ;-------------------------------------------------------- 327 .area CSEG (CODE) 328 ;------------------------------------------------------------ 329 ;Allocation info for local variables in function 'nrf_w_reg' 330 ;------------------------------------------------------------ 331 ;val Allocated with name '_nrf_w_reg_PARM_2' 332 ;reg Allocated to registers r7 333 ;r Allocated to registers r7 334 ;------------------------------------------------------------ 335 ; src/nrf24l01.c:21: static uint8_t nrf_w_reg(uint8_t reg, uint8_t val) 336 ; ----------------------------------------- 337 ; function nrf_w_reg 338 ; ----------------------------------------- 000000 339 _nrf_w_reg: 000007 340 ar7 = 0x07 000006 341 ar6 = 0x06 000005 342 ar5 = 0x05 000004 343 ar4 = 0x04 000003 344 ar3 = 0x03 000002 345 ar2 = 0x02 000001 346 ar1 = 0x01 000000 347 ar0 = 0x00 000000 AF 82 [24] 348 mov r7,dpl 349 ; src/nrf24l01.c:24: CSN_L(); 000002 75*00 04 [24] 350 mov _gpio_write_PARM_2,#0x04 000005 75*00 00 [24] 351 mov _gpio_write_PARM_3,#0x00 000008 75 82 05 [24] 352 mov dpl,#0x05 00000B C0 07 [24] 353 push ar7 00000D 12r00r00 [24] 354 lcall _gpio_write 000010 D0 07 [24] 355 pop ar7 356 ; src/nrf24l01.c:25: r = spi_transfer(reg); 000012 8F 82 [24] 357 mov dpl,r7 000014 12r00r00 [24] 358 lcall _spi_transfer 000017 AF 82 [24] 359 mov r7,dpl 360 ; src/nrf24l01.c:26: spi_transfer(val); 000019 85*00 82 [24] 361 mov dpl,_nrf_w_reg_PARM_2 00001C C0 07 [24] 362 push ar7 00001E 12r00r00 [24] 363 lcall _spi_transfer 364 ; src/nrf24l01.c:27: CSN_H(); 000021 75*00 04 [24] 365 mov _gpio_write_PARM_2,#0x04 000024 75*00 01 [24] 366 mov _gpio_write_PARM_3,#0x01 000027 75 82 05 [24] 367 mov dpl,#0x05 00002A 12r00r00 [24] 368 lcall _gpio_write 00002D D0 07 [24] 369 pop ar7 370 ; src/nrf24l01.c:28: return r; 00002F 8F 82 [24] 371 mov dpl,r7 372 ; src/nrf24l01.c:29: } 000031 22 [24] 373 ret 374 ;------------------------------------------------------------ 375 ;Allocation info for local variables in function 'nrf_w_buf' 376 ;------------------------------------------------------------ 377 ;buf Allocated with name '_nrf_w_buf_PARM_2' 378 ;len Allocated with name '_nrf_w_buf_PARM_3' 379 ;reg Allocated to registers r7 380 ;r Allocated to registers r7 381 ;------------------------------------------------------------ 382 ; src/nrf24l01.c:31: static uint8_t nrf_w_buf(uint8_t reg, const uint8_t *buf, uint8_t len) 383 ; ----------------------------------------- 384 ; function nrf_w_buf 385 ; ----------------------------------------- 000032 386 _nrf_w_buf: 000032 AF 82 [24] 387 mov r7,dpl 388 ; src/nrf24l01.c:34: CSN_L(); 000034 75*00 04 [24] 389 mov _gpio_write_PARM_2,#0x04 000037 75*00 00 [24] 390 mov _gpio_write_PARM_3,#0x00 00003A 75 82 05 [24] 391 mov dpl,#0x05 00003D C0 07 [24] 392 push ar7 00003F 12r00r00 [24] 393 lcall _gpio_write 000042 D0 07 [24] 394 pop ar7 395 ; src/nrf24l01.c:35: r = spi_transfer(reg); 000044 8F 82 [24] 396 mov dpl,r7 000046 12r00r00 [24] 397 lcall _spi_transfer 000049 AF 82 [24] 398 mov r7,dpl 399 ; src/nrf24l01.c:36: while (len--) spi_transfer(*buf++); 00004B AC*01 [24] 400 mov r4,_nrf_w_buf_PARM_2 00004D AD*02 [24] 401 mov r5,(_nrf_w_buf_PARM_2 + 1) 00004F AE*03 [24] 402 mov r6,(_nrf_w_buf_PARM_2 + 2) 000051 AB*04 [24] 403 mov r3,_nrf_w_buf_PARM_3 000053 404 00101$: 000053 8B 02 [24] 405 mov ar2,r3 000055 1B [12] 406 dec r3 000056 EA [12] 407 mov a,r2 000057 60 2A [24] 408 jz 00103$ 000059 8C 82 [24] 409 mov dpl,r4 00005B 8D 83 [24] 410 mov dph,r5 00005D 8E F0 [24] 411 mov b,r6 00005F 12r00r00 [24] 412 lcall __gptrget 000062 FA [12] 413 mov r2,a 000063 A3 [24] 414 inc dptr 000064 AC 82 [24] 415 mov r4,dpl 000066 AD 83 [24] 416 mov r5,dph 000068 8A 82 [24] 417 mov dpl,r2 00006A C0 07 [24] 418 push ar7 00006C C0 06 [24] 419 push ar6 00006E C0 05 [24] 420 push ar5 000070 C0 04 [24] 421 push ar4 000072 C0 03 [24] 422 push ar3 000074 12r00r00 [24] 423 lcall _spi_transfer 000077 D0 03 [24] 424 pop ar3 000079 D0 04 [24] 425 pop ar4 00007B D0 05 [24] 426 pop ar5 00007D D0 06 [24] 427 pop ar6 00007F D0 07 [24] 428 pop ar7 000081 80 D0 [24] 429 sjmp 00101$ 000083 430 00103$: 431 ; src/nrf24l01.c:37: CSN_H(); 000083 75*00 04 [24] 432 mov _gpio_write_PARM_2,#0x04 000086 75*00 01 [24] 433 mov _gpio_write_PARM_3,#0x01 000089 75 82 05 [24] 434 mov dpl,#0x05 00008C C0 07 [24] 435 push ar7 00008E 12r00r00 [24] 436 lcall _gpio_write 000091 D0 07 [24] 437 pop ar7 438 ; src/nrf24l01.c:38: return r; 000093 8F 82 [24] 439 mov dpl,r7 440 ; src/nrf24l01.c:39: } 000095 22 [24] 441 ret 442 ;------------------------------------------------------------ 443 ;Allocation info for local variables in function 'nrf_r_reg' 444 ;------------------------------------------------------------ 445 ;reg Allocated to registers r7 446 ;v Allocated to registers r7 447 ;------------------------------------------------------------ 448 ; src/nrf24l01.c:41: static uint8_t nrf_r_reg(uint8_t reg) 449 ; ----------------------------------------- 450 ; function nrf_r_reg 451 ; ----------------------------------------- 000096 452 _nrf_r_reg: 000096 AF 82 [24] 453 mov r7,dpl 454 ; src/nrf24l01.c:44: CSN_L(); 000098 75*00 04 [24] 455 mov _gpio_write_PARM_2,#0x04 00009B 75*00 00 [24] 456 mov _gpio_write_PARM_3,#0x00 00009E 75 82 05 [24] 457 mov dpl,#0x05 0000A1 C0 07 [24] 458 push ar7 0000A3 12r00r00 [24] 459 lcall _gpio_write 0000A6 D0 07 [24] 460 pop ar7 461 ; src/nrf24l01.c:45: spi_transfer(reg); 0000A8 8F 82 [24] 462 mov dpl,r7 0000AA 12r00r00 [24] 463 lcall _spi_transfer 464 ; src/nrf24l01.c:46: v = spi_transfer(0xFF); 0000AD 75 82 FF [24] 465 mov dpl,#0xff 0000B0 12r00r00 [24] 466 lcall _spi_transfer 0000B3 AF 82 [24] 467 mov r7,dpl 468 ; src/nrf24l01.c:47: CSN_H(); 0000B5 75*00 04 [24] 469 mov _gpio_write_PARM_2,#0x04 0000B8 75*00 01 [24] 470 mov _gpio_write_PARM_3,#0x01 0000BB 75 82 05 [24] 471 mov dpl,#0x05 0000BE C0 07 [24] 472 push ar7 0000C0 12r00r00 [24] 473 lcall _gpio_write 0000C3 D0 07 [24] 474 pop ar7 475 ; src/nrf24l01.c:48: return v; 0000C5 8F 82 [24] 476 mov dpl,r7 477 ; src/nrf24l01.c:49: } 0000C7 22 [24] 478 ret 479 ;------------------------------------------------------------ 480 ;Allocation info for local variables in function 'nrf_r_buf' 481 ;------------------------------------------------------------ 482 ;buf Allocated with name '_nrf_r_buf_PARM_2' 483 ;len Allocated with name '_nrf_r_buf_PARM_3' 484 ;reg Allocated to registers r7 485 ;r Allocated to registers r7 486 ;------------------------------------------------------------ 487 ; src/nrf24l01.c:51: static uint8_t nrf_r_buf(uint8_t reg, uint8_t *buf, uint8_t len) 488 ; ----------------------------------------- 489 ; function nrf_r_buf 490 ; ----------------------------------------- 0000C8 491 _nrf_r_buf: 0000C8 AF 82 [24] 492 mov r7,dpl 493 ; src/nrf24l01.c:54: CSN_L(); 0000CA 75*00 04 [24] 494 mov _gpio_write_PARM_2,#0x04 0000CD 75*00 00 [24] 495 mov _gpio_write_PARM_3,#0x00 0000D0 75 82 05 [24] 496 mov dpl,#0x05 0000D3 C0 07 [24] 497 push ar7 0000D5 12r00r00 [24] 498 lcall _gpio_write 0000D8 D0 07 [24] 499 pop ar7 500 ; src/nrf24l01.c:55: r = spi_transfer(reg); 0000DA 8F 82 [24] 501 mov dpl,r7 0000DC 12r00r00 [24] 502 lcall _spi_transfer 0000DF AF 82 [24] 503 mov r7,dpl 504 ; src/nrf24l01.c:56: while (len--) *buf++ = spi_transfer(0xFF); 0000E1 AC*05 [24] 505 mov r4,_nrf_r_buf_PARM_2 0000E3 AD*06 [24] 506 mov r5,(_nrf_r_buf_PARM_2 + 1) 0000E5 AE*07 [24] 507 mov r6,(_nrf_r_buf_PARM_2 + 2) 0000E7 AB*08 [24] 508 mov r3,_nrf_r_buf_PARM_3 0000E9 509 00101$: 0000E9 8B 02 [24] 510 mov ar2,r3 0000EB 1B [12] 511 dec r3 0000EC EA [12] 512 mov a,r2 0000ED 60 2D [24] 513 jz 00103$ 0000EF 75 82 FF [24] 514 mov dpl,#0xff 0000F2 C0 07 [24] 515 push ar7 0000F4 C0 06 [24] 516 push ar6 0000F6 C0 05 [24] 517 push ar5 0000F8 C0 04 [24] 518 push ar4 0000FA C0 03 [24] 519 push ar3 0000FC 12r00r00 [24] 520 lcall _spi_transfer 0000FF AA 82 [24] 521 mov r2,dpl 000101 D0 03 [24] 522 pop ar3 000103 D0 04 [24] 523 pop ar4 000105 D0 05 [24] 524 pop ar5 000107 D0 06 [24] 525 pop ar6 000109 D0 07 [24] 526 pop ar7 00010B 8C 82 [24] 527 mov dpl,r4 00010D 8D 83 [24] 528 mov dph,r5 00010F 8E F0 [24] 529 mov b,r6 000111 EA [12] 530 mov a,r2 000112 12r00r00 [24] 531 lcall __gptrput 000115 A3 [24] 532 inc dptr 000116 AC 82 [24] 533 mov r4,dpl 000118 AD 83 [24] 534 mov r5,dph 00011A 80 CD [24] 535 sjmp 00101$ 00011C 536 00103$: 537 ; src/nrf24l01.c:57: CSN_H(); 00011C 75*00 04 [24] 538 mov _gpio_write_PARM_2,#0x04 00011F 75*00 01 [24] 539 mov _gpio_write_PARM_3,#0x01 000122 75 82 05 [24] 540 mov dpl,#0x05 000125 C0 07 [24] 541 push ar7 000127 12r00r00 [24] 542 lcall _gpio_write 00012A D0 07 [24] 543 pop ar7 544 ; src/nrf24l01.c:58: return r; 00012C 8F 82 [24] 545 mov dpl,r7 546 ; src/nrf24l01.c:59: } 00012E 22 [24] 547 ret 548 ;------------------------------------------------------------ 549 ;Allocation info for local variables in function 'nrf_flush_rx' 550 ;------------------------------------------------------------ 551 ; src/nrf24l01.c:61: static void nrf_flush_rx(void) { CSN_L(); spi_transfer(NRF_CMD_FLUSH_RX); CSN_H(); } 552 ; ----------------------------------------- 553 ; function nrf_flush_rx 554 ; ----------------------------------------- 00012F 555 _nrf_flush_rx: 00012F 75*00 04 [24] 556 mov _gpio_write_PARM_2,#0x04 000132 75*00 00 [24] 557 mov _gpio_write_PARM_3,#0x00 000135 75 82 05 [24] 558 mov dpl,#0x05 000138 12r00r00 [24] 559 lcall _gpio_write 00013B 75 82 E2 [24] 560 mov dpl,#0xe2 00013E 12r00r00 [24] 561 lcall _spi_transfer 000141 75*00 04 [24] 562 mov _gpio_write_PARM_2,#0x04 000144 75*00 01 [24] 563 mov _gpio_write_PARM_3,#0x01 000147 75 82 05 [24] 564 mov dpl,#0x05 00014A 02r00r00 [24] 565 ljmp _gpio_write 566 ;------------------------------------------------------------ 567 ;Allocation info for local variables in function 'nrf_flush_tx' 568 ;------------------------------------------------------------ 569 ; src/nrf24l01.c:62: static void nrf_flush_tx(void) { CSN_L(); spi_transfer(NRF_CMD_FLUSH_TX); CSN_H(); } 570 ; ----------------------------------------- 571 ; function nrf_flush_tx 572 ; ----------------------------------------- 00014D 573 _nrf_flush_tx: 00014D 75*00 04 [24] 574 mov _gpio_write_PARM_2,#0x04 000150 75*00 00 [24] 575 mov _gpio_write_PARM_3,#0x00 000153 75 82 05 [24] 576 mov dpl,#0x05 000156 12r00r00 [24] 577 lcall _gpio_write 000159 75 82 E1 [24] 578 mov dpl,#0xe1 00015C 12r00r00 [24] 579 lcall _spi_transfer 00015F 75*00 04 [24] 580 mov _gpio_write_PARM_2,#0x04 000162 75*00 01 [24] 581 mov _gpio_write_PARM_3,#0x01 000165 75 82 05 [24] 582 mov dpl,#0x05 000168 02r00r00 [24] 583 ljmp _gpio_write 584 ;------------------------------------------------------------ 585 ;Allocation info for local variables in function 'nrf24_init' 586 ;------------------------------------------------------------ 587 ;s Allocated to registers 588 ;------------------------------------------------------------ 589 ; src/nrf24l01.c:64: void nrf24_init(void) 590 ; ----------------------------------------- 591 ; function nrf24_init 592 ; ----------------------------------------- 00016B 593 _nrf24_init: 594 ; src/nrf24l01.c:67: gpio_set_mode(NRF_CSN_PORT, NRF_CSN_BIT, GPIO_MODE_PUSHPULL); 00016B 75*00 04 [24] 595 mov _gpio_set_mode_PARM_2,#0x04 00016E 75*00 01 [24] 596 mov _gpio_set_mode_PARM_3,#0x01 000171 75 82 05 [24] 597 mov dpl,#0x05 000174 12r00r00 [24] 598 lcall _gpio_set_mode 599 ; src/nrf24l01.c:68: gpio_set_mode(NRF_CE_PORT, NRF_CE_BIT, GPIO_MODE_PUSHPULL); 000177 75*00 06 [24] 600 mov _gpio_set_mode_PARM_2,#0x06 00017A 75*00 01 [24] 601 mov _gpio_set_mode_PARM_3,#0x01 00017D 75 82 01 [24] 602 mov dpl,#0x01 000180 12r00r00 [24] 603 lcall _gpio_set_mode 604 ; src/nrf24l01.c:70: gpio_set_mode(NRF_IRQ_PORT, NRF_IRQ_BIT, GPIO_MODE_INPUT); 000183 75*00 07 [24] 605 mov _gpio_set_mode_PARM_2,#0x07 000186 75*00 02 [24] 606 mov _gpio_set_mode_PARM_3,#0x02 000189 75 82 01 [24] 607 mov dpl,#0x01 00018C 12r00r00 [24] 608 lcall _gpio_set_mode 609 ; src/nrf24l01.c:72: CE_L(); 00018F 75*00 06 [24] 610 mov _gpio_write_PARM_2,#0x06 000192 75*00 00 [24] 611 mov _gpio_write_PARM_3,#0x00 000195 75 82 01 [24] 612 mov dpl,#0x01 000198 12r00r00 [24] 613 lcall _gpio_write 614 ; src/nrf24l01.c:73: CSN_H(); 00019B 75*00 04 [24] 615 mov _gpio_write_PARM_2,#0x04 00019E 75*00 01 [24] 616 mov _gpio_write_PARM_3,#0x01 0001A1 75 82 05 [24] 617 mov dpl,#0x05 0001A4 12r00r00 [24] 618 lcall _gpio_write 619 ; src/nrf24l01.c:74: delay_ms(100); 0001A7 90 00 64 [24] 620 mov dptr,#0x0064 0001AA 12r00r00 [24] 621 lcall _delay_ms 622 ; src/nrf24l01.c:77: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_RX_ADDR_P0, DEFAULT_ADDR, 5); 0001AD 75*01r00 [24] 623 mov _nrf_w_buf_PARM_2,#_DEFAULT_ADDR 0001B0 75*02s00 [24] 624 mov (_nrf_w_buf_PARM_2 + 1),#(_DEFAULT_ADDR >> 8) 0001B3 75*03 80 [24] 625 mov (_nrf_w_buf_PARM_2 + 2),#0x80 0001B6 75*04 05 [24] 626 mov _nrf_w_buf_PARM_3,#0x05 0001B9 75 82 2A [24] 627 mov dpl,#0x2a 0001BC 12r00r32 [24] 628 lcall _nrf_w_buf 629 ; src/nrf24l01.c:78: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_TX_ADDR, DEFAULT_ADDR, 5); 0001BF 75*01r00 [24] 630 mov _nrf_w_buf_PARM_2,#_DEFAULT_ADDR 0001C2 75*02s00 [24] 631 mov (_nrf_w_buf_PARM_2 + 1),#(_DEFAULT_ADDR >> 8) 0001C5 75*03 80 [24] 632 mov (_nrf_w_buf_PARM_2 + 2),#0x80 0001C8 75*04 05 [24] 633 mov _nrf_w_buf_PARM_3,#0x05 0001CB 75 82 30 [24] 634 mov dpl,#0x30 0001CE 12r00r32 [24] 635 lcall _nrf_w_buf 636 ; src/nrf24l01.c:80: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_EN_AA, 0x01); /* 通道0 自动应答 */ 0001D1 75*00 01 [24] 637 mov _nrf_w_reg_PARM_2,#0x01 0001D4 75 82 21 [24] 638 mov dpl,#0x21 0001D7 12r00r00 [24] 639 lcall _nrf_w_reg 640 ; src/nrf24l01.c:81: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_EN_RXADDR, 0x01); 0001DA 75*00 01 [24] 641 mov _nrf_w_reg_PARM_2,#0x01 0001DD 75 82 22 [24] 642 mov dpl,#0x22 0001E0 12r00r00 [24] 643 lcall _nrf_w_reg 644 ; src/nrf24l01.c:82: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_SETUP_AW, 0x03); /* 5 字节 */ 0001E3 75*00 03 [24] 645 mov _nrf_w_reg_PARM_2,#0x03 0001E6 75 82 23 [24] 646 mov dpl,#0x23 0001E9 12r00r00 [24] 647 lcall _nrf_w_reg 648 ; src/nrf24l01.c:83: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_SETUP_RETR, 0x1A); 0001EC 75*00 1A [24] 649 mov _nrf_w_reg_PARM_2,#0x1a 0001EF 75 82 24 [24] 650 mov dpl,#0x24 0001F2 12r00r00 [24] 651 lcall _nrf_w_reg 652 ; src/nrf24l01.c:84: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_RF_CH, DEFAULT_RF_CH); 0001F5 75*00 4C [24] 653 mov _nrf_w_reg_PARM_2,#0x4c 0001F8 75 82 25 [24] 654 mov dpl,#0x25 0001FB 12r00r00 [24] 655 lcall _nrf_w_reg 656 ; src/nrf24l01.c:85: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_RF_SETUP, 0x0F); /* 0dBm, 2Mbps */ 0001FE 75*00 0F [24] 657 mov _nrf_w_reg_PARM_2,#0x0f 000201 75 82 26 [24] 658 mov dpl,#0x26 000204 12r00r00 [24] 659 lcall _nrf_w_reg 660 ; src/nrf24l01.c:86: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_RX_PW_P0, NRF_PAYLOAD_LEN); 000207 75*00 20 [24] 661 mov _nrf_w_reg_PARM_2,#0x20 00020A 75 82 31 [24] 662 mov dpl,#0x31 00020D 12r00r00 [24] 663 lcall _nrf_w_reg 664 ; src/nrf24l01.c:87: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_DYNPD, 0x01); /* 动态载荷 (P0) */ 000210 75*00 01 [24] 665 mov _nrf_w_reg_PARM_2,#0x01 000213 75 82 3C [24] 666 mov dpl,#0x3c 000216 12r00r00 [24] 667 lcall _nrf_w_reg 668 ; src/nrf24l01.c:88: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_FEATURE, 0x06); /* EN_DPL | EN_ACK_PAY */ 000219 75*00 06 [24] 669 mov _nrf_w_reg_PARM_2,#0x06 00021C 75 82 3D [24] 670 mov dpl,#0x3d 00021F 12r00r00 [24] 671 lcall _nrf_w_reg 672 ; src/nrf24l01.c:91: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_CONFIG, 0x0F); 000222 75*00 0F [24] 673 mov _nrf_w_reg_PARM_2,#0x0f 000225 75 82 20 [24] 674 mov dpl,#0x20 000228 12r00r00 [24] 675 lcall _nrf_w_reg 676 ; src/nrf24l01.c:95: uint8_t s = nrf_r_reg(NRF_REG_STATUS); 00022B 75 82 07 [24] 677 mov dpl,#0x07 00022E 12r00r96 [24] 678 lcall _nrf_r_reg 000231 85 82*00 [24] 679 mov _nrf_w_reg_PARM_2,dpl 680 ; src/nrf24l01.c:96: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_STATUS, s); 000234 75 82 27 [24] 681 mov dpl,#0x27 000237 12r00r00 [24] 682 lcall _nrf_w_reg 683 ; src/nrf24l01.c:99: g_nrf_status.last_status = 0; 00023A 90r00r00 [24] 684 mov dptr,#_g_nrf_status 00023D E4 [12] 685 clr a 00023E F0 [24] 686 movx @dptr,a 687 ; src/nrf24l01.c:100: g_nrf_status.rx_count = 0; 00023F 90r00r01 [24] 688 mov dptr,#(_g_nrf_status + 0x0001) 000242 F0 [24] 689 movx @dptr,a 690 ; src/nrf24l01.c:101: g_nrf_status.ack_pending = 0; 000243 90r00r03 [24] 691 mov dptr,#(_g_nrf_status + 0x0003) 000246 F0 [24] 692 movx @dptr,a 693 ; src/nrf24l01.c:102: } 000247 22 [24] 694 ret 695 ;------------------------------------------------------------ 696 ;Allocation info for local variables in function 'nrf24_check' 697 ;------------------------------------------------------------ 698 ;buf Allocated with name '_nrf24_check_buf_65536_33' 699 ;rb Allocated with name '_nrf24_check_rb_65536_33' 700 ;i Allocated to registers r7 701 ;------------------------------------------------------------ 702 ; src/nrf24l01.c:104: uint8_t nrf24_check(void) 703 ; ----------------------------------------- 704 ; function nrf24_check 705 ; ----------------------------------------- 000248 706 _nrf24_check: 707 ; src/nrf24l01.c:106: uint8_t buf[5] = { 0xA5, 0xA5, 0xA5, 0xA5, 0xA5 }; 000248 75*09 A5 [24] 708 mov _nrf24_check_buf_65536_33,#0xa5 00024B 75*0A A5 [24] 709 mov (_nrf24_check_buf_65536_33 + 0x0001),#0xa5 00024E 75*0B A5 [24] 710 mov (_nrf24_check_buf_65536_33 + 0x0002),#0xa5 000251 75*0C A5 [24] 711 mov (_nrf24_check_buf_65536_33 + 0x0003),#0xa5 000254 75*0D A5 [24] 712 mov (_nrf24_check_buf_65536_33 + 0x0004),#0xa5 713 ; src/nrf24l01.c:108: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_TX_ADDR, buf, 5); 000257 75*01r09 [24] 714 mov _nrf_w_buf_PARM_2,#_nrf24_check_buf_65536_33 00025A 75*02 00 [24] 715 mov (_nrf_w_buf_PARM_2 + 1),#0x00 00025D 75*03 40 [24] 716 mov (_nrf_w_buf_PARM_2 + 2),#0x40 000260 75*04 05 [24] 717 mov _nrf_w_buf_PARM_3,#0x05 000263 75 82 30 [24] 718 mov dpl,#0x30 000266 12r00r32 [24] 719 lcall _nrf_w_buf 720 ; src/nrf24l01.c:109: nrf_r_buf(NRF_REG_TX_ADDR, rb, 5); 000269 75*05r0E [24] 721 mov _nrf_r_buf_PARM_2,#_nrf24_check_rb_65536_33 00026C 75*06 00 [24] 722 mov (_nrf_r_buf_PARM_2 + 1),#0x00 00026F 75*07 40 [24] 723 mov (_nrf_r_buf_PARM_2 + 2),#0x40 000272 75*08 05 [24] 724 mov _nrf_r_buf_PARM_3,#0x05 000275 75 82 10 [24] 725 mov dpl,#0x10 000278 12r00rC8 [24] 726 lcall _nrf_r_buf 727 ; src/nrf24l01.c:110: for (uint8_t i = 0; i < 5; i++) if (rb[i] != 0xA5) return NRF_ERR_CHECK; 00027B 7F 00 [12] 728 mov r7,#0x00 00027D 729 00105$: 00027D BF 05 00 [24] 730 cjne r7,#0x05,00121$ 000280 731 00121$: 000280 50 12 [24] 732 jnc 00103$ 000282 EF [12] 733 mov a,r7 000283 24r0E [12] 734 add a,#_nrf24_check_rb_65536_33 000285 F9 [12] 735 mov r1,a 000286 87 06 [24] 736 mov ar6,@r1 000288 BE A5 02 [24] 737 cjne r6,#0xa5,00123$ 00028B 80 04 [24] 738 sjmp 00106$ 00028D 739 00123$: 00028D 75 82 01 [24] 740 mov dpl,#0x01 000290 22 [24] 741 ret 000291 742 00106$: 000291 0F [12] 743 inc r7 000292 80 E9 [24] 744 sjmp 00105$ 000294 745 00103$: 746 ; src/nrf24l01.c:112: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_TX_ADDR, DEFAULT_ADDR, 5); 000294 75*01r00 [24] 747 mov _nrf_w_buf_PARM_2,#_DEFAULT_ADDR 000297 75*02s00 [24] 748 mov (_nrf_w_buf_PARM_2 + 1),#(_DEFAULT_ADDR >> 8) 00029A 75*03 80 [24] 749 mov (_nrf_w_buf_PARM_2 + 2),#0x80 00029D 75*04 05 [24] 750 mov _nrf_w_buf_PARM_3,#0x05 0002A0 75 82 30 [24] 751 mov dpl,#0x30 0002A3 12r00r32 [24] 752 lcall _nrf_w_buf 753 ; src/nrf24l01.c:113: return NRF_OK; 0002A6 75 82 00 [24] 754 mov dpl,#0x00 755 ; src/nrf24l01.c:114: } 0002A9 22 [24] 756 ret 757 ;------------------------------------------------------------ 758 ;Allocation info for local variables in function 'nrf24_set_channel' 759 ;------------------------------------------------------------ 760 ;ch Allocated to registers r7 761 ;------------------------------------------------------------ 762 ; src/nrf24l01.c:116: void nrf24_set_channel(uint8_t ch) 763 ; ----------------------------------------- 764 ; function nrf24_set_channel 765 ; ----------------------------------------- 0002AA 766 _nrf24_set_channel: 767 ; src/nrf24l01.c:118: if (ch > 125) ch = 125; 0002AA E5 82 [12] 768 mov a,dpl 0002AC FF [12] 769 mov r7,a 0002AD 24 82 [12] 770 add a,#0xff - 0x7d 0002AF 50 02 [24] 771 jnc 00102$ 0002B1 7F 7D [12] 772 mov r7,#0x7d 0002B3 773 00102$: 774 ; src/nrf24l01.c:119: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_RF_CH, ch); 0002B3 8F*00 [24] 775 mov _nrf_w_reg_PARM_2,r7 0002B5 75 82 25 [24] 776 mov dpl,#0x25 777 ; src/nrf24l01.c:120: } 0002B8 02r00r00 [24] 778 ljmp _nrf_w_reg 779 ;------------------------------------------------------------ 780 ;Allocation info for local variables in function 'nrf24_set_address' 781 ;------------------------------------------------------------ 782 ;addr5 Allocated to registers r5 r6 r7 783 ;------------------------------------------------------------ 784 ; src/nrf24l01.c:122: void nrf24_set_address(const uint8_t *addr5) 785 ; ----------------------------------------- 786 ; function nrf24_set_address 787 ; ----------------------------------------- 0002BB 788 _nrf24_set_address: 0002BB AD 82 [24] 789 mov r5,dpl 0002BD AE 83 [24] 790 mov r6,dph 0002BF AF F0 [24] 791 mov r7,b 792 ; src/nrf24l01.c:124: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_RX_ADDR_P0, addr5, 5); 0002C1 8D*01 [24] 793 mov _nrf_w_buf_PARM_2,r5 0002C3 8E*02 [24] 794 mov (_nrf_w_buf_PARM_2 + 1),r6 0002C5 8F*03 [24] 795 mov (_nrf_w_buf_PARM_2 + 2),r7 0002C7 75*04 05 [24] 796 mov _nrf_w_buf_PARM_3,#0x05 0002CA 75 82 2A [24] 797 mov dpl,#0x2a 0002CD C0 07 [24] 798 push ar7 0002CF C0 06 [24] 799 push ar6 0002D1 C0 05 [24] 800 push ar5 0002D3 12r00r32 [24] 801 lcall _nrf_w_buf 0002D6 D0 05 [24] 802 pop ar5 0002D8 D0 06 [24] 803 pop ar6 0002DA D0 07 [24] 804 pop ar7 805 ; src/nrf24l01.c:125: nrf_w_buf(NRF_CMD_W_REGISTER + NRF_REG_TX_ADDR, addr5, 5); 0002DC 8D*01 [24] 806 mov _nrf_w_buf_PARM_2,r5 0002DE 8E*02 [24] 807 mov (_nrf_w_buf_PARM_2 + 1),r6 0002E0 8F*03 [24] 808 mov (_nrf_w_buf_PARM_2 + 2),r7 0002E2 75*04 05 [24] 809 mov _nrf_w_buf_PARM_3,#0x05 0002E5 75 82 30 [24] 810 mov dpl,#0x30 811 ; src/nrf24l01.c:126: } 0002E8 02r00r32 [24] 812 ljmp _nrf_w_buf 813 ;------------------------------------------------------------ 814 ;Allocation info for local variables in function 'nrf24_set_rx_mode' 815 ;------------------------------------------------------------ 816 ;cfg Allocated to registers 817 ;------------------------------------------------------------ 818 ; src/nrf24l01.c:128: void nrf24_set_rx_mode(void) 819 ; ----------------------------------------- 820 ; function nrf24_set_rx_mode 821 ; ----------------------------------------- 0002EB 822 _nrf24_set_rx_mode: 823 ; src/nrf24l01.c:130: uint8_t cfg = nrf_r_reg(NRF_REG_CONFIG); 0002EB 75 82 00 [24] 824 mov dpl,#0x00 0002EE 12r00r96 [24] 825 lcall _nrf_r_reg 0002F1 E5 82 [12] 826 mov a,dpl 827 ; src/nrf24l01.c:131: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_CONFIG, (cfg & 0x7C) | 0x0F); /* PWR_UP, CRC 2B, PRIM_RX */ 0002F3 54 7C [12] 828 anl a,#0x7c 0002F5 44 0F [12] 829 orl a,#0x0f 0002F7 F5*00 [12] 830 mov _nrf_w_reg_PARM_2,a 0002F9 75 82 20 [24] 831 mov dpl,#0x20 0002FC 12r00r00 [24] 832 lcall _nrf_w_reg 833 ; src/nrf24l01.c:132: CE_H(); 0002FF 75*00 06 [24] 834 mov _gpio_write_PARM_2,#0x06 000302 75*00 01 [24] 835 mov _gpio_write_PARM_3,#0x01 000305 75 82 01 [24] 836 mov dpl,#0x01 000308 12r00r00 [24] 837 lcall _gpio_write 838 ; src/nrf24l01.c:133: delay_us(130); /* ≥130us 进入接收 */ 00030B 90 00 82 [24] 839 mov dptr,#0x0082 840 ; src/nrf24l01.c:134: } 00030E 02r00r00 [24] 841 ljmp _delay_us 842 ;------------------------------------------------------------ 843 ;Allocation info for local variables in function 'nrf24_data_ready' 844 ;------------------------------------------------------------ 845 ;status Allocated to registers r7 846 ;------------------------------------------------------------ 847 ; src/nrf24l01.c:136: uint8_t nrf24_data_ready(void) 848 ; ----------------------------------------- 849 ; function nrf24_data_ready 850 ; ----------------------------------------- 000311 851 _nrf24_data_ready: 852 ; src/nrf24l01.c:138: uint8_t status = nrf_r_reg(NRF_REG_STATUS); 000311 75 82 07 [24] 853 mov dpl,#0x07 000314 12r00r96 [24] 854 lcall _nrf_r_reg 855 ; src/nrf24l01.c:139: if (status & NRF_STATUS_RX_DR) { 000317 E5 82 [12] 856 mov a,dpl 000319 FF [12] 857 mov r7,a 00031A 30 E6 39 [24] 858 jnb acc.6,00102$ 859 ; src/nrf24l01.c:141: nrf_r_buf(NRF_CMD_R_RX_PAYLOAD, g_nrf_status.ack_payload, NRF_PAYLOAD_LEN); 00031D 75*05r04 [24] 860 mov _nrf_r_buf_PARM_2,#(_g_nrf_status + 0x0004) 000320 75*06s00 [24] 861 mov (_nrf_r_buf_PARM_2 + 1),#((_g_nrf_status + 0x0004) >> 8) 000323 75*07 00 [24] 862 mov (_nrf_r_buf_PARM_2 + 2),#0x00 000326 75*08 20 [24] 863 mov _nrf_r_buf_PARM_3,#0x20 000329 75 82 61 [24] 864 mov dpl,#0x61 00032C C0 07 [24] 865 push ar7 00032E 12r00rC8 [24] 866 lcall _nrf_r_buf 867 ; src/nrf24l01.c:142: nrf_flush_rx(); 000331 12r01r2F [24] 868 lcall _nrf_flush_rx 000334 D0 07 [24] 869 pop ar7 870 ; src/nrf24l01.c:143: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_STATUS, status); 000336 8F*00 [24] 871 mov _nrf_w_reg_PARM_2,r7 000338 75 82 27 [24] 872 mov dpl,#0x27 00033B C0 07 [24] 873 push ar7 00033D 12r00r00 [24] 874 lcall _nrf_w_reg 000340 D0 07 [24] 875 pop ar7 876 ; src/nrf24l01.c:144: g_nrf_status.last_status = status; 000342 90r00r00 [24] 877 mov dptr,#_g_nrf_status 000345 EF [12] 878 mov a,r7 000346 F0 [24] 879 movx @dptr,a 880 ; src/nrf24l01.c:145: g_nrf_status.rx_count++; 000347 90r00r01 [24] 881 mov dptr,#(_g_nrf_status + 0x0001) 00034A E0 [24] 882 movx a,@dptr 00034B FF [12] 883 mov r7,a 00034C 0F [12] 884 inc r7 00034D 90r00r01 [24] 885 mov dptr,#(_g_nrf_status + 0x0001) 000350 EF [12] 886 mov a,r7 000351 F0 [24] 887 movx @dptr,a 888 ; src/nrf24l01.c:146: return 1; 000352 75 82 01 [24] 889 mov dpl,#0x01 000355 22 [24] 890 ret 000356 891 00102$: 892 ; src/nrf24l01.c:148: return 0; 000356 75 82 00 [24] 893 mov dpl,#0x00 894 ; src/nrf24l01.c:149: } 000359 22 [24] 895 ret 896 ;------------------------------------------------------------ 897 ;Allocation info for local variables in function 'nrf24_write_ack_payload' 898 ;------------------------------------------------------------ 899 ;buf Allocated to registers r5 r6 r7 900 ;i Allocated to registers r4 901 ;------------------------------------------------------------ 902 ; src/nrf24l01.c:151: void nrf24_write_ack_payload(const uint8_t *buf) 903 ; ----------------------------------------- 904 ; function nrf24_write_ack_payload 905 ; ----------------------------------------- 00035A 906 _nrf24_write_ack_payload: 00035A AD 82 [24] 907 mov r5,dpl 00035C AE 83 [24] 908 mov r6,dph 00035E AF F0 [24] 909 mov r7,b 910 ; src/nrf24l01.c:154: CSN_L(); 000360 75*00 04 [24] 911 mov _gpio_write_PARM_2,#0x04 000363 75*00 00 [24] 912 mov _gpio_write_PARM_3,#0x00 000366 75 82 05 [24] 913 mov dpl,#0x05 000369 C0 07 [24] 914 push ar7 00036B C0 06 [24] 915 push ar6 00036D C0 05 [24] 916 push ar5 00036F 12r00r00 [24] 917 lcall _gpio_write 918 ; src/nrf24l01.c:155: spi_transfer(NRF_CMD_W_ACK_PAYLOAD); /* P0 */ 000372 75 82 A8 [24] 919 mov dpl,#0xa8 000375 12r00r00 [24] 920 lcall _spi_transfer 000378 D0 05 [24] 921 pop ar5 00037A D0 06 [24] 922 pop ar6 00037C D0 07 [24] 923 pop ar7 924 ; src/nrf24l01.c:156: for (uint8_t i = 0; i < NRF_PAYLOAD_LEN; i++) { 00037E 7C 00 [12] 925 mov r4,#0x00 000380 926 00103$: 000380 BC 20 00 [24] 927 cjne r4,#0x20,00116$ 000383 928 00116$: 000383 50 29 [24] 929 jnc 00101$ 930 ; src/nrf24l01.c:157: spi_transfer(buf[i]); 000385 EC [12] 931 mov a,r4 000386 2D [12] 932 add a,r5 000387 F9 [12] 933 mov r1,a 000388 E4 [12] 934 clr a 000389 3E [12] 935 addc a,r6 00038A FA [12] 936 mov r2,a 00038B 8F 03 [24] 937 mov ar3,r7 00038D 89 82 [24] 938 mov dpl,r1 00038F 8A 83 [24] 939 mov dph,r2 000391 8B F0 [24] 940 mov b,r3 000393 12r00r00 [24] 941 lcall __gptrget 000396 F5 82 [12] 942 mov dpl,a 000398 C0 07 [24] 943 push ar7 00039A C0 06 [24] 944 push ar6 00039C C0 05 [24] 945 push ar5 00039E C0 04 [24] 946 push ar4 0003A0 12r00r00 [24] 947 lcall _spi_transfer 0003A3 D0 04 [24] 948 pop ar4 0003A5 D0 05 [24] 949 pop ar5 0003A7 D0 06 [24] 950 pop ar6 0003A9 D0 07 [24] 951 pop ar7 952 ; src/nrf24l01.c:156: for (uint8_t i = 0; i < NRF_PAYLOAD_LEN; i++) { 0003AB 0C [12] 953 inc r4 0003AC 80 D2 [24] 954 sjmp 00103$ 0003AE 955 00101$: 956 ; src/nrf24l01.c:159: CSN_H(); 0003AE 75*00 04 [24] 957 mov _gpio_write_PARM_2,#0x04 0003B1 75*00 01 [24] 958 mov _gpio_write_PARM_3,#0x01 0003B4 75 82 05 [24] 959 mov dpl,#0x05 960 ; src/nrf24l01.c:160: } 0003B7 02r00r00 [24] 961 ljmp _gpio_write 962 ;------------------------------------------------------------ 963 ;Allocation info for local variables in function 'nrf24_irq_handler' 964 ;------------------------------------------------------------ 965 ;status Allocated to registers r7 966 ;------------------------------------------------------------ 967 ; src/nrf24l01.c:162: void nrf24_irq_handler(void) 968 ; ----------------------------------------- 969 ; function nrf24_irq_handler 970 ; ----------------------------------------- 0003BA 971 _nrf24_irq_handler: 972 ; src/nrf24l01.c:164: uint8_t status = nrf_r_reg(NRF_REG_STATUS); 0003BA 75 82 07 [24] 973 mov dpl,#0x07 0003BD 12r00r96 [24] 974 lcall _nrf_r_reg 0003C0 AF 82 [24] 975 mov r7,dpl 976 ; src/nrf24l01.c:165: nrf_w_reg(NRF_CMD_W_REGISTER + NRF_REG_STATUS, status); 0003C2 8F*00 [24] 977 mov _nrf_w_reg_PARM_2,r7 0003C4 75 82 27 [24] 978 mov dpl,#0x27 0003C7 C0 07 [24] 979 push ar7 0003C9 12r00r00 [24] 980 lcall _nrf_w_reg 0003CC D0 07 [24] 981 pop ar7 982 ; src/nrf24l01.c:166: g_nrf_status.last_status = status; 0003CE 90r00r00 [24] 983 mov dptr,#_g_nrf_status 0003D1 EF [12] 984 mov a,r7 0003D2 F0 [24] 985 movx @dptr,a 986 ; src/nrf24l01.c:168: if (status & NRF_STATUS_RX_DR) { 0003D3 EF [12] 987 mov a,r7 0003D4 30 E6 0B [24] 988 jnb acc.6,00102$ 989 ; src/nrf24l01.c:169: g_nrf_status.rx_count++; 0003D7 90r00r01 [24] 990 mov dptr,#(_g_nrf_status + 0x0001) 0003DA E0 [24] 991 movx a,@dptr 0003DB FE [12] 992 mov r6,a 0003DC 0E [12] 993 inc r6 0003DD 90r00r01 [24] 994 mov dptr,#(_g_nrf_status + 0x0001) 0003E0 EE [12] 995 mov a,r6 0003E1 F0 [24] 996 movx @dptr,a 0003E2 997 00102$: 998 ; src/nrf24l01.c:171: if (status & NRF_STATUS_MAX_RT) { 0003E2 EF [12] 999 mov a,r7 0003E3 30 E4 03 [24] 1000 jnb acc.4,00105$ 1001 ; src/nrf24l01.c:172: nrf_flush_tx(); 1002 ; src/nrf24l01.c:174: } 0003E6 02r01r4D [24] 1003 ljmp _nrf_flush_tx 0003E9 1004 00105$: 0003E9 22 [24] 1005 ret 1006 .area CSEG (CODE) 1007 .area CONST (CODE) 000000 1008 _DEFAULT_ADDR: 000000 E7 1009 .db #0xe7 ; 231 000001 E7 1010 .db #0xe7 ; 231 000002 E7 1011 .db #0xe7 ; 231 000003 E7 1012 .db #0xe7 ; 231 000004 C2 1013 .db #0xc2 ; 194 1014 .area XINIT (CODE) 1015 .area CABS (ABS,CODE)