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Initial commit - sync AliceRC to Gitea

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2026-08-03 15:54:25 +08:00
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AliceRX_STC/build/adc.asm
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;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module adc
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _delay_ms
.globl _delay_us
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _adc_init
.globl _adc_read
.globl _battery_read_mv
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
_adc_busy:
.ds 1
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
; src/adc.c:11: static volatile __bit adc_busy = 0;
; assignBit
clr _adc_busy
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'adc_init'
;------------------------------------------------------------
; src/adc.c:13: void adc_init(void)
; -----------------------------------------
; function adc_init
; -----------------------------------------
_adc_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/adc.c:16: P3M0 &= ~(1 << 3);
anl _P3M0,#0xf7
; src/adc.c:17: P3M1 |= (1 << 3);
orl _P3M1,#0x08
; src/adc.c:20: ADCCFG = 0x20 | 0x0F;
mov _ADCCFG,#0x2f
; src/adc.c:23: P_SW2 |= 0x80;
orl _P_SW2,#0x80
; src/adc.c:24: *((volatile uint8_t __xdata *)0xFEA8) = 0xFF; /* ADCTIM = 0xFF (最大采样) */
mov dptr,#0xfea8
mov a,#0xff
movx @dptr,a
; src/adc.c:25: P_SW2 &= ~0x80;
anl _P_SW2,#0x7f
; src/adc.c:28: EADC = 0;
; assignBit
clr _EADC
; src/adc.c:31: ADC_CONTR = ADC_POWER;
mov _ADC_CONTR,#0x80
; src/adc.c:32: delay_ms(2); /* 等待 ADC 稳定 */
mov dptr,#0x0002
; src/adc.c:33: }
ljmp _delay_ms
;------------------------------------------------------------
;Allocation info for local variables in function 'adc_read'
;------------------------------------------------------------
;ch Allocated to registers r7
;------------------------------------------------------------
; src/adc.c:35: uint16_t adc_read(uint8_t ch)
; -----------------------------------------
; function adc_read
; -----------------------------------------
_adc_read:
; src/adc.c:37: if (ch > 15) return 0;
mov a,dpl
mov r7,a
add a,#0xff - 0x0f
jnc 00102$
mov dptr,#0x0000
ret
00102$:
; src/adc.c:38: ADC_CONTR = ADC_POWER | (ch & 0x0F); /* 选择通道 */
mov a,#0x0f
anl a,r7
orl a,#0x80
mov _ADC_CONTR,a
; src/adc.c:39: delay_us(20); /* 等待通道切换稳定 */
mov dptr,#0x0014
lcall _delay_us
; src/adc.c:40: ADC_CONTR |= ADC_START; /* 启动 */
orl _ADC_CONTR,#0x40
; src/adc.c:41: while (!(ADC_CONTR & ADC_FLAG)); /* 等待完成 */
00103$:
mov a,_ADC_CONTR
jnb acc.5,00103$
; src/adc.c:42: ADC_CONTR &= ~ADC_FLAG; /* 清标志 */
anl _ADC_CONTR,#0xdf
; src/adc.c:45: return (((uint16_t)ADC_RES & 0x03) << 8) | ADC_RESL;
mov r7,_ADC_RES
anl ar7,#0x03
mov ar6,r7
mov r7,#0x00
mov r4,_ADC_RESL
mov r5,#0x00
mov a,r4
orl ar7,a
mov a,r5
orl ar6,a
mov dpl,r7
mov dph,r6
; src/adc.c:46: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'battery_read_mv'
;------------------------------------------------------------
;adc Allocated to registers
;v Allocated to registers r4 r5 r6 r7
;------------------------------------------------------------
; src/adc.c:48: uint16_t battery_read_mv(void)
; -----------------------------------------
; function battery_read_mv
; -----------------------------------------
_battery_read_mv:
; src/adc.c:50: uint16_t adc = adc_read(ADC_BAT_CH); /* 0..1023 */
mov dpl,#0x0b
lcall _adc_read
; src/adc.c:52: float v = (float)adc / 1024.0f * ADC_VREF_VOLT * BATTERY_DIVIDER;
lcall ___uint2fs
mov r4,dpl
mov r5,dph
mov r6,b
mov r7,a
clr a
push acc
push acc
mov a,#0x80
push acc
mov a,#0x44
push acc
mov dpl,r4
mov dph,r5
mov b,r6
mov a,r7
lcall ___fsdiv
mov r4,dpl
mov r5,dph
mov r6,b
mov r7,a
mov a,sp
add a,#0xfc
mov sp,a
push ar4
push ar5
push ar6
push ar7
mov dptr,#0x0000
mov b,#0x20
mov a,#0x41
lcall ___fsmul
mov r4,dpl
mov r5,dph
mov r6,b
mov r7,a
mov a,sp
add a,#0xfc
mov sp,a
; src/adc.c:53: return (uint16_t)(v * 1000); /* mV */
push ar4
push ar5
push ar6
push ar7
mov dptr,#0x0000
mov b,#0x7a
mov a,#0x44
lcall ___fsmul
mov r4,dpl
mov r5,dph
mov r6,b
mov r7,a
mov a,sp
add a,#0xfc
mov sp,a
mov dpl,r4
mov dph,r5
mov b,r6
mov a,r7
; src/adc.c:54: }
ljmp ___fs2uint
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/adc.lst
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1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module adc
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _delay_ms
12 .globl _delay_us
13 .globl _EADC
14 .globl _ET1
15 .globl _ET0
16 .globl _ES
17 .globl _EA
18 .globl _REN
19 .globl _RI
20 .globl _TI
21 .globl _TR1
22 .globl _TF1
23 .globl _IT0
24 .globl _IE0
25 .globl _TR0
26 .globl _TF0
27 .globl _CMPCR2
28 .globl _CMPCR1
29 .globl _TA
30 .globl _IRCBAND_REG
31 .globl _IAP_TPS
32 .globl _IAP_CONTR
33 .globl _IAP_TRIG
34 .globl _IAP_CMD
35 .globl _IAP_ADDRL
36 .globl _IAP_ADDRH
37 .globl _IAP_DATA
38 .globl _WDT_CONTR
39 .globl _PCA_PWM3
40 .globl _PCA_PWM2
41 .globl _PCA_PWM1
42 .globl _PCA_PWM0
43 .globl _CCAP3L
44 .globl _CCAP2L
45 .globl _CCAP1L
46 .globl _CCAP0L
47 .globl _CCAPM3
48 .globl _CCAPM2
49 .globl _CCAPM1
50 .globl _CCAPM0
51 .globl _CMOD
52 .globl _CCON
53 .globl _ADCTIM_X
54 .globl _ADCCFG
55 .globl _ADC_RESL
56 .globl _ADC_RES
57 .globl _ADC_CONTR
58 .globl _SPDAT
59 .globl _SPCTL
60 .globl _SPSTAT
61 .globl _IP2H
62 .globl _IP2
63 .globl _IP
64 .globl _IE2
65 .globl _IE
66 .globl _BRT
67 .globl _P_SW1
68 .globl _SADEN
69 .globl _SADDR
70 .globl _S2BUF
71 .globl _S2CON
72 .globl _SBUF
73 .globl _SCON
74 .globl _TM4PS_X
75 .globl _TM3PS_X
76 .globl _TM2PS_X
77 .globl _T4T3M
78 .globl _T4L
79 .globl _T4H
80 .globl _T3L
81 .globl _T3H
82 .globl _T2L
83 .globl _T2H
84 .globl _INTCLKO
85 .globl _AUXR
86 .globl _TH1
87 .globl _TH0
88 .globl _TL1
89 .globl _TL0
90 .globl _TMOD
91 .globl _TCON
92 .globl _P_SW2
93 .globl _P5M0
94 .globl _P5M1
95 .globl _P4M0
96 .globl _P4M1
97 .globl _P3M0
98 .globl _P3M1
99 .globl _P2M0
100 .globl _P2M1
101 .globl _P1M0
102 .globl _P1M1
103 .globl _P0M0
104 .globl _P0M1
105 .globl _PSW
106 .globl _B
107 .globl _ACC
108 .globl _PCON
109 .globl _DPH
110 .globl _DPL
111 .globl _SP
112 .globl _P5
113 .globl _P4
114 .globl _P3
115 .globl _P2
116 .globl _P1
117 .globl _P0
118 .globl _adc_init
119 .globl _adc_read
120 .globl _battery_read_mv
121 ;--------------------------------------------------------
122 ; special function registers
123 ;--------------------------------------------------------
124 .area RSEG (ABS,DATA)
000000 125 .org 0x0000
000080 126 _P0 = 0x0080
000090 127 _P1 = 0x0090
0000A0 128 _P2 = 0x00a0
0000B0 129 _P3 = 0x00b0
0000C0 130 _P4 = 0x00c0
0000C8 131 _P5 = 0x00c8
000081 132 _SP = 0x0081
000082 133 _DPL = 0x0082
000083 134 _DPH = 0x0083
000087 135 _PCON = 0x0087
0000E0 136 _ACC = 0x00e0
0000F0 137 _B = 0x00f0
0000D0 138 _PSW = 0x00d0
000093 139 _P0M1 = 0x0093
000094 140 _P0M0 = 0x0094
000091 141 _P1M1 = 0x0091
000092 142 _P1M0 = 0x0092
000095 143 _P2M1 = 0x0095
000096 144 _P2M0 = 0x0096
0000B1 145 _P3M1 = 0x00b1
0000B2 146 _P3M0 = 0x00b2
0000B3 147 _P4M1 = 0x00b3
0000B4 148 _P4M0 = 0x00b4
0000C9 149 _P5M1 = 0x00c9
0000CA 150 _P5M0 = 0x00ca
0000BA 151 _P_SW2 = 0x00ba
000088 152 _TCON = 0x0088
000089 153 _TMOD = 0x0089
00008A 154 _TL0 = 0x008a
00008B 155 _TL1 = 0x008b
00008C 156 _TH0 = 0x008c
00008D 157 _TH1 = 0x008d
00008E 158 _AUXR = 0x008e
00008F 159 _INTCLKO = 0x008f
0000D6 160 _T2H = 0x00d6
0000D7 161 _T2L = 0x00d7
0000D4 162 _T3H = 0x00d4
0000D5 163 _T3L = 0x00d5
0000D2 164 _T4H = 0x00d2
0000D3 165 _T4L = 0x00d3
0000D1 166 _T4T3M = 0x00d1
00FEA1 167 _TM2PS_X = 0xfea1
00FEA2 168 _TM3PS_X = 0xfea2
00FEA3 169 _TM4PS_X = 0xfea3
000098 170 _SCON = 0x0098
000099 171 _SBUF = 0x0099
00009A 172 _S2CON = 0x009a
00009B 173 _S2BUF = 0x009b
0000A9 174 _SADDR = 0x00a9
0000B9 175 _SADEN = 0x00b9
0000A2 176 _P_SW1 = 0x00a2
00009C 177 _BRT = 0x009c
0000A8 178 _IE = 0x00a8
0000AF 179 _IE2 = 0x00af
0000B8 180 _IP = 0x00b8
0000B6 181 _IP2 = 0x00b6
0000B7 182 _IP2H = 0x00b7
0000CD 183 _SPSTAT = 0x00cd
0000CE 184 _SPCTL = 0x00ce
0000CF 185 _SPDAT = 0x00cf
0000BC 186 _ADC_CONTR = 0x00bc
0000BD 187 _ADC_RES = 0x00bd
0000BE 188 _ADC_RESL = 0x00be
0000DE 189 _ADCCFG = 0x00de
00FEA8 190 _ADCTIM_X = 0xfea8
0000D8 191 _CCON = 0x00d8
0000D9 192 _CMOD = 0x00d9
0000DA 193 _CCAPM0 = 0x00da
0000DB 194 _CCAPM1 = 0x00db
0000DC 195 _CCAPM2 = 0x00dc
0000DD 196 _CCAPM3 = 0x00dd
0000EA 197 _CCAP0L = 0x00ea
0000EB 198 _CCAP1L = 0x00eb
0000EC 199 _CCAP2L = 0x00ec
0000ED 200 _CCAP3L = 0x00ed
0000F2 201 _PCA_PWM0 = 0x00f2
0000F3 202 _PCA_PWM1 = 0x00f3
0000F4 203 _PCA_PWM2 = 0x00f4
0000F5 204 _PCA_PWM3 = 0x00f5
0000C1 205 _WDT_CONTR = 0x00c1
0000C2 206 _IAP_DATA = 0x00c2
0000C3 207 _IAP_ADDRH = 0x00c3
0000C4 208 _IAP_ADDRL = 0x00c4
0000C5 209 _IAP_CMD = 0x00c5
0000C6 210 _IAP_TRIG = 0x00c6
0000C7 211 _IAP_CONTR = 0x00c7
0000F7 212 _IAP_TPS = 0x00f7
00009D 213 _IRCBAND_REG = 0x009d
0000AE 214 _TA = 0x00ae
0000E6 215 _CMPCR1 = 0x00e6
0000E7 216 _CMPCR2 = 0x00e7
217 ;--------------------------------------------------------
218 ; special function bits
219 ;--------------------------------------------------------
220 .area RSEG (ABS,DATA)
000000 221 .org 0x0000
00008D 222 _TF0 = 0x008d
00008C 223 _TR0 = 0x008c
000089 224 _IE0 = 0x0089
000088 225 _IT0 = 0x0088
00008F 226 _TF1 = 0x008f
00008E 227 _TR1 = 0x008e
000099 228 _TI = 0x0099
000098 229 _RI = 0x0098
00009C 230 _REN = 0x009c
0000AF 231 _EA = 0x00af
0000AC 232 _ES = 0x00ac
0000A9 233 _ET0 = 0x00a9
0000AB 234 _ET1 = 0x00ab
0000AD 235 _EADC = 0x00ad
236 ;--------------------------------------------------------
237 ; overlayable register banks
238 ;--------------------------------------------------------
239 .area REG_BANK_0 (REL,OVR,DATA)
000000 240 .ds 8
241 ;--------------------------------------------------------
242 ; internal ram data
243 ;--------------------------------------------------------
244 .area DSEG (DATA)
245 ;--------------------------------------------------------
246 ; overlayable items in internal ram
247 ;--------------------------------------------------------
248 ;--------------------------------------------------------
249 ; indirectly addressable internal ram data
250 ;--------------------------------------------------------
251 .area ISEG (DATA)
252 ;--------------------------------------------------------
253 ; absolute internal ram data
254 ;--------------------------------------------------------
255 .area IABS (ABS,DATA)
256 .area IABS (ABS,DATA)
257 ;--------------------------------------------------------
258 ; bit data
259 ;--------------------------------------------------------
260 .area BSEG (BIT)
000000 261 _adc_busy:
000000 262 .ds 1
263 ;--------------------------------------------------------
264 ; paged external ram data
265 ;--------------------------------------------------------
266 .area PSEG (PAG,XDATA)
267 ;--------------------------------------------------------
268 ; external ram data
269 ;--------------------------------------------------------
270 .area XSEG (XDATA)
271 ;--------------------------------------------------------
272 ; absolute external ram data
273 ;--------------------------------------------------------
274 .area XABS (ABS,XDATA)
275 ;--------------------------------------------------------
276 ; external initialized ram data
277 ;--------------------------------------------------------
278 .area XISEG (XDATA)
279 .area HOME (CODE)
280 .area GSINIT0 (CODE)
281 .area GSINIT1 (CODE)
282 .area GSINIT2 (CODE)
283 .area GSINIT3 (CODE)
284 .area GSINIT4 (CODE)
285 .area GSINIT5 (CODE)
286 .area GSINIT (CODE)
287 .area GSFINAL (CODE)
288 .area CSEG (CODE)
289 ;--------------------------------------------------------
290 ; global & static initialisations
291 ;--------------------------------------------------------
292 .area HOME (CODE)
293 .area GSINIT (CODE)
294 .area GSFINAL (CODE)
295 .area GSINIT (CODE)
296 ; src/adc.c:11: static volatile __bit adc_busy = 0;
297 ; assignBit
000000 C2*00 [12] 298 clr _adc_busy
299 ;--------------------------------------------------------
300 ; Home
301 ;--------------------------------------------------------
302 .area HOME (CODE)
303 .area HOME (CODE)
304 ;--------------------------------------------------------
305 ; code
306 ;--------------------------------------------------------
307 .area CSEG (CODE)
308 ;------------------------------------------------------------
309 ;Allocation info for local variables in function 'adc_init'
310 ;------------------------------------------------------------
311 ; src/adc.c:13: void adc_init(void)
312 ; -----------------------------------------
313 ; function adc_init
314 ; -----------------------------------------
000000 315 _adc_init:
000007 316 ar7 = 0x07
000006 317 ar6 = 0x06
000005 318 ar5 = 0x05
000004 319 ar4 = 0x04
000003 320 ar3 = 0x03
000002 321 ar2 = 0x02
000001 322 ar1 = 0x01
000000 323 ar0 = 0x00
324 ; src/adc.c:16: P3M0 &= ~(1 << 3);
000000 53 B2 F7 [24] 325 anl _P3M0,#0xf7
326 ; src/adc.c:17: P3M1 |= (1 << 3);
000003 43 B1 08 [24] 327 orl _P3M1,#0x08
328 ; src/adc.c:20: ADCCFG = 0x20 | 0x0F;
000006 75 DE 2F [24] 329 mov _ADCCFG,#0x2f
330 ; src/adc.c:23: P_SW2 |= 0x80;
000009 43 BA 80 [24] 331 orl _P_SW2,#0x80
332 ; src/adc.c:24: *((volatile uint8_t __xdata *)0xFEA8) = 0xFF; /* ADCTIM = 0xFF (最大采样) */
00000C 90 FE A8 [24] 333 mov dptr,#0xfea8
00000F 74 FF [12] 334 mov a,#0xff
000011 F0 [24] 335 movx @dptr,a
336 ; src/adc.c:25: P_SW2 &= ~0x80;
000012 53 BA 7F [24] 337 anl _P_SW2,#0x7f
338 ; src/adc.c:28: EADC = 0;
339 ; assignBit
000015 C2 AD [12] 340 clr _EADC
341 ; src/adc.c:31: ADC_CONTR = ADC_POWER;
000017 75 BC 80 [24] 342 mov _ADC_CONTR,#0x80
343 ; src/adc.c:32: delay_ms(2); /* 等待 ADC 稳定 */
00001A 90 00 02 [24] 344 mov dptr,#0x0002
345 ; src/adc.c:33: }
00001D 02r00r00 [24] 346 ljmp _delay_ms
347 ;------------------------------------------------------------
348 ;Allocation info for local variables in function 'adc_read'
349 ;------------------------------------------------------------
350 ;ch Allocated to registers r7
351 ;------------------------------------------------------------
352 ; src/adc.c:35: uint16_t adc_read(uint8_t ch)
353 ; -----------------------------------------
354 ; function adc_read
355 ; -----------------------------------------
000020 356 _adc_read:
357 ; src/adc.c:37: if (ch > 15) return 0;
000020 E5 82 [12] 358 mov a,dpl
000022 FF [12] 359 mov r7,a
000023 24 F0 [12] 360 add a,#0xff - 0x0f
000025 50 04 [24] 361 jnc 00102$
000027 90 00 00 [24] 362 mov dptr,#0x0000
00002A 22 [24] 363 ret
00002B 364 00102$:
365 ; src/adc.c:38: ADC_CONTR = ADC_POWER | (ch & 0x0F); /* 选择通道 */
00002B 74 0F [12] 366 mov a,#0x0f
00002D 5F [12] 367 anl a,r7
00002E 44 80 [12] 368 orl a,#0x80
000030 F5 BC [12] 369 mov _ADC_CONTR,a
370 ; src/adc.c:39: delay_us(20); /* 等待通道切换稳定 */
000032 90 00 14 [24] 371 mov dptr,#0x0014
000035 12r00r00 [24] 372 lcall _delay_us
373 ; src/adc.c:40: ADC_CONTR |= ADC_START; /* 启动 */
000038 43 BC 40 [24] 374 orl _ADC_CONTR,#0x40
375 ; src/adc.c:41: while (!(ADC_CONTR & ADC_FLAG)); /* 等待完成 */
00003B 376 00103$:
00003B E5 BC [12] 377 mov a,_ADC_CONTR
00003D 30 E5 FB [24] 378 jnb acc.5,00103$
379 ; src/adc.c:42: ADC_CONTR &= ~ADC_FLAG; /* 清标志 */
000040 53 BC DF [24] 380 anl _ADC_CONTR,#0xdf
381 ; src/adc.c:45: return (((uint16_t)ADC_RES & 0x03) << 8) | ADC_RESL;
000043 AF BD [24] 382 mov r7,_ADC_RES
000045 53 07 03 [24] 383 anl ar7,#0x03
000048 8F 06 [24] 384 mov ar6,r7
00004A 7F 00 [12] 385 mov r7,#0x00
00004C AC BE [24] 386 mov r4,_ADC_RESL
00004E 7D 00 [12] 387 mov r5,#0x00
000050 EC [12] 388 mov a,r4
000051 42 07 [12] 389 orl ar7,a
000053 ED [12] 390 mov a,r5
000054 42 06 [12] 391 orl ar6,a
000056 8F 82 [24] 392 mov dpl,r7
000058 8E 83 [24] 393 mov dph,r6
394 ; src/adc.c:46: }
00005A 22 [24] 395 ret
396 ;------------------------------------------------------------
397 ;Allocation info for local variables in function 'battery_read_mv'
398 ;------------------------------------------------------------
399 ;adc Allocated to registers
400 ;v Allocated to registers r4 r5 r6 r7
401 ;------------------------------------------------------------
402 ; src/adc.c:48: uint16_t battery_read_mv(void)
403 ; -----------------------------------------
404 ; function battery_read_mv
405 ; -----------------------------------------
00005B 406 _battery_read_mv:
407 ; src/adc.c:50: uint16_t adc = adc_read(ADC_BAT_CH); /* 0..1023 */
00005B 75 82 0B [24] 408 mov dpl,#0x0b
00005E 12r00r20 [24] 409 lcall _adc_read
410 ; src/adc.c:52: float v = (float)adc / 1024.0f * ADC_VREF_VOLT * BATTERY_DIVIDER;
000061 12r00r00 [24] 411 lcall ___uint2fs
000064 AC 82 [24] 412 mov r4,dpl
000066 AD 83 [24] 413 mov r5,dph
000068 AE F0 [24] 414 mov r6,b
00006A FF [12] 415 mov r7,a
00006B E4 [12] 416 clr a
00006C C0 E0 [24] 417 push acc
00006E C0 E0 [24] 418 push acc
000070 74 80 [12] 419 mov a,#0x80
000072 C0 E0 [24] 420 push acc
000074 74 44 [12] 421 mov a,#0x44
000076 C0 E0 [24] 422 push acc
000078 8C 82 [24] 423 mov dpl,r4
00007A 8D 83 [24] 424 mov dph,r5
00007C 8E F0 [24] 425 mov b,r6
00007E EF [12] 426 mov a,r7
00007F 12r00r00 [24] 427 lcall ___fsdiv
000082 AC 82 [24] 428 mov r4,dpl
000084 AD 83 [24] 429 mov r5,dph
000086 AE F0 [24] 430 mov r6,b
000088 FF [12] 431 mov r7,a
000089 E5 81 [12] 432 mov a,sp
00008B 24 FC [12] 433 add a,#0xfc
00008D F5 81 [12] 434 mov sp,a
00008F C0 04 [24] 435 push ar4
000091 C0 05 [24] 436 push ar5
000093 C0 06 [24] 437 push ar6
000095 C0 07 [24] 438 push ar7
000097 90 00 00 [24] 439 mov dptr,#0x0000
00009A 75 F0 20 [24] 440 mov b,#0x20
00009D 74 41 [12] 441 mov a,#0x41
00009F 12r00r00 [24] 442 lcall ___fsmul
0000A2 AC 82 [24] 443 mov r4,dpl
0000A4 AD 83 [24] 444 mov r5,dph
0000A6 AE F0 [24] 445 mov r6,b
0000A8 FF [12] 446 mov r7,a
0000A9 E5 81 [12] 447 mov a,sp
0000AB 24 FC [12] 448 add a,#0xfc
0000AD F5 81 [12] 449 mov sp,a
450 ; src/adc.c:53: return (uint16_t)(v * 1000); /* mV */
0000AF C0 04 [24] 451 push ar4
0000B1 C0 05 [24] 452 push ar5
0000B3 C0 06 [24] 453 push ar6
0000B5 C0 07 [24] 454 push ar7
0000B7 90 00 00 [24] 455 mov dptr,#0x0000
0000BA 75 F0 7A [24] 456 mov b,#0x7a
0000BD 74 44 [12] 457 mov a,#0x44
0000BF 12r00r00 [24] 458 lcall ___fsmul
0000C2 AC 82 [24] 459 mov r4,dpl
0000C4 AD 83 [24] 460 mov r5,dph
0000C6 AE F0 [24] 461 mov r6,b
0000C8 FF [12] 462 mov r7,a
0000C9 E5 81 [12] 463 mov a,sp
0000CB 24 FC [12] 464 add a,#0xfc
0000CD F5 81 [12] 465 mov sp,a
0000CF 8C 82 [24] 466 mov dpl,r4
0000D1 8D 83 [24] 467 mov dph,r5
0000D3 8E F0 [24] 468 mov b,r6
0000D5 EF [12] 469 mov a,r7
470 ; src/adc.c:54: }
0000D6 02r00r00 [24] 471 ljmp ___fs2uint
472 .area CSEG (CODE)
473 .area CONST (CODE)
000000 474 _DEFAULT_ADDR:
000000 E7 475 .db #0xe7 ; 231
000001 E7 476 .db #0xe7 ; 231
000002 E7 477 .db #0xe7 ; 231
000003 E7 478 .db #0xe7 ; 231
000004 C2 479 .db #0xc2 ; 194
480 .area XINIT (CODE)
481 .area CABS (ABS,CODE)
AliceRX_STC/build/adc.rel
+209
View File
@@ -0,0 +1,209 @@
XH3
H 1A areas 73 global symbols
M adc
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S ___fsmul Ref000000
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S ___fs2uint Ref000000
S ___uint2fs Ref000000
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _delay_ms Ref000000
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _delay_us Ref000000
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S ___fsdiv Ref000000
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 1 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 2 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size D9 flags 20 addr 0
S _adc_read Def000020
S _battery_read_mv Def00005B
S _adc_init Def000000
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 08
T 00 00 00
R 00 00 00 08
T 00 00 00 C2 00 00 00
R 00 00 00 14 F1 21 04 00 08
T 00 00 00
R 00 00 00 16
T 00 00 00 53 B2 F7 43 B1 08 75 DE 2F 43 BA 80 90
R 00 00 00 16
T 00 00 0D FE A8 74 FF F0 53 BA 7F C2 AD 75 BC 80
R 00 00 00 16
T 00 00 1A 90 00 02 02 00 00
R 00 00 00 16 02 07 00 46
T 00 00 20
R 00 00 00 16
T 00 00 20 E5 82 FF 24 F0 50 04 90 00 00 22
R 00 00 00 16
T 00 00 2B
R 00 00 00 16
T 00 00 2B 74 0F 5F 44 80 F5 BC 90 00 14 12 00 00
R 00 00 00 16 02 0E 00 5C
T 00 00 38 43 BC 40
R 00 00 00 16
T 00 00 3B
R 00 00 00 16
T 00 00 3B E5 BC 30 E5 FB 53 BC DF AF BD 53 07 03
R 00 00 00 16
T 00 00 48 8F 06 7F 00 AC BE 7D 00 EC 42 07 ED 42
R 00 00 00 16
T 00 00 55 06 8F 82 8E 83 22
R 00 00 00 16
T 00 00 5B
R 00 00 00 16
T 00 00 5B 75 82 0B 12 00 20 12 00 00 AC 82 AD 83
R 00 00 00 16 00 07 00 16 02 0A 00 37
T 00 00 68 AE F0 FF E4 C0 E0 C0 E0 74 80 C0 E0 74
R 00 00 00 16
T 00 00 75 44 C0 E0 8C 82 8D 83 8E F0 EF 12 00 00
R 00 00 00 16 02 0E 00 65
T 00 00 82 AC 82 AD 83 AE F0 FF E5 81 24 FC F5 81
R 00 00 00 16
T 00 00 8F C0 04 C0 05 C0 06 C0 07 90 00 00 75 F0
R 00 00 00 16
T 00 00 9C 20 74 41 12 00 00 AC 82 AD 83 AE F0 FF
R 00 00 00 16 02 07 00 04
T 00 00 A9 E5 81 24 FC F5 81 C0 04 C0 05 C0 06 C0
R 00 00 00 16
T 00 00 B6 07 90 00 00 75 F0 7A 74 44 12 00 00 AC
R 00 00 00 16 02 0D 00 04
T 00 00 C3 82 AD 83 AE F0 FF E5 81 24 FC F5 81 8C
R 00 00 00 16
T 00 00 D0 82 8D 83 8E F0 EF 02 00 00
R 00 00 00 16 02 0A 00 36
T 00 00 00
R 00 00 00 17
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 17
AliceRX_STC/build/adc.sym
+558
View File
@@ -0,0 +1,558 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
17 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
___fs2uint ****** GX
___fsdiv ****** GX
___fsmul ****** GX
___uint2fs ****** GX
8 _adc_busy 000000 R
16 _adc_init 000000 GR
16 _adc_read 000020 GR
16 _battery_read_mv 00005B GR
_delay_ms ****** GX
_delay_us ****** GX
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 0 flags 0
6 ISEG size 0 flags 0
7 IABS size 0 flags 8
8 BSEG size 1 flags 80
9 PSEG size 0 flags 50
A XSEG size 0 flags 40
B XABS size 0 flags 48
C XISEG size 0 flags 40
D HOME size 0 flags 20
E GSINIT0 size 0 flags 20
F GSINIT1 size 0 flags 20
10 GSINIT2 size 0 flags 20
11 GSINIT3 size 0 flags 20
12 GSINIT4 size 0 flags 20
13 GSINIT5 size 0 flags 20
14 GSINIT size 2 flags 20
15 GSFINAL size 0 flags 20
16 CSEG size D9 flags 20
17 CONST size 5 flags 20
18 XINIT size 0 flags 20
19 CABS size 0 flags 28
AliceRX_STC/build/cmd.asm
+1356
View File
File diff suppressed because it is too large Load Diff
AliceRX_STC/build/cmd.lst
+1358
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File diff suppressed because it is too large Load Diff
AliceRX_STC/build/cmd.rel
+803
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@@ -0,0 +1,803 @@
XH3
H 1B areas 7E global symbols
M cmd
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S ___memcpy_PARM_2 Ref000000
S _ADCTIM_X Def00FEA8
S ___memcpy_PARM_3 Ref000000
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _model_set_channel Ref000000
S _TCON Def000088
S _TMOD Def000089
S __gptrput Ref000000
S _uart1_rx_available Ref000000
S __mulint Ref000000
S _PSW Def0000D0
S _uart1_read_byte Ref000000
S _SPDAT Def0000CF
S _uart1_send_bytes Ref000000
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S _memcmp Ref000000
S .__.ABS. Def000000
S _model_set_mode Ref000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _model_set_address Ref000000
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S ___memcpy Ref000000
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S __mulint_PARM_2 Ref000000
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _strlen Ref000000
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _uart1_send_bytes_PARM_2 Ref000000
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _memcmp_PARM_2 Ref000000
S _SPSTAT Def0000CD
S _memcmp_PARM_3 Ref000000
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 51 flags 0 addr 0
A OSEG size 0 flags 4 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 20 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 1 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 546 flags 20 addr 0
S _cmd_feed_byte Def000218
S _cmd_poll Def000208
A CONST size 58 flags 20 addr 0
A XINIT size 1 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 02
R 00 00 00 05
T 00 00 02
R 00 00 00 05
T 00 00 05
R 00 00 00 05
T 00 00 05
R 00 00 00 05
T 00 00 06
R 00 00 00 05
T 00 00 06
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 0A
R 00 00 00 05
T 00 00 0A
R 00 00 00 05
T 00 00 0D
R 00 00 00 05
T 00 00 0D
R 00 00 00 05
T 00 00 1D
R 00 00 00 05
T 00 00 1D
R 00 00 00 05
T 00 00 3D
R 00 00 00 05
T 00 00 3D
R 00 00 00 05
T 00 00 3E
R 00 00 00 05
T 00 00 3E
R 00 00 00 05
T 00 00 43
R 00 00 00 05
T 00 00 43
R 00 00 00 05
T 00 00 44
R 00 00 00 05
T 00 00 44
R 00 00 00 05
T 00 00 45
R 00 00 00 05
T 00 00 45
R 00 00 00 05
T 00 00 4D
R 00 00 00 05
T 00 00 4D
R 00 00 00 05
T 00 00 4F
R 00 00 00 05
T 00 00 4F
R 00 00 00 05
T 00 00 00
R 00 00 00 0B
T 00 00 00
R 00 00 00 0B
T 00 00 00
R 00 00 00 0D
T 00 00 00
R 00 00 00 0D
T 00 00 00
R 00 00 00 17
T 00 00 00 AD 82 AE 83 AF F0 C0 07 C0 06 C0 05 12
R 00 00 00 17
T 00 00 0D 00 00 AB 82 D0 05 D0 06 D0 07 8B
R 00 00 00 17 02 03 00 6B
T 00 00 18 00 00 00 90 00 00 E0 C3 95
R 00 00 00 17 F1 21 03 00 05 00 07 00 0D
T 00 00 1F 00 00 00 50 04 75 82 00 22
R 00 00 00 17 F1 21 03 00 05
T 00 00 26
R 00 00 00 17
T 00 00 26 7C 00
R 00 00 00 17
T 00 00 28
R 00 00 00 17
T 00 00 28 C3 EC 95 00 00 00 50 4B EC 24 00 00 00
R 00 00 00 17 F1 21 06 00 05 F1 01 0D 00 0B
T 00 00 31 F5 82 E4 34 00 00 00 F5 83 E0 FA EC 2D
R 00 00 00 17 F1 81 07 00 0B
T 00 00 3C F8 E4 3E F9 8F 03 88 82 89 83 8B F0 12
R 00 00 00 17
T 00 00 49 00 00 FB BA 61 00
R 00 00 00 17 02 03 00 71
T 00 00 4F
R 00 00 00 17
T 00 00 4F 40 0B EA 24 85 40 06 8A 01 E9 24 E0 FA
R 00 00 00 17
T 00 00 5C
R 00 00 00 17
T 00 00 5C BB 61 00
R 00 00 00 17
T 00 00 5F
R 00 00 00 17
T 00 00 5F 40 0B EB 24 85 40 06 8B 01 E9 24 E0 FB
R 00 00 00 17
T 00 00 6C
R 00 00 00 17
T 00 00 6C EA B5 03 02 80 04
R 00 00 00 17
T 00 00 72
R 00 00 00 17
T 00 00 72 75 82 00 22
R 00 00 00 17
T 00 00 76
R 00 00 00 17
T 00 00 76 0C 80 AF
R 00 00 00 17
T 00 00 79
R 00 00 00 17
T 00 00 79 75 82 01 22
R 00 00 00 17
T 00 00 7D
R 00 00 00 17
T 00 00 7D 85 82 00 00 02 85 83 00 00 03 85 F0
R 00 00 00 17 F1 21 05 00 05 F1 21 0A 00 05
T 00 00 85 00 00 04 7C 00 7B 00 7A 00 79 00
R 00 00 00 17 F1 21 03 00 05
T 00 00 8E
R 00 00 00 17
T 00 00 8E 90 00 00 E0 F8 C3 E9 98 40 03 02 01 11
R 00 00 00 17 00 04 00 0D 00 0E 00 17
T 00 00 9B
R 00 00 00 17
T 00 00 9B E9 24 00 00 00 F5 82 E4 34 00 00 00 F5
R 00 00 00 17 F1 01 05 00 0B F1 81 0C 00 0B
T 00 00 A4 83 E0 F8 B8 28 09 7C 01 89 07 EF 04 FB
R 00 00 00 17
T 00 00 B1 80 58
R 00 00 00 17
T 00 00 B3
R 00 00 00 17
T 00 00 B3 B8 29 55 EC 60 52 EA C3 9B F5 00 00 05
R 00 00 00 17 F1 21 0D 00 05
T 00 00 BE C3 E5 00 00 01 95 00 00 05 50 03 85
R 00 00 00 17 F1 21 05 00 05 F1 21 09 00 05
T 00 00 C6 00 00 01 00 00 05
R 00 00 00 17 F1 21 03 00 05 F1 21 06 00 05
T 00 00 C8
R 00 00 00 17
T 00 00 C8 85 00 00 02 00 00 06 85
R 00 00 00 17 F1 21 04 00 05 F1 21 07 00 05
T 00 00 CC 00 00 03 00 00 07 85
R 00 00 00 17 F1 21 03 00 05 F1 21 06 00 05
T 00 00 CF 00 00 04 00 00 08 EB 24
R 00 00 00 17 F1 21 03 00 05 F1 21 06 00 05
T 00 00 D3 00 00 00 FE E4 34 00 00 00 FF 8E
R 00 00 00 17 F1 01 03 00 0B F1 81 09 00 0B
T 00 00 DA 00 00 00 8F 00 00 01 75
R 00 00 00 17 F1 23 03 00 09 F1 23 07 00 09
T 00 00 DE 00 00 02 00 85 00 00 05
R 00 00 00 17 F1 23 03 00 09 F1 21 08 00 05
T 00 00 E2 00 00 00 75 00 00 01 00 85
R 00 00 00 17 F1 23 03 00 0B F1 23 07 00 0B
T 00 00 E7 00 00 06 82 85 00 00 07 83 85
R 00 00 00 17 F1 21 03 00 05 F1 21 08 00 05
T 00 00 ED 00 00 08 F0 12 00 00 E5
R 00 00 00 17 F1 21 03 00 05 02 08 00 41
T 00 00 F3 00 00 05 25 00 00 02 FD E4 35
R 00 00 00 17 F1 21 03 00 05 F1 21 07 00 05
T 00 00 F9 00 00 03 FE AF 00 00 04 8D 82 8E 83 8F
R 00 00 00 17 F1 21 03 00 05 F1 21 08 00 05
T 00 01 02 F0 E4 12 00 00 85 00 00 05 82 22
R 00 00 00 17 02 06 00 1B F1 21 09 00 05
T 00 01 0B
R 00 00 00 17
T 00 01 0B 09 89 02 02 00 8E
R 00 00 00 17 00 07 00 17
T 00 01 11
R 00 00 00 17
T 00 01 11 75 82 00 22
R 00 00 00 17
T 00 01 15
R 00 00 00 17
T 00 01 15 AD 82 AE 83 AF F0 7C 00 12 00 00 FB BB
R 00 00 00 17 02 0C 00 71
T 00 01 22 30 22 74 01 2D F9 E4 3E FA 8F 03 89 82
R 00 00 00 17
T 00 01 2F 8A 83 8B F0 12 00 00 FB BB 78 02 80 03
R 00 00 00 17 02 08 00 71
T 00 01 3C
R 00 00 00 17
T 00 01 3C BB 58 07
R 00 00 00 17
T 00 01 3F
R 00 00 00 17
T 00 01 3F 74 02 2D FD E4 3E FE
R 00 00 00 17
T 00 01 46
R 00 00 00 17
T 00 01 46 7B 00
R 00 00 00 17
T 00 01 48
R 00 00 00 17
T 00 01 48 BB 02 00
R 00 00 00 17
T 00 01 4B
R 00 00 00 17
T 00 01 4B 50 51 EB 2D F8 E4 3E F9 8F 02 88 82 89
R 00 00 00 17
T 00 01 58 83 8A F0 12 00 00 FA 8C 01 E9 C4 54 F0
R 00 00 00 17 02 07 00 71
T 00 01 65 FC BA 30 00
R 00 00 00 17
T 00 01 69
R 00 00 00 17
T 00 01 69 40 0E EA 24 C6 40 09 8A 01 E9 24 D0 42
R 00 00 00 17
T 00 01 76 04 80 22
R 00 00 00 17
T 00 01 79
R 00 00 00 17
T 00 01 79 BA 61 00
R 00 00 00 17
T 00 01 7C
R 00 00 00 17
T 00 01 7C 40 0E EA 24 99 40 09 8A 01 74 A9 29 42
R 00 00 00 17
T 00 01 89 04 80 0F
R 00 00 00 17
T 00 01 8C
R 00 00 00 17
T 00 01 8C BA 41 00
R 00 00 00 17
T 00 01 8F
R 00 00 00 17
T 00 01 8F 40 0A EA 24 B9 40 05 74 C9 2A 42 04
R 00 00 00 17
T 00 01 9B
R 00 00 00 17
T 00 01 9B 0B 80 AA
R 00 00 00 17
T 00 01 9E
R 00 00 00 17
T 00 01 9E 8C 82 22
R 00 00 00 17
T 00 01 A1
R 00 00 00 17
T 00 01 A1 85 82 00 00 0A 85 83 00 00 0B 85 F0
R 00 00 00 17 F1 21 05 00 05 F1 21 0A 00 05
T 00 01 A9 00 00 0C 7B 00 7C 00 7A 00
R 00 00 00 17 F1 21 03 00 05
T 00 01 B0
R 00 00 00 17
T 00 01 B0 C3 EA 95 00 00 09 50 4D EA 25 00 00 0A
R 00 00 00 17 F1 21 06 00 05 F1 21 0D 00 05
T 00 01 B9 F8 E4 35 00 00 0B F9 AF 00 00 0C 88 82
R 00 00 00 17 F1 21 06 00 05 F1 21 0B 00 05
T 00 01 C2 89 83 8F F0 12 00 00 FF BF 30 00
R 00 00 00 17 02 08 00 71
T 00 01 CD
R 00 00 00 17
T 00 01 CD 40 31 EF 24 C6 40 2C 8B 00 00 00 8C
R 00 00 00 17 F1 23 0B 00 67
T 00 01 D7 00 00 01 90 00 0A C0 07 C0 02 12 00 00
R 00 00 00 17 F1 23 03 00 67 02 0E 00 1D
T 00 01 E2 AD 82 AE 83 D0 02 D0 07 8F 01 7F 00 E9
R 00 00 00 17
T 00 01 EF 24 D0 F9 EF 34 FF FF E9 2D FD EF 3E FE
R 00 00 00 17
T 00 01 FC 8D 03 8E 04
R 00 00 00 17
T 00 02 00
R 00 00 00 17
T 00 02 00 0A 80 AD
R 00 00 00 17
T 00 02 03
R 00 00 00 17
T 00 02 03 8B 82 8C 83 22
R 00 00 00 17
T 00 02 08
R 00 00 00 17
T 00 02 08
R 00 00 00 17
T 00 02 08 12 00 00 E5 82 60 08 12 00 00 12
R 00 00 00 17 02 04 00 1C 02 0B 00 1F
T 00 02 13 02 18 80 F1
R 00 00 00 17 00 03 00 17
T 00 02 17
R 00 00 00 17
T 00 02 17 22
R 00 00 00 17
T 00 02 18
R 00 00 00 17
T 00 02 18 E5 82 FF 70 01 22
R 00 00 00 17
T 00 02 1E
R 00 00 00 17
T 00 02 1E BF 0D 02 80 08
R 00 00 00 17
T 00 02 23
R 00 00 00 17
T 00 02 23 BF 0A 02 80 03
R 00 00 00 17
T 00 02 28
R 00 00 00 17
T 00 02 28 02 05 23
R 00 00 00 17 00 04 00 17
T 00 02 2B
R 00 00 00 17
T 00 02 2B
R 00 00 00 17
T 00 02 2B 90 00 00 E0 FE 24 00 00 00 F5 82 E4 34
R 00 00 00 17 00 04 00 0D F1 01 09 00 0B
T 00 02 36 00 00 00 F5 83 E4 F0 90 00 00 E0 70 03
R 00 00 00 17 F1 81 03 00 0B 00 0B 00 0D
T 00 02 41 02 05 1D
R 00 00 00 17 00 04 00 17
T 00 02 44
R 00 00 00 17
T 00 02 44 90 00 05 75 F0 80 12 00 00 E5 82 70 03
R 00 00 00 17 00 04 00 18 00 0A 00 17
T 00 02 51 02 03 84
R 00 00 00 17 00 04 00 17
T 00 02 54
R 00 00 00 17
T 00 02 54 75 00 00 01 10 90 00 0D 75 F0 40 12
R 00 00 00 17 F1 21 04 00 05 00 09 00 05
T 00 02 5E 00 7D E5 82 70 03 02 05 1D
R 00 00 00 17 00 03 00 17 00 0A 00 17
T 00 02 67
R 00 00 00 17
T 00 02 67 7E 00 75 00 00 00 00 00 0B 75
R 00 00 00 17 F1 23 06 00 77 F1 01 09 00 18
T 00 02 6D 00 00 01 00 00 0B 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 02 70 00 00 02 80 75 00 00 00 04 8E
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 02 76 00 00 01 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 07 00 05
T 00 02 80 00 00 E5 82 85 83 F0 D0 06 45 F0 60 25
R 00 00 00 17 02 03 00 29
T 00 02 8D 75 00 00 00 00 00 10 75
R 00 00 00 17 F1 23 04 00 77 F1 01 07 00 18
T 00 02 91 00 00 01 00 00 10 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 02 94 00 00 02 80 75 00 00 00 04 75
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 02 9A 00 00 01 00 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 08 00 05
T 00 02 A5 00 00 E5 82 85 83 F0 D0 06 45 F0 70 0B
R 00 00 00 17 02 03 00 29
T 00 02 B2
R 00 00 00 17
T 00 02 B2 75 82 00 12 00 00 7E 01 02 03 63
R 00 00 00 17 02 07 00 2B 00 0C 00 17
T 00 02 BD
R 00 00 00 17
T 00 02 BD 75 00 00 00 00 00 15 75
R 00 00 00 17 F1 23 04 00 77 F1 01 07 00 18
T 00 02 C1 00 00 01 00 00 15 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 02 C4 00 00 02 80 75 00 00 00 03 75
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 02 CA 00 00 01 00 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 08 00 05
T 00 02 D5 00 00 E5 82 85 83 F0 D0 06 45 F0 60 25
R 00 00 00 17 02 03 00 29
T 00 02 E2 75 00 00 00 00 00 19 75
R 00 00 00 17 F1 23 04 00 77 F1 01 07 00 18
T 00 02 E6 00 00 01 00 00 19 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 02 E9 00 00 02 80 75 00 00 00 03 75
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 02 EF 00 00 01 00 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 08 00 05
T 00 02 FA 00 00 E5 82 85 83 F0 D0 06 45 F0 70 0A
R 00 00 00 17 02 03 00 29
T 00 03 07
R 00 00 00 17
T 00 03 07 75 82 01 12 00 00 7E 01 80 52
R 00 00 00 17 02 07 00 2B
T 00 03 11
R 00 00 00 17
T 00 03 11 75 00 00 00 00 00 1D 75
R 00 00 00 17 F1 23 04 00 77 F1 01 07 00 18
T 00 03 15 00 00 01 00 00 1D 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 03 18 00 00 02 80 75 00 00 00 04 75
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 03 1E 00 00 01 00 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 08 00 05
T 00 03 29 00 00 E5 82 85 83 F0 D0 06 45 F0 60 25
R 00 00 00 17 02 03 00 29
T 00 03 36 75 00 00 00 00 00 22 75
R 00 00 00 17 F1 23 04 00 77 F1 01 07 00 18
T 00 03 3A 00 00 01 00 00 22 75
R 00 00 00 17 F1 23 03 00 77 F1 81 06 00 18
T 00 03 3D 00 00 02 80 75 00 00 00 04 75
R 00 00 00 17 F1 23 03 00 77 F1 23 08 00 79
T 00 03 43 00 00 01 00 90 00 0D 75 F0 40 C0 06 12
R 00 00 00 17 F1 23 03 00 79 00 08 00 05
T 00 03 4E 00 00 E5 82 85 83 F0 D0 06 45 F0 70 08
R 00 00 00 17 02 03 00 29
T 00 03 5B
R 00 00 00 17
T 00 03 5B 75 82 02 12 00 00 7E 01
R 00 00 00 17 02 07 00 2B
T 00 03 63
R 00 00 00 17
T 00 03 63 EE 60 0F 75 00 00 00 04 90 00 27 75 F0
R 00 00 00 17 F1 23 07 00 70 00 0C 00 18
T 00 03 6E 80 12 00 00 02 05 1D
R 00 00 00 17 02 05 00 21 00 08 00 17
T 00 03 75
R 00 00 00 17
T 00 03 75 75 00 00 00 05 90 00 2C 75 F0 80 12
R 00 00 00 17 F1 23 04 00 70 00 09 00 18
T 00 03 7F 00 00 02 05 1D
R 00 00 00 17 02 03 00 21 00 06 00 17
T 00 03 84
R 00 00 00 17
T 00 03 84 90 00 32 75 F0 80 12 00 00 E5 82 70 03
R 00 00 00 17 00 04 00 18 00 0A 00 17
T 00 03 91 02 04 B6
R 00 00 00 17 00 04 00 17
T 00 03 94
R 00 00 00 17
T 00 03 94 75 00 00 01 20 90 00 1D 75 F0 40 12
R 00 00 00 17 F1 21 04 00 05 00 09 00 05
T 00 03 9E 00 7D 85 82 00 00 3D 74 FE 25
R 00 00 00 17 00 03 00 17 F1 21 07 00 05
T 00 03 A6 00 00 3D 40 03 02 05 1D
R 00 00 00 17 F1 21 03 00 05 00 09 00 17
T 00 03 AC
R 00 00 00 17
T 00 03 AC 75 00 00 3E E7 75 00 00 3F E7 75
R 00 00 00 17 F1 21 04 00 05 F1 21 09 00 05
T 00 03 B3 00 00 40 E7 75 00 00 41 E7 75
R 00 00 00 17 F1 21 03 00 05 F1 21 08 00 05
T 00 03 B9 00 00 42 C2 7D 00 8D 00 00 43
R 00 00 00 17 F1 21 03 00 05 F1 21 0A 00 05
T 00 03 BF
R 00 00 00 17
T 00 03 BF C3 ED 95 00 00 3D 40 03 02 04 8A
R 00 00 00 17 F1 21 06 00 05 00 0C 00 17
T 00 03 C8
R 00 00 00 17
T 00 03 C8 74 FB 25 00 00 43 50 03 02 04 8A
R 00 00 00 17 F1 21 06 00 05 00 0C 00 17
T 00 03 D1
R 00 00 00 17
T 00 03 D1 8D 03
R 00 00 00 17
T 00 03 D3
R 00 00 00 17
T 00 03 D3 C3 EB 95 00 00 3D 50 0C EB 24 00 00 1D
R 00 00 00 17 F1 21 06 00 05 F1 01 0D 00 05
T 00 03 DC F9 87 02 BA 20 03 0B 80 EE
R 00 00 00 17
T 00 03 E5
R 00 00 00 17
T 00 03 E5 8B 00 00 44 8B 00 00 4D 75
R 00 00 00 17 F1 21 04 00 05 F1 21 08 00 05
T 00 03 EA 00 00 4E 00 74 02 25 00 00 4D FA E4 35
R 00 00 00 17 F1 21 03 00 05 F1 21 0A 00 05
T 00 03 F3 00 00 4E FC 85 00 00 3D
R 00 00 00 17 F1 21 03 00 05 F1 21 08 00 05
T 00 03 F7 00 00 4F 75 00 00 50 00 C3 E5
R 00 00 00 17 F1 21 03 00 05 F1 21 07 00 05
T 00 03 FD 00 00 4F 9A E5 00 00 50 64 80 8C F0 63
R 00 00 00 17 F1 21 03 00 05 F1 21 08 00 05
T 00 04 06 F0 80 95 F0 50 03 02 04 8A
R 00 00 00 17 00 0A 00 17
T 00 04 0F
R 00 00 00 17
T 00 04 0F 74 01 25 00 00 4D FA E4 35 00 00 4E FC
R 00 00 00 17 F1 21 06 00 05 F1 21 0C 00 05
T 00 04 18 C3 EA 95 00 00 4F EC 64 80 85 00 00 50
R 00 00 00 17 F1 21 06 00 05 F1 21 0D 00 05
T 00 04 21 F0 63 F0 80 95 F0 50 3B EB 24 00 00 1D
R 00 00 00 17 F1 01 0D 00 05
T 00 04 2C F9 87 04 BC 30 32 EB 04 24 00 00 1D F9
R 00 00 00 17 F1 01 0C 00 05
T 00 04 37 87 04 BC 78 02 80 0A
R 00 00 00 17
T 00 04 3E
R 00 00 00 17
T 00 04 3E EB 04 24 00 00 1D F9 87 04 BC 58 1C
R 00 00 00 17 F1 01 06 00 05
T 00 04 48
R 00 00 00 17
T 00 04 48 E5 00 00 44 24 00 00 1D FC 7B 00 7A 40
R 00 00 00 17 F1 21 04 00 05 F1 01 08 00 05
T 00 04 51 8C 82 8B 83 8A F0 12 01 15 AC 82 AA
R 00 00 00 17 00 0A 00 17
T 00 04 5D 00 00 44 74 04 2A FD 80 1A
R 00 00 00 17 F1 21 03 00 05
T 00 04 64
R 00 00 00 17
T 00 04 64 E5 00 00 44 24 00 00 1D FA 7B 00 7E 40
R 00 00 00 17 F1 21 04 00 05 F1 01 08 00 05
T 00 04 6D 8A 82 8B 83 8E F0 12 01 15 AC 82 AA
R 00 00 00 17 00 0A 00 17
T 00 04 79 00 00 44 74 02 2A FD
R 00 00 00 17 F1 21 03 00 05
T 00 04 7E
R 00 00 00 17
T 00 04 7E E5 00 00 43 24 00 00 3E F9 05
R 00 00 00 17 F1 21 04 00 05 F1 01 08 00 05
T 00 04 84 00 00 43 A7 04 02 03 BF
R 00 00 00 17 F1 21 03 00 05 00 09 00 17
T 00 04 8A
R 00 00 00 17
T 00 04 8A 74 05 B5 00 00 43 18 90 00 3E 75 F0 40
R 00 00 00 17 F1 21 06 00 05 00 0B 00 05
T 00 04 95 12 00 00 75 00 00 00 04 90
R 00 00 00 17 02 04 00 31 F1 23 07 00 70
T 00 04 9C 00 27 75 F0 80 12 00 00 02
R 00 00 00 17 00 03 00 18 02 09 00 21
T 00 04 A5 05 1D
R 00 00 00 17 00 03 00 17
T 00 04 A7
R 00 00 00 17
T 00 04 A7 75 00 00 00 0A 90 00 37 75 F0 80 12
R 00 00 00 17 F1 23 04 00 70 00 09 00 18
T 00 04 B1 00 00 02 05 1D
R 00 00 00 17 02 03 00 21 00 06 00 17
T 00 04 B6
R 00 00 00 17
T 00 04 B6 90 00 42 75 F0 80 12 00 00 E5 82 60 4E
R 00 00 00 17 00 04 00 18 00 0A 00 17
T 00 04 C3 75 00 00 01 08 90 00 45 75 F0 40 12
R 00 00 00 17 F1 21 04 00 05 00 09 00 05
T 00 04 CD 00 7D E5 82 FE FD 60 48 8D 00 00 09 90
R 00 00 00 17 00 03 00 17 F1 21 0C 00 05
T 00 04 D8 00 45 75 F0 40 12 01 A1 AD 82 AE 83 8D
R 00 00 00 17 00 03 00 05 00 09 00 17
T 00 04 E5 03 8E 04 C3 74 7D 9B E4 9C 40 13 8D 82
R 00 00 00 17
T 00 04 F2 12 00 00 75 00 00 00 04 90
R 00 00 00 17 02 04 00 18 F1 23 07 00 70
T 00 04 F9 00 27 75 F0 80 12 00 00 80 1A
R 00 00 00 17 00 03 00 18 02 09 00 21
T 00 05 03
R 00 00 00 17
T 00 05 03 75 00 00 00 0B 90 00 46 75 F0 80 12
R 00 00 00 17 F1 23 04 00 70 00 09 00 18
T 00 05 0D 00 00 80 0C
R 00 00 00 17 02 03 00 21
T 00 05 11
R 00 00 00 17
T 00 05 11 75 00 00 00 05 90 00 52 75 F0 80 12
R 00 00 00 17 F1 23 04 00 70 00 09 00 18
T 00 05 1B 00 00
R 00 00 00 17 02 03 00 21
T 00 05 1D
R 00 00 00 17
T 00 05 1D 90 00 00 E4 F0 22
R 00 00 00 17 00 04 00 0D
T 00 05 23
R 00 00 00 17
T 00 05 23 90 00 00 E0 FE BE 1F 00
R 00 00 00 17 00 04 00 0D
T 00 05 2B
R 00 00 00 17
T 00 05 2B 50 13 90 00 00 EE 04 F0 EE 24 00 00 00
R 00 00 00 17 00 06 00 0D F1 01 0D 00 0B
T 00 05 36 F5 82 E4 34 00 00 00 F5 83 EF F0 22
R 00 00 00 17 F1 81 07 00 0B
T 00 05 40
R 00 00 00 17
T 00 05 40 90 00 00 E4 F0 22
R 00 00 00 17 00 04 00 0D
T 00 00 00
R 00 00 00 18
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 18
T 00 00 05
R 00 00 00 18
T 00 00 05 4D 4F 44 45 4C 00
R 00 00 00 18
T 00 00 0B
R 00 00 00 18
T 00 00 0B 53 42 55 53 00
R 00 00 00 18
T 00 00 10
R 00 00 00 18
T 00 00 10 73 62 75 73 00
R 00 00 00 18
T 00 00 15
R 00 00 00 18
T 00 00 15 50 57 4D 00
R 00 00 00 18
T 00 00 19
R 00 00 00 18
T 00 00 19 70 77 6D 00
R 00 00 00 18
T 00 00 1D
R 00 00 00 18
T 00 00 1D 55 41 52 54 00
R 00 00 00 18
T 00 00 22
R 00 00 00 18
T 00 00 22 75 61 72 74 00
R 00 00 00 18
T 00 00 27
R 00 00 00 18
T 00 00 27 4F 4B 0D 0A 00
R 00 00 00 18
T 00 00 2C
R 00 00 00 18
T 00 00 2C 45 52 52 0D 0A 00
R 00 00 00 18
T 00 00 32
R 00 00 00 18
T 00 00 32 41 44 44 52 00
R 00 00 00 18
T 00 00 37
R 00 00 00 18
T 00 00 37 45 52 52 5F 41 44 44 52 0D 0A 00
R 00 00 00 18
T 00 00 42
R 00 00 00 18
T 00 00 42 54 55 4E 00
R 00 00 00 18
T 00 00 46
R 00 00 00 18
T 00 00 46 45 52 52 5F 52 41 4E 47 45 0D 0A 00
R 00 00 00 18
T 00 00 52
R 00 00 00 18
T 00 00 52 55 4E 4B 0D 0A 00
R 00 00 00 18
T 00 00 00
R 00 00 00 19
T 00 00 00 00
R 00 00 00 19
AliceRX_STC/build/cmd.sym
+612
View File
@@ -0,0 +1,612 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
18 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
___memcpy ****** GX
___memcpy_PARM_2 ****** GX
___memcpy_PARM_3 ****** GX
18 ___str_0 000005 R
18 ___str_1 00000B R
18 ___str_10 000037 R
18 ___str_11 000042 R
18 ___str_12 000046 R
18 ___str_13 000052 R
18 ___str_2 000010 R
18 ___str_3 000015 R
18 ___str_4 000019 R
18 ___str_5 00001D R
18 ___str_6 000022 R
18 ___str_7 000027 R
18 ___str_8 00002C R
18 ___str_9 000032 R
__gptrget ****** GX
__gptrput ****** GX
__mulint ****** GX
__mulint_PARM_2 ****** GX
19 __xinit__s_len 000000 R
17 _cmd_extract_parens 00007D R
5 _cmd_extract_parens_PARM_2 000001 R
5 _cmd_extract_parens_len_262144_42 000005 R
5 _cmd_extract_parens_out_65536_37 000002 R
5 _cmd_extract_parens_sloc0_1_0 000006 R
17 _cmd_feed_byte 000218 GR
5 _cmd_feed_byte_addr_327680_68 00003E R
5 _cmd_feed_byte_count_327680_68 000043 R
5 _cmd_feed_byte_i_327680_68 000044 R
5 _cmd_feed_byte_p_262144_59 00000D R
5 _cmd_feed_byte_p_262144_67 00001D R
5 _cmd_feed_byte_p_262144_76 000045 R
5 _cmd_feed_byte_pl_262144_67 00003D R
5 _cmd_feed_byte_sloc0_1_0 00004D R
5 _cmd_feed_byte_sloc1_1_0 00004F R
17 _cmd_poll 000208 GR
17 _cmd_starts_with 000000 R
5 _cmd_starts_with_n_65536_34 000000 R
17 _dec_to_int 0001A1 R
5 _dec_to_int_PARM_2 000009 R
5 _dec_to_int_s_65536_47 00000A R
17 _hex_to_byte 000115 R
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
_memcmp ****** GX
_memcmp_PARM_2 ****** GX
_memcmp_PARM_3 ****** GX
_model_set_address ****** GX
_model_set_channel ****** GX
_model_set_mode ****** GX
B _s_buf 000000 R
D _s_len 000000 R
_strlen ****** GX
_uart1_read_byte ****** GX
_uart1_rx_available ****** GX
_uart1_send_bytes ****** GX
_uart1_send_bytes_PARM_2 ****** GX
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 51 flags 0
6 OSEG size 0 flags 4
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 20 flags 40
C XABS size 0 flags 48
D XISEG size 1 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 546 flags 20
18 CONST size 58 flags 20
19 XINIT size 1 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/delay.asm
+441
View File
@@ -0,0 +1,441 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module delay
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _delay_us
.globl _delay_ms
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
.area OSEG (OVR,DATA)
.area OSEG (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function '_delay_loop'
;------------------------------------------------------------
;n Allocated to registers
;------------------------------------------------------------
; src/delay.c:9: static void _delay_loop(uint16_t n)
; -----------------------------------------
; function _delay_loop
; -----------------------------------------
__delay_loop:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
mov r6,dpl
mov r7,dph
; src/delay.c:11: while (n--) {
00101$:
mov ar4,r6
mov ar5,r7
dec r6
cjne r6,#0xff,00115$
dec r7
00115$:
mov a,r4
orl a,r5
jz 00104$
; src/delay.c:12: NOP(); NOP(); NOP(); NOP(); NOP();
nop
nop
nop
nop
nop
sjmp 00101$
00104$:
; src/delay.c:14: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'delay_us'
;------------------------------------------------------------
;us Allocated to registers
;------------------------------------------------------------
; src/delay.c:16: void delay_us(uint16_t us)
; -----------------------------------------
; function delay_us
; -----------------------------------------
_delay_us:
mov r6,dpl
mov r7,dph
; src/delay.c:19: while (us--) {
00101$:
mov ar4,r6
mov ar5,r7
dec r6
cjne r6,#0xff,00115$
dec r7
00115$:
mov a,r4
orl a,r5
jz 00104$
; src/delay.c:20: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
nop
nop
nop
nop
nop
nop
; src/delay.c:21: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
nop
nop
nop
nop
nop
nop
; src/delay.c:22: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
nop
nop
nop
nop
nop
nop
; src/delay.c:23: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
nop
nop
nop
nop
nop
nop
sjmp 00101$
00104$:
; src/delay.c:25: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'delay_ms'
;------------------------------------------------------------
;ms Allocated to registers
;------------------------------------------------------------
; src/delay.c:27: void delay_ms(uint16_t ms)
; -----------------------------------------
; function delay_ms
; -----------------------------------------
_delay_ms:
mov r6,dpl
mov r7,dph
; src/delay.c:29: while (ms--) {
00101$:
mov ar4,r6
mov ar5,r7
dec r6
cjne r6,#0xff,00115$
dec r7
00115$:
mov a,r4
orl a,r5
jz 00104$
; src/delay.c:30: delay_us(1000);
mov dptr,#0x03e8
push ar7
push ar6
lcall _delay_us
pop ar6
pop ar7
sjmp 00101$
00104$:
; src/delay.c:32: }
ret
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/delay.lst
+441
View File
@@ -0,0 +1,441 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module delay
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _EADC
12 .globl _ET1
13 .globl _ET0
14 .globl _ES
15 .globl _EA
16 .globl _REN
17 .globl _RI
18 .globl _TI
19 .globl _TR1
20 .globl _TF1
21 .globl _IT0
22 .globl _IE0
23 .globl _TR0
24 .globl _TF0
25 .globl _CMPCR2
26 .globl _CMPCR1
27 .globl _TA
28 .globl _IRCBAND_REG
29 .globl _IAP_TPS
30 .globl _IAP_CONTR
31 .globl _IAP_TRIG
32 .globl _IAP_CMD
33 .globl _IAP_ADDRL
34 .globl _IAP_ADDRH
35 .globl _IAP_DATA
36 .globl _WDT_CONTR
37 .globl _PCA_PWM3
38 .globl _PCA_PWM2
39 .globl _PCA_PWM1
40 .globl _PCA_PWM0
41 .globl _CCAP3L
42 .globl _CCAP2L
43 .globl _CCAP1L
44 .globl _CCAP0L
45 .globl _CCAPM3
46 .globl _CCAPM2
47 .globl _CCAPM1
48 .globl _CCAPM0
49 .globl _CMOD
50 .globl _CCON
51 .globl _ADCTIM_X
52 .globl _ADCCFG
53 .globl _ADC_RESL
54 .globl _ADC_RES
55 .globl _ADC_CONTR
56 .globl _SPDAT
57 .globl _SPCTL
58 .globl _SPSTAT
59 .globl _IP2H
60 .globl _IP2
61 .globl _IP
62 .globl _IE2
63 .globl _IE
64 .globl _BRT
65 .globl _P_SW1
66 .globl _SADEN
67 .globl _SADDR
68 .globl _S2BUF
69 .globl _S2CON
70 .globl _SBUF
71 .globl _SCON
72 .globl _TM4PS_X
73 .globl _TM3PS_X
74 .globl _TM2PS_X
75 .globl _T4T3M
76 .globl _T4L
77 .globl _T4H
78 .globl _T3L
79 .globl _T3H
80 .globl _T2L
81 .globl _T2H
82 .globl _INTCLKO
83 .globl _AUXR
84 .globl _TH1
85 .globl _TH0
86 .globl _TL1
87 .globl _TL0
88 .globl _TMOD
89 .globl _TCON
90 .globl _P_SW2
91 .globl _P5M0
92 .globl _P5M1
93 .globl _P4M0
94 .globl _P4M1
95 .globl _P3M0
96 .globl _P3M1
97 .globl _P2M0
98 .globl _P2M1
99 .globl _P1M0
100 .globl _P1M1
101 .globl _P0M0
102 .globl _P0M1
103 .globl _PSW
104 .globl _B
105 .globl _ACC
106 .globl _PCON
107 .globl _DPH
108 .globl _DPL
109 .globl _SP
110 .globl _P5
111 .globl _P4
112 .globl _P3
113 .globl _P2
114 .globl _P1
115 .globl _P0
116 .globl _delay_us
117 .globl _delay_ms
118 ;--------------------------------------------------------
119 ; special function registers
120 ;--------------------------------------------------------
121 .area RSEG (ABS,DATA)
000000 122 .org 0x0000
000080 123 _P0 = 0x0080
000090 124 _P1 = 0x0090
0000A0 125 _P2 = 0x00a0
0000B0 126 _P3 = 0x00b0
0000C0 127 _P4 = 0x00c0
0000C8 128 _P5 = 0x00c8
000081 129 _SP = 0x0081
000082 130 _DPL = 0x0082
000083 131 _DPH = 0x0083
000087 132 _PCON = 0x0087
0000E0 133 _ACC = 0x00e0
0000F0 134 _B = 0x00f0
0000D0 135 _PSW = 0x00d0
000093 136 _P0M1 = 0x0093
000094 137 _P0M0 = 0x0094
000091 138 _P1M1 = 0x0091
000092 139 _P1M0 = 0x0092
000095 140 _P2M1 = 0x0095
000096 141 _P2M0 = 0x0096
0000B1 142 _P3M1 = 0x00b1
0000B2 143 _P3M0 = 0x00b2
0000B3 144 _P4M1 = 0x00b3
0000B4 145 _P4M0 = 0x00b4
0000C9 146 _P5M1 = 0x00c9
0000CA 147 _P5M0 = 0x00ca
0000BA 148 _P_SW2 = 0x00ba
000088 149 _TCON = 0x0088
000089 150 _TMOD = 0x0089
00008A 151 _TL0 = 0x008a
00008B 152 _TL1 = 0x008b
00008C 153 _TH0 = 0x008c
00008D 154 _TH1 = 0x008d
00008E 155 _AUXR = 0x008e
00008F 156 _INTCLKO = 0x008f
0000D6 157 _T2H = 0x00d6
0000D7 158 _T2L = 0x00d7
0000D4 159 _T3H = 0x00d4
0000D5 160 _T3L = 0x00d5
0000D2 161 _T4H = 0x00d2
0000D3 162 _T4L = 0x00d3
0000D1 163 _T4T3M = 0x00d1
00FEA1 164 _TM2PS_X = 0xfea1
00FEA2 165 _TM3PS_X = 0xfea2
00FEA3 166 _TM4PS_X = 0xfea3
000098 167 _SCON = 0x0098
000099 168 _SBUF = 0x0099
00009A 169 _S2CON = 0x009a
00009B 170 _S2BUF = 0x009b
0000A9 171 _SADDR = 0x00a9
0000B9 172 _SADEN = 0x00b9
0000A2 173 _P_SW1 = 0x00a2
00009C 174 _BRT = 0x009c
0000A8 175 _IE = 0x00a8
0000AF 176 _IE2 = 0x00af
0000B8 177 _IP = 0x00b8
0000B6 178 _IP2 = 0x00b6
0000B7 179 _IP2H = 0x00b7
0000CD 180 _SPSTAT = 0x00cd
0000CE 181 _SPCTL = 0x00ce
0000CF 182 _SPDAT = 0x00cf
0000BC 183 _ADC_CONTR = 0x00bc
0000BD 184 _ADC_RES = 0x00bd
0000BE 185 _ADC_RESL = 0x00be
0000DE 186 _ADCCFG = 0x00de
00FEA8 187 _ADCTIM_X = 0xfea8
0000D8 188 _CCON = 0x00d8
0000D9 189 _CMOD = 0x00d9
0000DA 190 _CCAPM0 = 0x00da
0000DB 191 _CCAPM1 = 0x00db
0000DC 192 _CCAPM2 = 0x00dc
0000DD 193 _CCAPM3 = 0x00dd
0000EA 194 _CCAP0L = 0x00ea
0000EB 195 _CCAP1L = 0x00eb
0000EC 196 _CCAP2L = 0x00ec
0000ED 197 _CCAP3L = 0x00ed
0000F2 198 _PCA_PWM0 = 0x00f2
0000F3 199 _PCA_PWM1 = 0x00f3
0000F4 200 _PCA_PWM2 = 0x00f4
0000F5 201 _PCA_PWM3 = 0x00f5
0000C1 202 _WDT_CONTR = 0x00c1
0000C2 203 _IAP_DATA = 0x00c2
0000C3 204 _IAP_ADDRH = 0x00c3
0000C4 205 _IAP_ADDRL = 0x00c4
0000C5 206 _IAP_CMD = 0x00c5
0000C6 207 _IAP_TRIG = 0x00c6
0000C7 208 _IAP_CONTR = 0x00c7
0000F7 209 _IAP_TPS = 0x00f7
00009D 210 _IRCBAND_REG = 0x009d
0000AE 211 _TA = 0x00ae
0000E6 212 _CMPCR1 = 0x00e6
0000E7 213 _CMPCR2 = 0x00e7
214 ;--------------------------------------------------------
215 ; special function bits
216 ;--------------------------------------------------------
217 .area RSEG (ABS,DATA)
000000 218 .org 0x0000
00008D 219 _TF0 = 0x008d
00008C 220 _TR0 = 0x008c
000089 221 _IE0 = 0x0089
000088 222 _IT0 = 0x0088
00008F 223 _TF1 = 0x008f
00008E 224 _TR1 = 0x008e
000099 225 _TI = 0x0099
000098 226 _RI = 0x0098
00009C 227 _REN = 0x009c
0000AF 228 _EA = 0x00af
0000AC 229 _ES = 0x00ac
0000A9 230 _ET0 = 0x00a9
0000AB 231 _ET1 = 0x00ab
0000AD 232 _EADC = 0x00ad
233 ;--------------------------------------------------------
234 ; overlayable register banks
235 ;--------------------------------------------------------
236 .area REG_BANK_0 (REL,OVR,DATA)
000000 237 .ds 8
238 ;--------------------------------------------------------
239 ; internal ram data
240 ;--------------------------------------------------------
241 .area DSEG (DATA)
242 ;--------------------------------------------------------
243 ; overlayable items in internal ram
244 ;--------------------------------------------------------
245 .area OSEG (OVR,DATA)
246 .area OSEG (OVR,DATA)
247 ;--------------------------------------------------------
248 ; indirectly addressable internal ram data
249 ;--------------------------------------------------------
250 .area ISEG (DATA)
251 ;--------------------------------------------------------
252 ; absolute internal ram data
253 ;--------------------------------------------------------
254 .area IABS (ABS,DATA)
255 .area IABS (ABS,DATA)
256 ;--------------------------------------------------------
257 ; bit data
258 ;--------------------------------------------------------
259 .area BSEG (BIT)
260 ;--------------------------------------------------------
261 ; paged external ram data
262 ;--------------------------------------------------------
263 .area PSEG (PAG,XDATA)
264 ;--------------------------------------------------------
265 ; external ram data
266 ;--------------------------------------------------------
267 .area XSEG (XDATA)
268 ;--------------------------------------------------------
269 ; absolute external ram data
270 ;--------------------------------------------------------
271 .area XABS (ABS,XDATA)
272 ;--------------------------------------------------------
273 ; external initialized ram data
274 ;--------------------------------------------------------
275 .area XISEG (XDATA)
276 .area HOME (CODE)
277 .area GSINIT0 (CODE)
278 .area GSINIT1 (CODE)
279 .area GSINIT2 (CODE)
280 .area GSINIT3 (CODE)
281 .area GSINIT4 (CODE)
282 .area GSINIT5 (CODE)
283 .area GSINIT (CODE)
284 .area GSFINAL (CODE)
285 .area CSEG (CODE)
286 ;--------------------------------------------------------
287 ; global & static initialisations
288 ;--------------------------------------------------------
289 .area HOME (CODE)
290 .area GSINIT (CODE)
291 .area GSFINAL (CODE)
292 .area GSINIT (CODE)
293 ;--------------------------------------------------------
294 ; Home
295 ;--------------------------------------------------------
296 .area HOME (CODE)
297 .area HOME (CODE)
298 ;--------------------------------------------------------
299 ; code
300 ;--------------------------------------------------------
301 .area CSEG (CODE)
302 ;------------------------------------------------------------
303 ;Allocation info for local variables in function '_delay_loop'
304 ;------------------------------------------------------------
305 ;n Allocated to registers
306 ;------------------------------------------------------------
307 ; src/delay.c:9: static void _delay_loop(uint16_t n)
308 ; -----------------------------------------
309 ; function _delay_loop
310 ; -----------------------------------------
000000 311 __delay_loop:
000007 312 ar7 = 0x07
000006 313 ar6 = 0x06
000005 314 ar5 = 0x05
000004 315 ar4 = 0x04
000003 316 ar3 = 0x03
000002 317 ar2 = 0x02
000001 318 ar1 = 0x01
000000 319 ar0 = 0x00
000000 AE 82 [24] 320 mov r6,dpl
000002 AF 83 [24] 321 mov r7,dph
322 ; src/delay.c:11: while (n--) {
000004 323 00101$:
000004 8E 04 [24] 324 mov ar4,r6
000006 8F 05 [24] 325 mov ar5,r7
000008 1E [12] 326 dec r6
000009 BE FF 01 [24] 327 cjne r6,#0xff,00115$
00000C 1F [12] 328 dec r7
00000D 329 00115$:
00000D EC [12] 330 mov a,r4
00000E 4D [12] 331 orl a,r5
00000F 60 07 [24] 332 jz 00104$
333 ; src/delay.c:12: NOP(); NOP(); NOP(); NOP(); NOP();
000011 00 [12] 334 nop
000012 00 [12] 335 nop
000013 00 [12] 336 nop
000014 00 [12] 337 nop
000015 00 [12] 338 nop
000016 80 EC [24] 339 sjmp 00101$
000018 340 00104$:
341 ; src/delay.c:14: }
000018 22 [24] 342 ret
343 ;------------------------------------------------------------
344 ;Allocation info for local variables in function 'delay_us'
345 ;------------------------------------------------------------
346 ;us Allocated to registers
347 ;------------------------------------------------------------
348 ; src/delay.c:16: void delay_us(uint16_t us)
349 ; -----------------------------------------
350 ; function delay_us
351 ; -----------------------------------------
000019 352 _delay_us:
000019 AE 82 [24] 353 mov r6,dpl
00001B AF 83 [24] 354 mov r7,dph
355 ; src/delay.c:19: while (us--) {
00001D 356 00101$:
00001D 8E 04 [24] 357 mov ar4,r6
00001F 8F 05 [24] 358 mov ar5,r7
000021 1E [12] 359 dec r6
000022 BE FF 01 [24] 360 cjne r6,#0xff,00115$
000025 1F [12] 361 dec r7
000026 362 00115$:
000026 EC [12] 363 mov a,r4
000027 4D [12] 364 orl a,r5
000028 60 1A [24] 365 jz 00104$
366 ; src/delay.c:20: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
00002A 00 [12] 367 nop
00002B 00 [12] 368 nop
00002C 00 [12] 369 nop
00002D 00 [12] 370 nop
00002E 00 [12] 371 nop
00002F 00 [12] 372 nop
373 ; src/delay.c:21: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
000030 00 [12] 374 nop
000031 00 [12] 375 nop
000032 00 [12] 376 nop
000033 00 [12] 377 nop
000034 00 [12] 378 nop
000035 00 [12] 379 nop
380 ; src/delay.c:22: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
000036 00 [12] 381 nop
000037 00 [12] 382 nop
000038 00 [12] 383 nop
000039 00 [12] 384 nop
00003A 00 [12] 385 nop
00003B 00 [12] 386 nop
387 ; src/delay.c:23: NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
00003C 00 [12] 388 nop
00003D 00 [12] 389 nop
00003E 00 [12] 390 nop
00003F 00 [12] 391 nop
000040 00 [12] 392 nop
000041 00 [12] 393 nop
000042 80 D9 [24] 394 sjmp 00101$
000044 395 00104$:
396 ; src/delay.c:25: }
000044 22 [24] 397 ret
398 ;------------------------------------------------------------
399 ;Allocation info for local variables in function 'delay_ms'
400 ;------------------------------------------------------------
401 ;ms Allocated to registers
402 ;------------------------------------------------------------
403 ; src/delay.c:27: void delay_ms(uint16_t ms)
404 ; -----------------------------------------
405 ; function delay_ms
406 ; -----------------------------------------
000045 407 _delay_ms:
000045 AE 82 [24] 408 mov r6,dpl
000047 AF 83 [24] 409 mov r7,dph
410 ; src/delay.c:29: while (ms--) {
000049 411 00101$:
000049 8E 04 [24] 412 mov ar4,r6
00004B 8F 05 [24] 413 mov ar5,r7
00004D 1E [12] 414 dec r6
00004E BE FF 01 [24] 415 cjne r6,#0xff,00115$
000051 1F [12] 416 dec r7
000052 417 00115$:
000052 EC [12] 418 mov a,r4
000053 4D [12] 419 orl a,r5
000054 60 10 [24] 420 jz 00104$
421 ; src/delay.c:30: delay_us(1000);
000056 90 03 E8 [24] 422 mov dptr,#0x03e8
000059 C0 07 [24] 423 push ar7
00005B C0 06 [24] 424 push ar6
00005D 12r00r19 [24] 425 lcall _delay_us
000060 D0 06 [24] 426 pop ar6
000062 D0 07 [24] 427 pop ar7
000064 80 E3 [24] 428 sjmp 00101$
000066 429 00104$:
430 ; src/delay.c:32: }
000066 22 [24] 431 ret
432 .area CSEG (CODE)
433 .area CONST (CODE)
000000 434 _DEFAULT_ADDR:
000000 E7 435 .db #0xe7 ; 231
000001 E7 436 .db #0xe7 ; 231
000002 E7 437 .db #0xe7 ; 231
000003 E7 438 .db #0xe7 ; 231
000004 C2 439 .db #0xc2 ; 194
440 .area XINIT (CODE)
441 .area CABS (ABS,CODE)
AliceRX_STC/build/delay.rel
+203
View File
@@ -0,0 +1,203 @@
XH3
H 1B areas 6C global symbols
M delay
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A OSEG size 0 flags 4 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 67 flags 20 addr 0
S _delay_ms Def000045
S _delay_us Def000019
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 17
T 00 00 00 AE 82 AF 83
R 00 00 00 17
T 00 00 04
R 00 00 00 17
T 00 00 04 8E 04 8F 05 1E BE FF 01 1F
R 00 00 00 17
T 00 00 0D
R 00 00 00 17
T 00 00 0D EC 4D 60 07 00 00 00 00 00 80 EC
R 00 00 00 17
T 00 00 18
R 00 00 00 17
T 00 00 18 22
R 00 00 00 17
T 00 00 19
R 00 00 00 17
T 00 00 19 AE 82 AF 83
R 00 00 00 17
T 00 00 1D
R 00 00 00 17
T 00 00 1D 8E 04 8F 05 1E BE FF 01 1F
R 00 00 00 17
T 00 00 26
R 00 00 00 17
T 00 00 26 EC 4D 60 1A 00 00 00 00 00 00 00 00 00
R 00 00 00 17
T 00 00 33 00 00 00 00 00 00 00 00 00 00 00 00 00
R 00 00 00 17
T 00 00 40 00 00 80 D9
R 00 00 00 17
T 00 00 44
R 00 00 00 17
T 00 00 44 22
R 00 00 00 17
T 00 00 45
R 00 00 00 17
T 00 00 45 AE 82 AF 83
R 00 00 00 17
T 00 00 49
R 00 00 00 17
T 00 00 49 8E 04 8F 05 1E BE FF 01 1F
R 00 00 00 17
T 00 00 52
R 00 00 00 17
T 00 00 52 EC 4D 60 10 90 03 E8 C0 07 C0 06 12
R 00 00 00 17
T 00 00 5E 00 19 D0 06 D0 07 80 E3
R 00 00 00 17 00 03 00 17
T 00 00 66
R 00 00 00 17
T 00 00 66 22
R 00 00 00 17
T 00 00 00
R 00 00 00 18
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 18
AliceRX_STC/build/delay.sym
+553
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@@ -0,0 +1,553 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
18 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
17 __delay_loop 000000 R
17 _delay_ms 000045 GR
17 _delay_us 000019 GR
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 0 flags 0
6 OSEG size 0 flags 4
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 0 flags 40
C XABS size 0 flags 48
D XISEG size 0 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 67 flags 20
18 CONST size 5 flags 20
19 XINIT size 0 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/eeprom.asm
+752
View File
@@ -0,0 +1,752 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module eeprom
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _delay_ms
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _eeprom_write_PARM_3
.globl _eeprom_write_PARM_2
.globl _eeprom_read_PARM_3
.globl _eeprom_read_PARM_2
.globl _eeprom_init
.globl _eeprom_read
.globl _eeprom_write
.globl _eeprom_format
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_iap_write_PARM_2:
.ds 1
_eeprom_read_PARM_2:
.ds 3
_eeprom_read_PARM_3:
.ds 3
_eeprom_write_PARM_2:
.ds 1
_eeprom_write_PARM_3:
.ds 3
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'unlock_special'
;------------------------------------------------------------
; src/eeprom.c:31: static void unlock_special(void)
; -----------------------------------------
; function unlock_special
; -----------------------------------------
_unlock_special:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/eeprom.c:33: TA = 0xAA;
mov _TA,#0xaa
; src/eeprom.c:34: TA = 0x55;
mov _TA,#0x55
; src/eeprom.c:35: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'iap_idle'
;------------------------------------------------------------
; src/eeprom.c:38: static void iap_idle(void)
; -----------------------------------------
; function iap_idle
; -----------------------------------------
_iap_idle:
; src/eeprom.c:40: IAP_CONTR = 0;
mov _IAP_CONTR,#0x00
; src/eeprom.c:41: IAP_CMD = 0;
mov _IAP_CMD,#0x00
; src/eeprom.c:42: IAP_TRIG = 0;
mov _IAP_TRIG,#0x00
; src/eeprom.c:43: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'iap_read'
;------------------------------------------------------------
;addr Allocated to registers r6 r7
;val Allocated to registers r7
;------------------------------------------------------------
; src/eeprom.c:45: static uint8_t iap_read(uint16_t addr)
; -----------------------------------------
; function iap_read
; -----------------------------------------
_iap_read:
mov r6,dpl
mov r7,dph
; src/eeprom.c:48: EA = 0;
; assignBit
clr _EA
; src/eeprom.c:49: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
mov _IAP_CONTR,#0x80
; src/eeprom.c:50: IAP_CMD = 1; /* READ */
mov _IAP_CMD,#0x01
; src/eeprom.c:51: IAP_ADDRH = (uint8_t)(addr >> 8);
mov _IAP_ADDRH,r7
; src/eeprom.c:52: IAP_ADDRL = (uint8_t)(addr & 0xFF);
mov _IAP_ADDRL,r6
; src/eeprom.c:53: IAP_TRIG = 0x5A;
mov _IAP_TRIG,#0x5a
; src/eeprom.c:54: IAP_TRIG = 0xA5;
mov _IAP_TRIG,#0xa5
; src/eeprom.c:55: _nop_();
lcall __nop_
; src/eeprom.c:56: _nop_();
lcall __nop_
; src/eeprom.c:57: val = IAP_DATA;
mov r7,_IAP_DATA
; src/eeprom.c:58: iap_idle();
push ar7
lcall _iap_idle
pop ar7
; src/eeprom.c:59: EA = 1;
; assignBit
setb _EA
; src/eeprom.c:60: return val;
mov dpl,r7
; src/eeprom.c:61: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'iap_erase'
;------------------------------------------------------------
;sector_addr Allocated to registers r6 r7
;------------------------------------------------------------
; src/eeprom.c:64: static void iap_erase(uint16_t sector_addr)
; -----------------------------------------
; function iap_erase
; -----------------------------------------
_iap_erase:
mov r6,dpl
mov r7,dph
; src/eeprom.c:66: EA = 0;
; assignBit
clr _EA
; src/eeprom.c:67: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
mov _IAP_CONTR,#0x80
; src/eeprom.c:68: IAP_CMD = 3; /* ERASE */
mov _IAP_CMD,#0x03
; src/eeprom.c:69: IAP_ADDRH = (uint8_t)(sector_addr >> 8);
mov _IAP_ADDRH,r7
; src/eeprom.c:70: IAP_ADDRL = (uint8_t)(sector_addr & 0xFF);
mov _IAP_ADDRL,r6
; src/eeprom.c:71: IAP_TRIG = 0x5A;
mov _IAP_TRIG,#0x5a
; src/eeprom.c:72: IAP_TRIG = 0xA5;
mov _IAP_TRIG,#0xa5
; src/eeprom.c:74: delay_ms(10);
mov dptr,#0x000a
lcall _delay_ms
; src/eeprom.c:75: iap_idle();
lcall _iap_idle
; src/eeprom.c:76: EA = 1;
; assignBit
setb _EA
; src/eeprom.c:77: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'iap_write'
;------------------------------------------------------------
;val Allocated with name '_iap_write_PARM_2'
;addr Allocated to registers r6 r7
;------------------------------------------------------------
; src/eeprom.c:79: static void iap_write(uint16_t addr, uint8_t val)
; -----------------------------------------
; function iap_write
; -----------------------------------------
_iap_write:
mov r6,dpl
mov r7,dph
; src/eeprom.c:81: EA = 0;
; assignBit
clr _EA
; src/eeprom.c:82: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
mov _IAP_CONTR,#0x80
; src/eeprom.c:83: IAP_CMD = 2; /* WRITE */
mov _IAP_CMD,#0x02
; src/eeprom.c:84: IAP_ADDRH = (uint8_t)(addr >> 8);
mov _IAP_ADDRH,r7
; src/eeprom.c:85: IAP_ADDRL = (uint8_t)(addr & 0xFF);
mov _IAP_ADDRL,r6
; src/eeprom.c:86: IAP_DATA = val;
mov _IAP_DATA,_iap_write_PARM_2
; src/eeprom.c:87: IAP_TRIG = 0x5A;
mov _IAP_TRIG,#0x5a
; src/eeprom.c:88: IAP_TRIG = 0xA5;
mov _IAP_TRIG,#0xa5
; src/eeprom.c:89: _nop_();
lcall __nop_
; src/eeprom.c:90: _nop_();
lcall __nop_
; src/eeprom.c:91: iap_idle();
lcall _iap_idle
; src/eeprom.c:92: EA = 1;
; assignBit
setb _EA
; src/eeprom.c:93: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'eeprom_init'
;------------------------------------------------------------
;m0 Allocated to registers r7
;m1 Allocated to registers r6
;------------------------------------------------------------
; src/eeprom.c:95: uint8_t eeprom_init(void)
; -----------------------------------------
; function eeprom_init
; -----------------------------------------
_eeprom_init:
; src/eeprom.c:98: uint8_t m0 = iap_read(IAP_EEPROM_BASE);
mov dptr,#0xfc00
lcall _iap_read
mov r7,dpl
; src/eeprom.c:99: uint8_t m1 = iap_read(IAP_EEPROM_BASE + 1);
mov dptr,#0xfc01
push ar7
lcall _iap_read
mov r6,dpl
pop ar7
; src/eeprom.c:100: if (m0 == 'L' && m1 == '3') return EEPROM_OK;
cjne r7,#0x4c,00102$
cjne r6,#0x33,00102$
mov dpl,#0x00
ret
00102$:
; src/eeprom.c:101: return EEPROM_ERR;
mov dpl,#0x01
; src/eeprom.c:102: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'eeprom_read'
;------------------------------------------------------------
;ch Allocated with name '_eeprom_read_PARM_2'
;addr Allocated with name '_eeprom_read_PARM_3'
;mode Allocated to registers r5 r6 r7
;i Allocated to registers r7
;------------------------------------------------------------
; src/eeprom.c:104: uint8_t eeprom_read(uint8_t *mode, uint8_t *ch, uint8_t addr[5])
; -----------------------------------------
; function eeprom_read
; -----------------------------------------
_eeprom_read:
mov r5,dpl
mov r6,dph
mov r7,b
; src/eeprom.c:106: if (mode) *mode = iap_read(IAP_EEPROM_BASE + 4);
mov a,r5
orl a,r6
jz 00102$
mov dptr,#0xfc04
push ar7
push ar6
push ar5
lcall _iap_read
mov r4,dpl
pop ar5
pop ar6
pop ar7
mov dpl,r5
mov dph,r6
mov b,r7
mov a,r4
lcall __gptrput
00102$:
; src/eeprom.c:107: if (ch) *ch = iap_read(IAP_EEPROM_BASE + 5);
mov a,_eeprom_read_PARM_2
orl a,(_eeprom_read_PARM_2 + 1)
jz 00104$
mov r5,_eeprom_read_PARM_2
mov r6,(_eeprom_read_PARM_2 + 1)
mov r7,(_eeprom_read_PARM_2 + 2)
mov dptr,#0xfc05
push ar7
push ar6
push ar5
lcall _iap_read
mov r4,dpl
pop ar5
pop ar6
pop ar7
mov dpl,r5
mov dph,r6
mov b,r7
mov a,r4
lcall __gptrput
00104$:
; src/eeprom.c:108: if (addr) {
mov a,_eeprom_read_PARM_3
orl a,(_eeprom_read_PARM_3 + 1)
jz 00107$
; src/eeprom.c:109: for (uint8_t i = 0; i < 5; i++) {
mov r7,#0x00
00109$:
cjne r7,#0x05,00137$
00137$:
jnc 00107$
; src/eeprom.c:110: addr[i] = iap_read(IAP_EEPROM_BASE + 6 + i);
mov a,r7
add a,_eeprom_read_PARM_3
mov r4,a
clr a
addc a,(_eeprom_read_PARM_3 + 1)
mov r5,a
mov r6,(_eeprom_read_PARM_3 + 2)
mov ar2,r7
mov r3,#0x00
mov a,#0x06
add a,r2
mov r2,a
mov a,#0xfc
addc a,r3
mov r3,a
mov dpl,r2
mov dph,r3
push ar7
push ar6
push ar5
push ar4
lcall _iap_read
mov r3,dpl
pop ar4
pop ar5
pop ar6
pop ar7
mov dpl,r4
mov dph,r5
mov b,r6
mov a,r3
lcall __gptrput
; src/eeprom.c:109: for (uint8_t i = 0; i < 5; i++) {
inc r7
sjmp 00109$
00107$:
; src/eeprom.c:113: return EEPROM_OK;
mov dpl,#0x00
; src/eeprom.c:114: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'eeprom_write'
;------------------------------------------------------------
;ch Allocated with name '_eeprom_write_PARM_2'
;addr Allocated with name '_eeprom_write_PARM_3'
;mode Allocated to registers r7
;i Allocated to registers r6
;cksum Allocated to registers r7
;i Allocated to registers r6
;------------------------------------------------------------
; src/eeprom.c:116: uint8_t eeprom_write(uint8_t mode, uint8_t ch, const uint8_t addr[5])
; -----------------------------------------
; function eeprom_write
; -----------------------------------------
_eeprom_write:
mov r7,dpl
; src/eeprom.c:119: iap_erase(IAP_EEPROM_BASE);
mov dptr,#0xfc00
push ar7
lcall _iap_erase
; src/eeprom.c:122: iap_write(IAP_EEPROM_BASE + 0, 'L');
mov _iap_write_PARM_2,#0x4c
mov dptr,#0xfc00
lcall _iap_write
; src/eeprom.c:123: iap_write(IAP_EEPROM_BASE + 1, '3');
mov _iap_write_PARM_2,#0x33
mov dptr,#0xfc01
lcall _iap_write
pop ar7
; src/eeprom.c:124: iap_write(IAP_EEPROM_BASE + 4, mode);
mov _iap_write_PARM_2,r7
mov dptr,#0xfc04
push ar7
lcall _iap_write
; src/eeprom.c:125: iap_write(IAP_EEPROM_BASE + 5, ch);
mov _iap_write_PARM_2,_eeprom_write_PARM_2
mov dptr,#0xfc05
lcall _iap_write
pop ar7
; src/eeprom.c:126: for (uint8_t i = 0; i < 5; i++) {
mov r6,#0x00
00104$:
cjne r6,#0x05,00129$
00129$:
jnc 00101$
; src/eeprom.c:127: iap_write(IAP_EEPROM_BASE + 6 + i, addr[i]);
mov ar4,r6
mov r5,#0x00
mov a,#0x06
add a,r4
mov r4,a
mov a,#0xfc
addc a,r5
mov r5,a
mov a,r6
add a,_eeprom_write_PARM_3
mov r1,a
clr a
addc a,(_eeprom_write_PARM_3 + 1)
mov r2,a
mov r3,(_eeprom_write_PARM_3 + 2)
mov dpl,r1
mov dph,r2
mov b,r3
lcall __gptrget
mov _iap_write_PARM_2,a
mov dpl,r4
mov dph,r5
push ar7
push ar6
lcall _iap_write
pop ar6
pop ar7
; src/eeprom.c:126: for (uint8_t i = 0; i < 5; i++) {
inc r6
sjmp 00104$
00101$:
; src/eeprom.c:130: uint8_t cksum = mode ^ ch;
mov a,_eeprom_write_PARM_2
xrl ar7,a
; src/eeprom.c:131: for (uint8_t i = 0; i < 5; i++) cksum ^= addr[i];
mov r6,#0x00
00107$:
cjne r6,#0x05,00131$
00131$:
jnc 00102$
mov a,r6
add a,_eeprom_write_PARM_3
mov r3,a
clr a
addc a,(_eeprom_write_PARM_3 + 1)
mov r4,a
mov r5,(_eeprom_write_PARM_3 + 2)
mov dpl,r3
mov dph,r4
mov b,r5
lcall __gptrget
mov r3,a
xrl ar7,a
inc r6
sjmp 00107$
00102$:
; src/eeprom.c:132: iap_write(IAP_EEPROM_BASE + 11, cksum);
mov _iap_write_PARM_2,r7
mov dptr,#0xfc0b
lcall _iap_write
; src/eeprom.c:134: return EEPROM_OK;
mov dpl,#0x00
; src/eeprom.c:135: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'eeprom_format'
;------------------------------------------------------------
; src/eeprom.c:137: uint8_t eeprom_format(void)
; -----------------------------------------
; function eeprom_format
; -----------------------------------------
_eeprom_format:
; src/eeprom.c:139: return eeprom_write(MODE_SBUS, DEFAULT_RF_CH, DEFAULT_ADDR);
mov _eeprom_write_PARM_3,#_DEFAULT_ADDR
mov (_eeprom_write_PARM_3 + 1),#(_DEFAULT_ADDR >> 8)
mov (_eeprom_write_PARM_3 + 2),#0x80
mov _eeprom_write_PARM_2,#0x4c
mov dpl,#0x00
; src/eeprom.c:140: }
ljmp _eeprom_write
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/eeprom.lst
+752
View File
@@ -0,0 +1,752 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module eeprom
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _delay_ms
12 .globl _EADC
13 .globl _ET1
14 .globl _ET0
15 .globl _ES
16 .globl _EA
17 .globl _REN
18 .globl _RI
19 .globl _TI
20 .globl _TR1
21 .globl _TF1
22 .globl _IT0
23 .globl _IE0
24 .globl _TR0
25 .globl _TF0
26 .globl _CMPCR2
27 .globl _CMPCR1
28 .globl _TA
29 .globl _IRCBAND_REG
30 .globl _IAP_TPS
31 .globl _IAP_CONTR
32 .globl _IAP_TRIG
33 .globl _IAP_CMD
34 .globl _IAP_ADDRL
35 .globl _IAP_ADDRH
36 .globl _IAP_DATA
37 .globl _WDT_CONTR
38 .globl _PCA_PWM3
39 .globl _PCA_PWM2
40 .globl _PCA_PWM1
41 .globl _PCA_PWM0
42 .globl _CCAP3L
43 .globl _CCAP2L
44 .globl _CCAP1L
45 .globl _CCAP0L
46 .globl _CCAPM3
47 .globl _CCAPM2
48 .globl _CCAPM1
49 .globl _CCAPM0
50 .globl _CMOD
51 .globl _CCON
52 .globl _ADCTIM_X
53 .globl _ADCCFG
54 .globl _ADC_RESL
55 .globl _ADC_RES
56 .globl _ADC_CONTR
57 .globl _SPDAT
58 .globl _SPCTL
59 .globl _SPSTAT
60 .globl _IP2H
61 .globl _IP2
62 .globl _IP
63 .globl _IE2
64 .globl _IE
65 .globl _BRT
66 .globl _P_SW1
67 .globl _SADEN
68 .globl _SADDR
69 .globl _S2BUF
70 .globl _S2CON
71 .globl _SBUF
72 .globl _SCON
73 .globl _TM4PS_X
74 .globl _TM3PS_X
75 .globl _TM2PS_X
76 .globl _T4T3M
77 .globl _T4L
78 .globl _T4H
79 .globl _T3L
80 .globl _T3H
81 .globl _T2L
82 .globl _T2H
83 .globl _INTCLKO
84 .globl _AUXR
85 .globl _TH1
86 .globl _TH0
87 .globl _TL1
88 .globl _TL0
89 .globl _TMOD
90 .globl _TCON
91 .globl _P_SW2
92 .globl _P5M0
93 .globl _P5M1
94 .globl _P4M0
95 .globl _P4M1
96 .globl _P3M0
97 .globl _P3M1
98 .globl _P2M0
99 .globl _P2M1
100 .globl _P1M0
101 .globl _P1M1
102 .globl _P0M0
103 .globl _P0M1
104 .globl _PSW
105 .globl _B
106 .globl _ACC
107 .globl _PCON
108 .globl _DPH
109 .globl _DPL
110 .globl _SP
111 .globl _P5
112 .globl _P4
113 .globl _P3
114 .globl _P2
115 .globl _P1
116 .globl _P0
117 .globl _eeprom_write_PARM_3
118 .globl _eeprom_write_PARM_2
119 .globl _eeprom_read_PARM_3
120 .globl _eeprom_read_PARM_2
121 .globl _eeprom_init
122 .globl _eeprom_read
123 .globl _eeprom_write
124 .globl _eeprom_format
125 ;--------------------------------------------------------
126 ; special function registers
127 ;--------------------------------------------------------
128 .area RSEG (ABS,DATA)
000000 129 .org 0x0000
000080 130 _P0 = 0x0080
000090 131 _P1 = 0x0090
0000A0 132 _P2 = 0x00a0
0000B0 133 _P3 = 0x00b0
0000C0 134 _P4 = 0x00c0
0000C8 135 _P5 = 0x00c8
000081 136 _SP = 0x0081
000082 137 _DPL = 0x0082
000083 138 _DPH = 0x0083
000087 139 _PCON = 0x0087
0000E0 140 _ACC = 0x00e0
0000F0 141 _B = 0x00f0
0000D0 142 _PSW = 0x00d0
000093 143 _P0M1 = 0x0093
000094 144 _P0M0 = 0x0094
000091 145 _P1M1 = 0x0091
000092 146 _P1M0 = 0x0092
000095 147 _P2M1 = 0x0095
000096 148 _P2M0 = 0x0096
0000B1 149 _P3M1 = 0x00b1
0000B2 150 _P3M0 = 0x00b2
0000B3 151 _P4M1 = 0x00b3
0000B4 152 _P4M0 = 0x00b4
0000C9 153 _P5M1 = 0x00c9
0000CA 154 _P5M0 = 0x00ca
0000BA 155 _P_SW2 = 0x00ba
000088 156 _TCON = 0x0088
000089 157 _TMOD = 0x0089
00008A 158 _TL0 = 0x008a
00008B 159 _TL1 = 0x008b
00008C 160 _TH0 = 0x008c
00008D 161 _TH1 = 0x008d
00008E 162 _AUXR = 0x008e
00008F 163 _INTCLKO = 0x008f
0000D6 164 _T2H = 0x00d6
0000D7 165 _T2L = 0x00d7
0000D4 166 _T3H = 0x00d4
0000D5 167 _T3L = 0x00d5
0000D2 168 _T4H = 0x00d2
0000D3 169 _T4L = 0x00d3
0000D1 170 _T4T3M = 0x00d1
00FEA1 171 _TM2PS_X = 0xfea1
00FEA2 172 _TM3PS_X = 0xfea2
00FEA3 173 _TM4PS_X = 0xfea3
000098 174 _SCON = 0x0098
000099 175 _SBUF = 0x0099
00009A 176 _S2CON = 0x009a
00009B 177 _S2BUF = 0x009b
0000A9 178 _SADDR = 0x00a9
0000B9 179 _SADEN = 0x00b9
0000A2 180 _P_SW1 = 0x00a2
00009C 181 _BRT = 0x009c
0000A8 182 _IE = 0x00a8
0000AF 183 _IE2 = 0x00af
0000B8 184 _IP = 0x00b8
0000B6 185 _IP2 = 0x00b6
0000B7 186 _IP2H = 0x00b7
0000CD 187 _SPSTAT = 0x00cd
0000CE 188 _SPCTL = 0x00ce
0000CF 189 _SPDAT = 0x00cf
0000BC 190 _ADC_CONTR = 0x00bc
0000BD 191 _ADC_RES = 0x00bd
0000BE 192 _ADC_RESL = 0x00be
0000DE 193 _ADCCFG = 0x00de
00FEA8 194 _ADCTIM_X = 0xfea8
0000D8 195 _CCON = 0x00d8
0000D9 196 _CMOD = 0x00d9
0000DA 197 _CCAPM0 = 0x00da
0000DB 198 _CCAPM1 = 0x00db
0000DC 199 _CCAPM2 = 0x00dc
0000DD 200 _CCAPM3 = 0x00dd
0000EA 201 _CCAP0L = 0x00ea
0000EB 202 _CCAP1L = 0x00eb
0000EC 203 _CCAP2L = 0x00ec
0000ED 204 _CCAP3L = 0x00ed
0000F2 205 _PCA_PWM0 = 0x00f2
0000F3 206 _PCA_PWM1 = 0x00f3
0000F4 207 _PCA_PWM2 = 0x00f4
0000F5 208 _PCA_PWM3 = 0x00f5
0000C1 209 _WDT_CONTR = 0x00c1
0000C2 210 _IAP_DATA = 0x00c2
0000C3 211 _IAP_ADDRH = 0x00c3
0000C4 212 _IAP_ADDRL = 0x00c4
0000C5 213 _IAP_CMD = 0x00c5
0000C6 214 _IAP_TRIG = 0x00c6
0000C7 215 _IAP_CONTR = 0x00c7
0000F7 216 _IAP_TPS = 0x00f7
00009D 217 _IRCBAND_REG = 0x009d
0000AE 218 _TA = 0x00ae
0000E6 219 _CMPCR1 = 0x00e6
0000E7 220 _CMPCR2 = 0x00e7
221 ;--------------------------------------------------------
222 ; special function bits
223 ;--------------------------------------------------------
224 .area RSEG (ABS,DATA)
000000 225 .org 0x0000
00008D 226 _TF0 = 0x008d
00008C 227 _TR0 = 0x008c
000089 228 _IE0 = 0x0089
000088 229 _IT0 = 0x0088
00008F 230 _TF1 = 0x008f
00008E 231 _TR1 = 0x008e
000099 232 _TI = 0x0099
000098 233 _RI = 0x0098
00009C 234 _REN = 0x009c
0000AF 235 _EA = 0x00af
0000AC 236 _ES = 0x00ac
0000A9 237 _ET0 = 0x00a9
0000AB 238 _ET1 = 0x00ab
0000AD 239 _EADC = 0x00ad
240 ;--------------------------------------------------------
241 ; overlayable register banks
242 ;--------------------------------------------------------
243 .area REG_BANK_0 (REL,OVR,DATA)
000000 244 .ds 8
245 ;--------------------------------------------------------
246 ; internal ram data
247 ;--------------------------------------------------------
248 .area DSEG (DATA)
000000 249 _iap_write_PARM_2:
000000 250 .ds 1
000001 251 _eeprom_read_PARM_2:
000001 252 .ds 3
000004 253 _eeprom_read_PARM_3:
000004 254 .ds 3
000007 255 _eeprom_write_PARM_2:
000007 256 .ds 1
000008 257 _eeprom_write_PARM_3:
000008 258 .ds 3
259 ;--------------------------------------------------------
260 ; overlayable items in internal ram
261 ;--------------------------------------------------------
262 ;--------------------------------------------------------
263 ; indirectly addressable internal ram data
264 ;--------------------------------------------------------
265 .area ISEG (DATA)
266 ;--------------------------------------------------------
267 ; absolute internal ram data
268 ;--------------------------------------------------------
269 .area IABS (ABS,DATA)
270 .area IABS (ABS,DATA)
271 ;--------------------------------------------------------
272 ; bit data
273 ;--------------------------------------------------------
274 .area BSEG (BIT)
275 ;--------------------------------------------------------
276 ; paged external ram data
277 ;--------------------------------------------------------
278 .area PSEG (PAG,XDATA)
279 ;--------------------------------------------------------
280 ; external ram data
281 ;--------------------------------------------------------
282 .area XSEG (XDATA)
283 ;--------------------------------------------------------
284 ; absolute external ram data
285 ;--------------------------------------------------------
286 .area XABS (ABS,XDATA)
287 ;--------------------------------------------------------
288 ; external initialized ram data
289 ;--------------------------------------------------------
290 .area XISEG (XDATA)
291 .area HOME (CODE)
292 .area GSINIT0 (CODE)
293 .area GSINIT1 (CODE)
294 .area GSINIT2 (CODE)
295 .area GSINIT3 (CODE)
296 .area GSINIT4 (CODE)
297 .area GSINIT5 (CODE)
298 .area GSINIT (CODE)
299 .area GSFINAL (CODE)
300 .area CSEG (CODE)
301 ;--------------------------------------------------------
302 ; global & static initialisations
303 ;--------------------------------------------------------
304 .area HOME (CODE)
305 .area GSINIT (CODE)
306 .area GSFINAL (CODE)
307 .area GSINIT (CODE)
308 ;--------------------------------------------------------
309 ; Home
310 ;--------------------------------------------------------
311 .area HOME (CODE)
312 .area HOME (CODE)
313 ;--------------------------------------------------------
314 ; code
315 ;--------------------------------------------------------
316 .area CSEG (CODE)
317 ;------------------------------------------------------------
318 ;Allocation info for local variables in function 'unlock_special'
319 ;------------------------------------------------------------
320 ; src/eeprom.c:31: static void unlock_special(void)
321 ; -----------------------------------------
322 ; function unlock_special
323 ; -----------------------------------------
000000 324 _unlock_special:
000007 325 ar7 = 0x07
000006 326 ar6 = 0x06
000005 327 ar5 = 0x05
000004 328 ar4 = 0x04
000003 329 ar3 = 0x03
000002 330 ar2 = 0x02
000001 331 ar1 = 0x01
000000 332 ar0 = 0x00
333 ; src/eeprom.c:33: TA = 0xAA;
000000 75 AE AA [24] 334 mov _TA,#0xaa
335 ; src/eeprom.c:34: TA = 0x55;
000003 75 AE 55 [24] 336 mov _TA,#0x55
337 ; src/eeprom.c:35: }
000006 22 [24] 338 ret
339 ;------------------------------------------------------------
340 ;Allocation info for local variables in function 'iap_idle'
341 ;------------------------------------------------------------
342 ; src/eeprom.c:38: static void iap_idle(void)
343 ; -----------------------------------------
344 ; function iap_idle
345 ; -----------------------------------------
000007 346 _iap_idle:
347 ; src/eeprom.c:40: IAP_CONTR = 0;
000007 75 C7 00 [24] 348 mov _IAP_CONTR,#0x00
349 ; src/eeprom.c:41: IAP_CMD = 0;
00000A 75 C5 00 [24] 350 mov _IAP_CMD,#0x00
351 ; src/eeprom.c:42: IAP_TRIG = 0;
00000D 75 C6 00 [24] 352 mov _IAP_TRIG,#0x00
353 ; src/eeprom.c:43: }
000010 22 [24] 354 ret
355 ;------------------------------------------------------------
356 ;Allocation info for local variables in function 'iap_read'
357 ;------------------------------------------------------------
358 ;addr Allocated to registers r6 r7
359 ;val Allocated to registers r7
360 ;------------------------------------------------------------
361 ; src/eeprom.c:45: static uint8_t iap_read(uint16_t addr)
362 ; -----------------------------------------
363 ; function iap_read
364 ; -----------------------------------------
000011 365 _iap_read:
000011 AE 82 [24] 366 mov r6,dpl
000013 AF 83 [24] 367 mov r7,dph
368 ; src/eeprom.c:48: EA = 0;
369 ; assignBit
000015 C2 AF [12] 370 clr _EA
371 ; src/eeprom.c:49: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
000017 75 C7 80 [24] 372 mov _IAP_CONTR,#0x80
373 ; src/eeprom.c:50: IAP_CMD = 1; /* READ */
00001A 75 C5 01 [24] 374 mov _IAP_CMD,#0x01
375 ; src/eeprom.c:51: IAP_ADDRH = (uint8_t)(addr >> 8);
00001D 8F C3 [24] 376 mov _IAP_ADDRH,r7
377 ; src/eeprom.c:52: IAP_ADDRL = (uint8_t)(addr & 0xFF);
00001F 8E C4 [24] 378 mov _IAP_ADDRL,r6
379 ; src/eeprom.c:53: IAP_TRIG = 0x5A;
000021 75 C6 5A [24] 380 mov _IAP_TRIG,#0x5a
381 ; src/eeprom.c:54: IAP_TRIG = 0xA5;
000024 75 C6 A5 [24] 382 mov _IAP_TRIG,#0xa5
383 ; src/eeprom.c:55: _nop_();
000027 12r00r00 [24] 384 lcall __nop_
385 ; src/eeprom.c:56: _nop_();
00002A 12r00r00 [24] 386 lcall __nop_
387 ; src/eeprom.c:57: val = IAP_DATA;
00002D AF C2 [24] 388 mov r7,_IAP_DATA
389 ; src/eeprom.c:58: iap_idle();
00002F C0 07 [24] 390 push ar7
000031 12r00r07 [24] 391 lcall _iap_idle
000034 D0 07 [24] 392 pop ar7
393 ; src/eeprom.c:59: EA = 1;
394 ; assignBit
000036 D2 AF [12] 395 setb _EA
396 ; src/eeprom.c:60: return val;
000038 8F 82 [24] 397 mov dpl,r7
398 ; src/eeprom.c:61: }
00003A 22 [24] 399 ret
400 ;------------------------------------------------------------
401 ;Allocation info for local variables in function 'iap_erase'
402 ;------------------------------------------------------------
403 ;sector_addr Allocated to registers r6 r7
404 ;------------------------------------------------------------
405 ; src/eeprom.c:64: static void iap_erase(uint16_t sector_addr)
406 ; -----------------------------------------
407 ; function iap_erase
408 ; -----------------------------------------
00003B 409 _iap_erase:
00003B AE 82 [24] 410 mov r6,dpl
00003D AF 83 [24] 411 mov r7,dph
412 ; src/eeprom.c:66: EA = 0;
413 ; assignBit
00003F C2 AF [12] 414 clr _EA
415 ; src/eeprom.c:67: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
000041 75 C7 80 [24] 416 mov _IAP_CONTR,#0x80
417 ; src/eeprom.c:68: IAP_CMD = 3; /* ERASE */
000044 75 C5 03 [24] 418 mov _IAP_CMD,#0x03
419 ; src/eeprom.c:69: IAP_ADDRH = (uint8_t)(sector_addr >> 8);
000047 8F C3 [24] 420 mov _IAP_ADDRH,r7
421 ; src/eeprom.c:70: IAP_ADDRL = (uint8_t)(sector_addr & 0xFF);
000049 8E C4 [24] 422 mov _IAP_ADDRL,r6
423 ; src/eeprom.c:71: IAP_TRIG = 0x5A;
00004B 75 C6 5A [24] 424 mov _IAP_TRIG,#0x5a
425 ; src/eeprom.c:72: IAP_TRIG = 0xA5;
00004E 75 C6 A5 [24] 426 mov _IAP_TRIG,#0xa5
427 ; src/eeprom.c:74: delay_ms(10);
000051 90 00 0A [24] 428 mov dptr,#0x000a
000054 12r00r00 [24] 429 lcall _delay_ms
430 ; src/eeprom.c:75: iap_idle();
000057 12r00r07 [24] 431 lcall _iap_idle
432 ; src/eeprom.c:76: EA = 1;
433 ; assignBit
00005A D2 AF [12] 434 setb _EA
435 ; src/eeprom.c:77: }
00005C 22 [24] 436 ret
437 ;------------------------------------------------------------
438 ;Allocation info for local variables in function 'iap_write'
439 ;------------------------------------------------------------
440 ;val Allocated with name '_iap_write_PARM_2'
441 ;addr Allocated to registers r6 r7
442 ;------------------------------------------------------------
443 ; src/eeprom.c:79: static void iap_write(uint16_t addr, uint8_t val)
444 ; -----------------------------------------
445 ; function iap_write
446 ; -----------------------------------------
00005D 447 _iap_write:
00005D AE 82 [24] 448 mov r6,dpl
00005F AF 83 [24] 449 mov r7,dph
450 ; src/eeprom.c:81: EA = 0;
451 ; assignBit
000061 C2 AF [12] 452 clr _EA
453 ; src/eeprom.c:82: IAP_CONTR = IAP_EN | IAP_CMD_WAIT;
000063 75 C7 80 [24] 454 mov _IAP_CONTR,#0x80
455 ; src/eeprom.c:83: IAP_CMD = 2; /* WRITE */
000066 75 C5 02 [24] 456 mov _IAP_CMD,#0x02
457 ; src/eeprom.c:84: IAP_ADDRH = (uint8_t)(addr >> 8);
000069 8F C3 [24] 458 mov _IAP_ADDRH,r7
459 ; src/eeprom.c:85: IAP_ADDRL = (uint8_t)(addr & 0xFF);
00006B 8E C4 [24] 460 mov _IAP_ADDRL,r6
461 ; src/eeprom.c:86: IAP_DATA = val;
00006D 85*00 C2 [24] 462 mov _IAP_DATA,_iap_write_PARM_2
463 ; src/eeprom.c:87: IAP_TRIG = 0x5A;
000070 75 C6 5A [24] 464 mov _IAP_TRIG,#0x5a
465 ; src/eeprom.c:88: IAP_TRIG = 0xA5;
000073 75 C6 A5 [24] 466 mov _IAP_TRIG,#0xa5
467 ; src/eeprom.c:89: _nop_();
000076 12r00r00 [24] 468 lcall __nop_
469 ; src/eeprom.c:90: _nop_();
000079 12r00r00 [24] 470 lcall __nop_
471 ; src/eeprom.c:91: iap_idle();
00007C 12r00r07 [24] 472 lcall _iap_idle
473 ; src/eeprom.c:92: EA = 1;
474 ; assignBit
00007F D2 AF [12] 475 setb _EA
476 ; src/eeprom.c:93: }
000081 22 [24] 477 ret
478 ;------------------------------------------------------------
479 ;Allocation info for local variables in function 'eeprom_init'
480 ;------------------------------------------------------------
481 ;m0 Allocated to registers r7
482 ;m1 Allocated to registers r6
483 ;------------------------------------------------------------
484 ; src/eeprom.c:95: uint8_t eeprom_init(void)
485 ; -----------------------------------------
486 ; function eeprom_init
487 ; -----------------------------------------
000082 488 _eeprom_init:
489 ; src/eeprom.c:98: uint8_t m0 = iap_read(IAP_EEPROM_BASE);
000082 90 FC 00 [24] 490 mov dptr,#0xfc00
000085 12r00r11 [24] 491 lcall _iap_read
000088 AF 82 [24] 492 mov r7,dpl
493 ; src/eeprom.c:99: uint8_t m1 = iap_read(IAP_EEPROM_BASE + 1);
00008A 90 FC 01 [24] 494 mov dptr,#0xfc01
00008D C0 07 [24] 495 push ar7
00008F 12r00r11 [24] 496 lcall _iap_read
000092 AE 82 [24] 497 mov r6,dpl
000094 D0 07 [24] 498 pop ar7
499 ; src/eeprom.c:100: if (m0 == 'L' && m1 == '3') return EEPROM_OK;
000096 BF 4C 07 [24] 500 cjne r7,#0x4c,00102$
000099 BE 33 04 [24] 501 cjne r6,#0x33,00102$
00009C 75 82 00 [24] 502 mov dpl,#0x00
00009F 22 [24] 503 ret
0000A0 504 00102$:
505 ; src/eeprom.c:101: return EEPROM_ERR;
0000A0 75 82 01 [24] 506 mov dpl,#0x01
507 ; src/eeprom.c:102: }
0000A3 22 [24] 508 ret
509 ;------------------------------------------------------------
510 ;Allocation info for local variables in function 'eeprom_read'
511 ;------------------------------------------------------------
512 ;ch Allocated with name '_eeprom_read_PARM_2'
513 ;addr Allocated with name '_eeprom_read_PARM_3'
514 ;mode Allocated to registers r5 r6 r7
515 ;i Allocated to registers r7
516 ;------------------------------------------------------------
517 ; src/eeprom.c:104: uint8_t eeprom_read(uint8_t *mode, uint8_t *ch, uint8_t addr[5])
518 ; -----------------------------------------
519 ; function eeprom_read
520 ; -----------------------------------------
0000A4 521 _eeprom_read:
0000A4 AD 82 [24] 522 mov r5,dpl
0000A6 AE 83 [24] 523 mov r6,dph
0000A8 AF F0 [24] 524 mov r7,b
525 ; src/eeprom.c:106: if (mode) *mode = iap_read(IAP_EEPROM_BASE + 4);
0000AA ED [12] 526 mov a,r5
0000AB 4E [12] 527 orl a,r6
0000AC 60 1E [24] 528 jz 00102$
0000AE 90 FC 04 [24] 529 mov dptr,#0xfc04
0000B1 C0 07 [24] 530 push ar7
0000B3 C0 06 [24] 531 push ar6
0000B5 C0 05 [24] 532 push ar5
0000B7 12r00r11 [24] 533 lcall _iap_read
0000BA AC 82 [24] 534 mov r4,dpl
0000BC D0 05 [24] 535 pop ar5
0000BE D0 06 [24] 536 pop ar6
0000C0 D0 07 [24] 537 pop ar7
0000C2 8D 82 [24] 538 mov dpl,r5
0000C4 8E 83 [24] 539 mov dph,r6
0000C6 8F F0 [24] 540 mov b,r7
0000C8 EC [12] 541 mov a,r4
0000C9 12r00r00 [24] 542 lcall __gptrput
0000CC 543 00102$:
544 ; src/eeprom.c:107: if (ch) *ch = iap_read(IAP_EEPROM_BASE + 5);
0000CC E5*01 [12] 545 mov a,_eeprom_read_PARM_2
0000CE 45*02 [12] 546 orl a,(_eeprom_read_PARM_2 + 1)
0000D0 60 24 [24] 547 jz 00104$
0000D2 AD*01 [24] 548 mov r5,_eeprom_read_PARM_2
0000D4 AE*02 [24] 549 mov r6,(_eeprom_read_PARM_2 + 1)
0000D6 AF*03 [24] 550 mov r7,(_eeprom_read_PARM_2 + 2)
0000D8 90 FC 05 [24] 551 mov dptr,#0xfc05
0000DB C0 07 [24] 552 push ar7
0000DD C0 06 [24] 553 push ar6
0000DF C0 05 [24] 554 push ar5
0000E1 12r00r11 [24] 555 lcall _iap_read
0000E4 AC 82 [24] 556 mov r4,dpl
0000E6 D0 05 [24] 557 pop ar5
0000E8 D0 06 [24] 558 pop ar6
0000EA D0 07 [24] 559 pop ar7
0000EC 8D 82 [24] 560 mov dpl,r5
0000EE 8E 83 [24] 561 mov dph,r6
0000F0 8F F0 [24] 562 mov b,r7
0000F2 EC [12] 563 mov a,r4
0000F3 12r00r00 [24] 564 lcall __gptrput
0000F6 565 00104$:
566 ; src/eeprom.c:108: if (addr) {
0000F6 E5*04 [12] 567 mov a,_eeprom_read_PARM_3
0000F8 45*05 [12] 568 orl a,(_eeprom_read_PARM_3 + 1)
0000FA 60 43 [24] 569 jz 00107$
570 ; src/eeprom.c:109: for (uint8_t i = 0; i < 5; i++) {
0000FC 7F 00 [12] 571 mov r7,#0x00
0000FE 572 00109$:
0000FE BF 05 00 [24] 573 cjne r7,#0x05,00137$
000101 574 00137$:
000101 50 3C [24] 575 jnc 00107$
576 ; src/eeprom.c:110: addr[i] = iap_read(IAP_EEPROM_BASE + 6 + i);
000103 EF [12] 577 mov a,r7
000104 25*04 [12] 578 add a,_eeprom_read_PARM_3
000106 FC [12] 579 mov r4,a
000107 E4 [12] 580 clr a
000108 35*05 [12] 581 addc a,(_eeprom_read_PARM_3 + 1)
00010A FD [12] 582 mov r5,a
00010B AE*06 [24] 583 mov r6,(_eeprom_read_PARM_3 + 2)
00010D 8F 02 [24] 584 mov ar2,r7
00010F 7B 00 [12] 585 mov r3,#0x00
000111 74 06 [12] 586 mov a,#0x06
000113 2A [12] 587 add a,r2
000114 FA [12] 588 mov r2,a
000115 74 FC [12] 589 mov a,#0xfc
000117 3B [12] 590 addc a,r3
000118 FB [12] 591 mov r3,a
000119 8A 82 [24] 592 mov dpl,r2
00011B 8B 83 [24] 593 mov dph,r3
00011D C0 07 [24] 594 push ar7
00011F C0 06 [24] 595 push ar6
000121 C0 05 [24] 596 push ar5
000123 C0 04 [24] 597 push ar4
000125 12r00r11 [24] 598 lcall _iap_read
000128 AB 82 [24] 599 mov r3,dpl
00012A D0 04 [24] 600 pop ar4
00012C D0 05 [24] 601 pop ar5
00012E D0 06 [24] 602 pop ar6
000130 D0 07 [24] 603 pop ar7
000132 8C 82 [24] 604 mov dpl,r4
000134 8D 83 [24] 605 mov dph,r5
000136 8E F0 [24] 606 mov b,r6
000138 EB [12] 607 mov a,r3
000139 12r00r00 [24] 608 lcall __gptrput
609 ; src/eeprom.c:109: for (uint8_t i = 0; i < 5; i++) {
00013C 0F [12] 610 inc r7
00013D 80 BF [24] 611 sjmp 00109$
00013F 612 00107$:
613 ; src/eeprom.c:113: return EEPROM_OK;
00013F 75 82 00 [24] 614 mov dpl,#0x00
615 ; src/eeprom.c:114: }
000142 22 [24] 616 ret
617 ;------------------------------------------------------------
618 ;Allocation info for local variables in function 'eeprom_write'
619 ;------------------------------------------------------------
620 ;ch Allocated with name '_eeprom_write_PARM_2'
621 ;addr Allocated with name '_eeprom_write_PARM_3'
622 ;mode Allocated to registers r7
623 ;i Allocated to registers r6
624 ;cksum Allocated to registers r7
625 ;i Allocated to registers r6
626 ;------------------------------------------------------------
627 ; src/eeprom.c:116: uint8_t eeprom_write(uint8_t mode, uint8_t ch, const uint8_t addr[5])
628 ; -----------------------------------------
629 ; function eeprom_write
630 ; -----------------------------------------
000143 631 _eeprom_write:
000143 AF 82 [24] 632 mov r7,dpl
633 ; src/eeprom.c:119: iap_erase(IAP_EEPROM_BASE);
000145 90 FC 00 [24] 634 mov dptr,#0xfc00
000148 C0 07 [24] 635 push ar7
00014A 12r00r3B [24] 636 lcall _iap_erase
637 ; src/eeprom.c:122: iap_write(IAP_EEPROM_BASE + 0, 'L');
00014D 75*00 4C [24] 638 mov _iap_write_PARM_2,#0x4c
000150 90 FC 00 [24] 639 mov dptr,#0xfc00
000153 12r00r5D [24] 640 lcall _iap_write
641 ; src/eeprom.c:123: iap_write(IAP_EEPROM_BASE + 1, '3');
000156 75*00 33 [24] 642 mov _iap_write_PARM_2,#0x33
000159 90 FC 01 [24] 643 mov dptr,#0xfc01
00015C 12r00r5D [24] 644 lcall _iap_write
00015F D0 07 [24] 645 pop ar7
646 ; src/eeprom.c:124: iap_write(IAP_EEPROM_BASE + 4, mode);
000161 8F*00 [24] 647 mov _iap_write_PARM_2,r7
000163 90 FC 04 [24] 648 mov dptr,#0xfc04
000166 C0 07 [24] 649 push ar7
000168 12r00r5D [24] 650 lcall _iap_write
651 ; src/eeprom.c:125: iap_write(IAP_EEPROM_BASE + 5, ch);
00016B 85*07*00 [24] 652 mov _iap_write_PARM_2,_eeprom_write_PARM_2
00016E 90 FC 05 [24] 653 mov dptr,#0xfc05
000171 12r00r5D [24] 654 lcall _iap_write
000174 D0 07 [24] 655 pop ar7
656 ; src/eeprom.c:126: for (uint8_t i = 0; i < 5; i++) {
000176 7E 00 [12] 657 mov r6,#0x00
000178 658 00104$:
000178 BE 05 00 [24] 659 cjne r6,#0x05,00129$
00017B 660 00129$:
00017B 50 33 [24] 661 jnc 00101$
662 ; src/eeprom.c:127: iap_write(IAP_EEPROM_BASE + 6 + i, addr[i]);
00017D 8E 04 [24] 663 mov ar4,r6
00017F 7D 00 [12] 664 mov r5,#0x00
000181 74 06 [12] 665 mov a,#0x06
000183 2C [12] 666 add a,r4
000184 FC [12] 667 mov r4,a
000185 74 FC [12] 668 mov a,#0xfc
000187 3D [12] 669 addc a,r5
000188 FD [12] 670 mov r5,a
000189 EE [12] 671 mov a,r6
00018A 25*08 [12] 672 add a,_eeprom_write_PARM_3
00018C F9 [12] 673 mov r1,a
00018D E4 [12] 674 clr a
00018E 35*09 [12] 675 addc a,(_eeprom_write_PARM_3 + 1)
000190 FA [12] 676 mov r2,a
000191 AB*0A [24] 677 mov r3,(_eeprom_write_PARM_3 + 2)
000193 89 82 [24] 678 mov dpl,r1
000195 8A 83 [24] 679 mov dph,r2
000197 8B F0 [24] 680 mov b,r3
000199 12r00r00 [24] 681 lcall __gptrget
00019C F5*00 [12] 682 mov _iap_write_PARM_2,a
00019E 8C 82 [24] 683 mov dpl,r4
0001A0 8D 83 [24] 684 mov dph,r5
0001A2 C0 07 [24] 685 push ar7
0001A4 C0 06 [24] 686 push ar6
0001A6 12r00r5D [24] 687 lcall _iap_write
0001A9 D0 06 [24] 688 pop ar6
0001AB D0 07 [24] 689 pop ar7
690 ; src/eeprom.c:126: for (uint8_t i = 0; i < 5; i++) {
0001AD 0E [12] 691 inc r6
0001AE 80 C8 [24] 692 sjmp 00104$
0001B0 693 00101$:
694 ; src/eeprom.c:130: uint8_t cksum = mode ^ ch;
0001B0 E5*07 [12] 695 mov a,_eeprom_write_PARM_2
0001B2 62 07 [12] 696 xrl ar7,a
697 ; src/eeprom.c:131: for (uint8_t i = 0; i < 5; i++) cksum ^= addr[i];
0001B4 7E 00 [12] 698 mov r6,#0x00
0001B6 699 00107$:
0001B6 BE 05 00 [24] 700 cjne r6,#0x05,00131$
0001B9 701 00131$:
0001B9 50 19 [24] 702 jnc 00102$
0001BB EE [12] 703 mov a,r6
0001BC 25*08 [12] 704 add a,_eeprom_write_PARM_3
0001BE FB [12] 705 mov r3,a
0001BF E4 [12] 706 clr a
0001C0 35*09 [12] 707 addc a,(_eeprom_write_PARM_3 + 1)
0001C2 FC [12] 708 mov r4,a
0001C3 AD*0A [24] 709 mov r5,(_eeprom_write_PARM_3 + 2)
0001C5 8B 82 [24] 710 mov dpl,r3
0001C7 8C 83 [24] 711 mov dph,r4
0001C9 8D F0 [24] 712 mov b,r5
0001CB 12r00r00 [24] 713 lcall __gptrget
0001CE FB [12] 714 mov r3,a
0001CF 62 07 [12] 715 xrl ar7,a
0001D1 0E [12] 716 inc r6
0001D2 80 E2 [24] 717 sjmp 00107$
0001D4 718 00102$:
719 ; src/eeprom.c:132: iap_write(IAP_EEPROM_BASE + 11, cksum);
0001D4 8F*00 [24] 720 mov _iap_write_PARM_2,r7
0001D6 90 FC 0B [24] 721 mov dptr,#0xfc0b
0001D9 12r00r5D [24] 722 lcall _iap_write
723 ; src/eeprom.c:134: return EEPROM_OK;
0001DC 75 82 00 [24] 724 mov dpl,#0x00
725 ; src/eeprom.c:135: }
0001DF 22 [24] 726 ret
727 ;------------------------------------------------------------
728 ;Allocation info for local variables in function 'eeprom_format'
729 ;------------------------------------------------------------
730 ; src/eeprom.c:137: uint8_t eeprom_format(void)
731 ; -----------------------------------------
732 ; function eeprom_format
733 ; -----------------------------------------
0001E0 734 _eeprom_format:
735 ; src/eeprom.c:139: return eeprom_write(MODE_SBUS, DEFAULT_RF_CH, DEFAULT_ADDR);
0001E0 75*08r00 [24] 736 mov _eeprom_write_PARM_3,#_DEFAULT_ADDR
0001E3 75*09s00 [24] 737 mov (_eeprom_write_PARM_3 + 1),#(_DEFAULT_ADDR >> 8)
0001E6 75*0A 80 [24] 738 mov (_eeprom_write_PARM_3 + 2),#0x80
0001E9 75*07 4C [24] 739 mov _eeprom_write_PARM_2,#0x4c
0001EC 75 82 00 [24] 740 mov dpl,#0x00
741 ; src/eeprom.c:140: }
0001EF 02r01r43 [24] 742 ljmp _eeprom_write
743 .area CSEG (CODE)
744 .area CONST (CODE)
000000 745 _DEFAULT_ADDR:
000000 E7 746 .db #0xe7 ; 231
000001 E7 747 .db #0xe7 ; 231
000002 E7 748 .db #0xe7 ; 231
000003 E7 749 .db #0xe7 ; 231
000004 C2 750 .db #0xc2 ; 194
751 .area XINIT (CODE)
752 .area CABS (ABS,CODE)
AliceRX_STC/build/eeprom.rel
+336
View File
@@ -0,0 +1,336 @@
XH3
H 1A areas 76 global symbols
M eeprom
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S __gptrput Ref000000
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S __nop_ Ref000000
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _delay_ms Ref000000
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size B flags 0 addr 0
S _eeprom_read_PARM_2 Def000001
S _eeprom_read_PARM_3 Def000004
S _eeprom_write_PARM_2 Def000007
S _eeprom_write_PARM_3 Def000008
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 1F2 flags 20 addr 0
S _eeprom_format Def0001E0
S _eeprom_read Def0000A4
S _eeprom_write Def000143
S _eeprom_init Def000082
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 04
R 00 00 00 05
T 00 00 04
R 00 00 00 05
T 00 00 07
R 00 00 00 05
T 00 00 07
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 00
R 00 00 00 16
T 00 00 00 75 AE AA 75 AE 55 22
R 00 00 00 16
T 00 00 07
R 00 00 00 16
T 00 00 07 75 C7 00 75 C5 00 75 C6 00 22
R 00 00 00 16
T 00 00 11
R 00 00 00 16
T 00 00 11 AE 82 AF 83 C2 AF 75 C7 80 75 C5 01 8F
R 00 00 00 16
T 00 00 1E C3 8E C4 75 C6 5A 75 C6 A5 12 00 00 12
R 00 00 00 16 02 0D 00 3A
T 00 00 2B 00 00 AF C2 C0 07 12 00 07 D0 07 D2 AF
R 00 00 00 16 02 03 00 3A 00 0A 00 16
T 00 00 38 8F 82 22
R 00 00 00 16
T 00 00 3B
R 00 00 00 16
T 00 00 3B AE 82 AF 83 C2 AF 75 C7 80 75 C5 03 8F
R 00 00 00 16
T 00 00 48 C3 8E C4 75 C6 5A 75 C6 A5 90 00 0A 12
R 00 00 00 16
T 00 00 55 00 00 12 00 07 D2 AF 22
R 00 00 00 16 02 03 00 45 00 06 00 16
T 00 00 5D
R 00 00 00 16
T 00 00 5D AE 82 AF 83 C2 AF 75 C7 80 75 C5 02 8F
R 00 00 00 16
T 00 00 6A C3 8E C4 85 00 00 00 C2 75 C6 5A 75 C6
R 00 00 00 16 F1 21 07 00 05
T 00 00 75 A5 12 00 00 12 00 00 12
R 00 00 00 16 02 05 00 3A 02 08 00 3A
T 00 00 7D 00 07 D2 AF 22
R 00 00 00 16 00 03 00 16
T 00 00 82
R 00 00 00 16
T 00 00 82 90 FC 00 12 00 11 AF 82 90 FC 01 C0 07
R 00 00 00 16 00 07 00 16
T 00 00 8F 12 00 11 AE 82 D0 07 BF 4C 07 BE 33 04
R 00 00 00 16 00 04 00 16
T 00 00 9C 75 82 00 22
R 00 00 00 16
T 00 00 A0
R 00 00 00 16
T 00 00 A0 75 82 01 22
R 00 00 00 16
T 00 00 A4
R 00 00 00 16
T 00 00 A4 AD 82 AE 83 AF F0 ED 4E 60 1E 90 FC 04
R 00 00 00 16
T 00 00 B1 C0 07 C0 06 C0 05 12 00 11 AC 82 D0 05
R 00 00 00 16 00 0A 00 16
T 00 00 BE D0 06 D0 07 8D 82 8E 83 8F F0 EC 12
R 00 00 00 16
T 00 00 CA 00 00
R 00 00 00 16 02 03 00 18
T 00 00 CC
R 00 00 00 16
T 00 00 CC E5 00 00 01 45 00 00 02 60 24 AD
R 00 00 00 16 F1 21 04 00 05 F1 21 08 00 05
T 00 00 D3 00 00 01 AE 00 00 02 AF
R 00 00 00 16 F1 21 03 00 05 F1 21 07 00 05
T 00 00 D7 00 00 03 90 FC 05 C0 07 C0 06 C0 05 12
R 00 00 00 16 F1 21 03 00 05
T 00 00 E2 00 11 AC 82 D0 05 D0 06 D0 07 8D 82 8E
R 00 00 00 16 00 03 00 16
T 00 00 EF 83 8F F0 EC 12 00 00
R 00 00 00 16 02 08 00 18
T 00 00 F6
R 00 00 00 16
T 00 00 F6 E5 00 00 04 45 00 00 05 60 43 7F 00
R 00 00 00 16 F1 21 04 00 05 F1 21 08 00 05
T 00 00 FE
R 00 00 00 16
T 00 00 FE BF 05 00
R 00 00 00 16
T 00 01 01
R 00 00 00 16
T 00 01 01 50 3C EF 25 00 00 04 FC E4 35 00 00 05
R 00 00 00 16 F1 21 07 00 05 F1 21 0D 00 05
T 00 01 0A FD AE 00 00 06 8F 02 7B 00 74 06 2A FA
R 00 00 00 16 F1 21 05 00 05
T 00 01 15 74 FC 3B FB 8A 82 8B 83 C0 07 C0 06 C0
R 00 00 00 16
T 00 01 22 05 C0 04 12 00 11 AB 82 D0 04 D0 05 D0
R 00 00 00 16 00 07 00 16
T 00 01 2F 06 D0 07 8C 82 8D 83 8E F0 EB 12 00 00
R 00 00 00 16 02 0E 00 18
T 00 01 3C 0F 80 BF
R 00 00 00 16
T 00 01 3F
R 00 00 00 16
T 00 01 3F 75 82 00 22
R 00 00 00 16
T 00 01 43
R 00 00 00 16
T 00 01 43 AF 82 90 FC 00 C0 07 12 00 3B 75
R 00 00 00 16 00 0B 00 16
T 00 01 4E 00 00 00 4C 90 FC 00 12 00 5D 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 57 00 00 00 33 90 FC 01 12 00 5D D0 07 8F
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 62 00 00 00 90 FC 04 C0 07 12 00 5D 85
R 00 00 00 16 F1 21 03 00 05 00 0C 00 16
T 00 01 6C 00 00 07 00 00 00 90 FC 05 12
R 00 00 00 16 F1 21 03 00 05 F1 21 06 00 05
T 00 01 72 00 5D D0 07 7E 00
R 00 00 00 16 00 03 00 16
T 00 01 78
R 00 00 00 16
T 00 01 78 BE 05 00
R 00 00 00 16
T 00 01 7B
R 00 00 00 16
T 00 01 7B 50 33 8E 04 7D 00 74 06 2C FC 74 FC 3D
R 00 00 00 16
T 00 01 88 FD EE 25 00 00 08 F9 E4 35 00 00 09 FA
R 00 00 00 16 F1 21 06 00 05 F1 21 0C 00 05
T 00 01 91 AB 00 00 0A 89 82 8A 83 8B F0 12 00 00
R 00 00 00 16 F1 21 04 00 05 02 0E 00 65
T 00 01 9C F5 00 00 00 8C 82 8D 83 C0 07 C0 06 12
R 00 00 00 16 F1 21 04 00 05
T 00 01 A7 00 5D D0 06 D0 07 0E 80 C8
R 00 00 00 16 00 03 00 16
T 00 01 B0
R 00 00 00 16
T 00 01 B0 E5 00 00 07 62 07 7E 00
R 00 00 00 16 F1 21 04 00 05
T 00 01 B6
R 00 00 00 16
T 00 01 B6 BE 05 00
R 00 00 00 16
T 00 01 B9
R 00 00 00 16
T 00 01 B9 50 19 EE 25 00 00 08 FB E4 35 00 00 09
R 00 00 00 16 F1 21 07 00 05 F1 21 0D 00 05
T 00 01 C2 FC AD 00 00 0A 8B 82 8C 83 8D F0 12
R 00 00 00 16 F1 21 05 00 05
T 00 01 CC 00 00 FB 62 07 0E 80 E2
R 00 00 00 16 02 03 00 65
T 00 01 D4
R 00 00 00 16
T 00 01 D4 8F 00 00 00 90 FC 0B 12 00 5D 75 82 00
R 00 00 00 16 F1 21 04 00 05 00 0B 00 16
T 00 01 DF 22
R 00 00 00 16
T 00 01 E0
R 00 00 00 16
T 00 01 E0 75 00 00 08 00 00 00 75
R 00 00 00 16 F1 21 04 00 05 F1 01 07 00 17
T 00 01 E4 00 00 09 00 00 00 75
R 00 00 00 16 F1 21 03 00 05 F1 81 06 00 17
T 00 01 E7 00 00 0A 80 75 00 00 07 4C 75 82 00 02
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 01 F0 01 43
R 00 00 00 16 00 03 00 16
T 00 00 00
R 00 00 00 17
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 17
AliceRX_STC/build/eeprom.sym
+567
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@@ -0,0 +1,567 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
17 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
__gptrget ****** GX
__gptrput ****** GX
__nop_ ****** GX
_delay_ms ****** GX
16 _eeprom_format 0001E0 GR
16 _eeprom_init 000082 GR
16 _eeprom_read 0000A4 GR
5 _eeprom_read_PARM_2 000001 GR
5 _eeprom_read_PARM_3 000004 GR
16 _eeprom_write 000143 GR
5 _eeprom_write_PARM_2 000007 GR
5 _eeprom_write_PARM_3 000008 GR
16 _iap_erase 00003B R
16 _iap_idle 000007 R
16 _iap_read 000011 R
16 _iap_write 00005D R
5 _iap_write_PARM_2 000000 R
16 _unlock_special 000000 R
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size B flags 0
6 ISEG size 0 flags 0
7 IABS size 0 flags 8
8 BSEG size 0 flags 80
9 PSEG size 0 flags 50
A XSEG size 0 flags 40
B XABS size 0 flags 48
C XISEG size 0 flags 40
D HOME size 0 flags 20
E GSINIT0 size 0 flags 20
F GSINIT1 size 0 flags 20
10 GSINIT2 size 0 flags 20
11 GSINIT3 size 0 flags 20
12 GSINIT4 size 0 flags 20
13 GSINIT5 size 0 flags 20
14 GSINIT size 0 flags 20
15 GSFINAL size 0 flags 20
16 CSEG size 1F2 flags 20
17 CONST size 5 flags 20
18 XINIT size 0 flags 20
19 CABS size 0 flags 28
AliceRX_STC/build/gpio.asm
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AliceRX_STC/build/gpio.lst
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AliceRX_STC/build/gpio.rel
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XH3
H 1B areas 86 global symbols
M gpio
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _P0M0_REG Def000094
S _P0M1_REG Def000093
S _P1M0_REG Def000092
S _SPDAT Def0000CF
S _P1M1_REG Def000091
S _P2M0_REG Def000096
S _P0M0 Def000094
S _P0_REG Def000080
S _P2M1_REG Def000095
S _P3M0_REG Def0000B2
S _P0M1 Def000093
S _P1M0 Def000092
S _P1_REG Def000090
S _P3M1_REG Def0000B1
S _P4M0_REG Def0000B4
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S _P2_REG Def0000A0
S _P4M1_REG Def0000B3
S _P5M0_REG Def0000CA
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P3_REG Def0000B0
S _P5M1_REG Def0000C9
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P4_REG Def0000C0
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P5_REG Def0000C8
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 2 flags 0 addr 0
S _gpio_set_mode_PARM_2 Def000000
S _gpio_set_mode_PARM_3 Def000001
A OSEG size 2 flags 4 addr 0
S _gpio_toggle_PARM_2 Def000000
S _gpio_read_PARM_2 Def000000
S _gpio_write_PARM_2 Def000000
S _gpio_write_PARM_3 Def000001
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 3E4 flags 20 addr 0
S _gpio_read Def0002E8
S _gpio_write Def000262
S _gpio_toggle Def000395
S _gpio_set_mode Def00022E
A CONST size 0 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 01
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 17
T 00 00 00 E5 82 FF 24 FA 50 01 22
R 00 00 00 17
T 00 00 08
R 00 00 00 17
T 00 00 08 EF 2F 2F 90 00 0F 73
R 00 00 00 17 00 07 00 17
T 00 00 0F
R 00 00 00 17
T 00 00 0F 02 00 21 02 00 4A 02
R 00 00 00 17 00 04 00 17 00 07 00 17
T 00 00 16 00 73 02 00 9C 02
R 00 00 00 17 00 03 00 17 00 06 00 17
T 00 00 1C 00 C5 02 00 EE
R 00 00 00 17 00 03 00 17 00 06 00 17
T 00 00 21
R 00 00 00 17
T 00 00 21 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 2A F0 74 01 80 02
R 00 00 00 17
T 00 00 2F
R 00 00 00 17
T 00 00 2F 25 E0
R 00 00 00 17
T 00 00 31
R 00 00 00 17
T 00 00 31 D5 F0 FB 42 94 22
R 00 00 00 17
T 00 00 37
R 00 00 00 17
T 00 00 37 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 00 41
R 00 00 00 17
T 00 00 41 25 E0
R 00 00 00 17
T 00 00 43
R 00 00 00 17
T 00 00 43 D5 F0 FB F4 52 94 22
R 00 00 00 17
T 00 00 4A
R 00 00 00 17
T 00 00 4A E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 53 F0 74 01 80 02
R 00 00 00 17
T 00 00 58
R 00 00 00 17
T 00 00 58 25 E0
R 00 00 00 17
T 00 00 5A
R 00 00 00 17
T 00 00 5A D5 F0 FB 42 92 22
R 00 00 00 17
T 00 00 60
R 00 00 00 17
T 00 00 60 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 00 6A
R 00 00 00 17
T 00 00 6A 25 E0
R 00 00 00 17
T 00 00 6C
R 00 00 00 17
T 00 00 6C D5 F0 FB F4 52 92 22
R 00 00 00 17
T 00 00 73
R 00 00 00 17
T 00 00 73 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 7C F0 74 01 80 02
R 00 00 00 17
T 00 00 81
R 00 00 00 17
T 00 00 81 25 E0
R 00 00 00 17
T 00 00 83
R 00 00 00 17
T 00 00 83 D5 F0 FB 42 96 22
R 00 00 00 17
T 00 00 89
R 00 00 00 17
T 00 00 89 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 00 93
R 00 00 00 17
T 00 00 93 25 E0
R 00 00 00 17
T 00 00 95
R 00 00 00 17
T 00 00 95 D5 F0 FB F4 52 96 22
R 00 00 00 17
T 00 00 9C
R 00 00 00 17
T 00 00 9C E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 A5 F0 74 01 80 02
R 00 00 00 17
T 00 00 AA
R 00 00 00 17
T 00 00 AA 25 E0
R 00 00 00 17
T 00 00 AC
R 00 00 00 17
T 00 00 AC D5 F0 FB 42 B2 22
R 00 00 00 17
T 00 00 B2
R 00 00 00 17
T 00 00 B2 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 00 BC
R 00 00 00 17
T 00 00 BC 25 E0
R 00 00 00 17
T 00 00 BE
R 00 00 00 17
T 00 00 BE D5 F0 FB F4 52 B2 22
R 00 00 00 17
T 00 00 C5
R 00 00 00 17
T 00 00 C5 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 CE F0 74 01 80 02
R 00 00 00 17
T 00 00 D3
R 00 00 00 17
T 00 00 D3 25 E0
R 00 00 00 17
T 00 00 D5
R 00 00 00 17
T 00 00 D5 D5 F0 FB 42 B4 22
R 00 00 00 17
T 00 00 DB
R 00 00 00 17
T 00 00 DB AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 00 E5
R 00 00 00 17
T 00 00 E5 25 E0
R 00 00 00 17
T 00 00 E7
R 00 00 00 17
T 00 00 E7 D5 F0 FB F4 52 B4 22
R 00 00 00 17
T 00 00 EE
R 00 00 00 17
T 00 00 EE E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 00 F7 F0 74 01 80 02
R 00 00 00 17
T 00 00 FC
R 00 00 00 17
T 00 00 FC 25 E0
R 00 00 00 17
T 00 00 FE
R 00 00 00 17
T 00 00 FE D5 F0 FB 42 CA 22
R 00 00 00 17
T 00 01 04
R 00 00 00 17
T 00 01 04 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 0E
R 00 00 00 17
T 00 01 0E 25 E0
R 00 00 00 17
T 00 01 10
R 00 00 00 17
T 00 01 10 D5 F0 FB F4 52 CA 22
R 00 00 00 17
T 00 01 17
R 00 00 00 17
T 00 01 17 E5 82 FF 24 FA 50 01 22
R 00 00 00 17
T 00 01 1F
R 00 00 00 17
T 00 01 1F EF 2F 2F 90 01 26 73
R 00 00 00 17 00 07 00 17
T 00 01 26
R 00 00 00 17
T 00 01 26 02 01 38 02 01 61 02
R 00 00 00 17 00 04 00 17 00 07 00 17
T 00 01 2D 01 8A 02 01 B3 02
R 00 00 00 17 00 03 00 17 00 06 00 17
T 00 01 33 01 DC 02 02 05
R 00 00 00 17 00 03 00 17 00 06 00 17
T 00 01 38
R 00 00 00 17
T 00 01 38 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 01 41 F0 74 01 80 02
R 00 00 00 17
T 00 01 46
R 00 00 00 17
T 00 01 46 25 E0
R 00 00 00 17
T 00 01 48
R 00 00 00 17
T 00 01 48 D5 F0 FB 42 93 22
R 00 00 00 17
T 00 01 4E
R 00 00 00 17
T 00 01 4E AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 58
R 00 00 00 17
T 00 01 58 25 E0
R 00 00 00 17
T 00 01 5A
R 00 00 00 17
T 00 01 5A D5 F0 FB F4 52 93 22
R 00 00 00 17
T 00 01 61
R 00 00 00 17
T 00 01 61 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 01 6A F0 74 01 80 02
R 00 00 00 17
T 00 01 6F
R 00 00 00 17
T 00 01 6F 25 E0
R 00 00 00 17
T 00 01 71
R 00 00 00 17
T 00 01 71 D5 F0 FB 42 91 22
R 00 00 00 17
T 00 01 77
R 00 00 00 17
T 00 01 77 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 81
R 00 00 00 17
T 00 01 81 25 E0
R 00 00 00 17
T 00 01 83
R 00 00 00 17
T 00 01 83 D5 F0 FB F4 52 91 22
R 00 00 00 17
T 00 01 8A
R 00 00 00 17
T 00 01 8A E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 01 93 F0 74 01 80 02
R 00 00 00 17
T 00 01 98
R 00 00 00 17
T 00 01 98 25 E0
R 00 00 00 17
T 00 01 9A
R 00 00 00 17
T 00 01 9A D5 F0 FB 42 95 22
R 00 00 00 17
T 00 01 A0
R 00 00 00 17
T 00 01 A0 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 AA
R 00 00 00 17
T 00 01 AA 25 E0
R 00 00 00 17
T 00 01 AC
R 00 00 00 17
T 00 01 AC D5 F0 FB F4 52 95 22
R 00 00 00 17
T 00 01 B3
R 00 00 00 17
T 00 01 B3 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 01 BC F0 74 01 80 02
R 00 00 00 17
T 00 01 C1
R 00 00 00 17
T 00 01 C1 25 E0
R 00 00 00 17
T 00 01 C3
R 00 00 00 17
T 00 01 C3 D5 F0 FB 42 B1 22
R 00 00 00 17
T 00 01 C9
R 00 00 00 17
T 00 01 C9 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 D3
R 00 00 00 17
T 00 01 D3 25 E0
R 00 00 00 17
T 00 01 D5
R 00 00 00 17
T 00 01 D5 D5 F0 FB F4 52 B1 22
R 00 00 00 17
T 00 01 DC
R 00 00 00 17
T 00 01 DC E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 01 E5 F0 74 01 80 02
R 00 00 00 17
T 00 01 EA
R 00 00 00 17
T 00 01 EA 25 E0
R 00 00 00 17
T 00 01 EC
R 00 00 00 17
T 00 01 EC D5 F0 FB 42 B3 22
R 00 00 00 17
T 00 01 F2
R 00 00 00 17
T 00 01 F2 AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 01 FC
R 00 00 00 17
T 00 01 FC 25 E0
R 00 00 00 17
T 00 01 FE
R 00 00 00 17
T 00 01 FE D5 F0 FB F4 52 B3 22
R 00 00 00 17
T 00 02 05
R 00 00 00 17
T 00 02 05 E5 00 00 01 60 12 AF 00 00 00 8F F0 05
R 00 00 00 17 F1 21 04 00 06 F1 21 0A 00 06
T 00 02 0E F0 74 01 80 02
R 00 00 00 17
T 00 02 13
R 00 00 00 17
T 00 02 13 25 E0
R 00 00 00 17
T 00 02 15
R 00 00 00 17
T 00 02 15 D5 F0 FB 42 C9 22
R 00 00 00 17
T 00 02 1B
R 00 00 00 17
T 00 02 1B AF 00 00 00 8F F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 02 25
R 00 00 00 17
T 00 02 25 25 E0
R 00 00 00 17
T 00 02 27
R 00 00 00 17
T 00 02 27 D5 F0 FB F4 52 C9 22
R 00 00 00 17
T 00 02 2E
R 00 00 00 17
T 00 02 2E E5 82 FF 24 FA 40 06 E5 00 00 00 24 F8
R 00 00 00 17 F1 21 0B 00 05
T 00 02 39 50 01
R 00 00 00 17
T 00 02 3B
R 00 00 00 17
T 00 02 3B 22
R 00 00 00 17
T 00 02 3C
R 00 00 00 17
T 00 02 3C E5 00 00 01 54 01 F5 00 00 01 E5
R 00 00 00 17 F1 21 04 00 05 F1 21 0A 00 06
T 00 02 43 00 00 01 03 54 01 FE 85 00 00 00
R 00 00 00 17 F1 21 03 00 05 F1 21 0B 00 05
T 00 02 4A 00 00 00 8F 82 C0 07 C0 06 12 00 00 D0
R 00 00 00 17 F1 21 03 00 06 00 0D 00 17
T 00 02 55 06 D0 07 85 00 00 00 00 00 00 8E
R 00 00 00 17 F1 21 07 00 05 F1 21 0A 00 06
T 00 02 5C 00 00 01 8F 82 02 01 17
R 00 00 00 17 F1 21 03 00 06 00 09 00 17
T 00 02 62
R 00 00 00 17
T 00 02 62 AF 82 C3 74 05 9F E4 33 FE 70 06 E5
R 00 00 00 17
T 00 02 6E 00 00 00 24 F8 50 01
R 00 00 00 17 F1 21 03 00 06
T 00 02 73
R 00 00 00 17
T 00 02 73 22
R 00 00 00 17
T 00 02 74
R 00 00 00 17
T 00 02 74 AD 00 00 00 8D F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 02 7E
R 00 00 00 17
T 00 02 7E 25 E0
R 00 00 00 17
T 00 02 80
R 00 00 00 17
T 00 02 80 D5 F0 FB FD EE 60 01 22
R 00 00 00 17
T 00 02 88
R 00 00 00 17
T 00 02 88 EF 2F 90 02 8E 73
R 00 00 00 17 00 06 00 17
T 00 02 8E
R 00 00 00 17
T 00 02 8E 80 0A 80 15 80 20 80 2B 80 36 80 41
R 00 00 00 17
T 00 02 9A
R 00 00 00 17
T 00 02 9A E5 00 00 01 60 04 ED 42 80 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 A2
R 00 00 00 17
T 00 02 A2 ED F4 52 80 22
R 00 00 00 17
T 00 02 A7
R 00 00 00 17
T 00 02 A7 E5 00 00 01 60 04 ED 42 90 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 AF
R 00 00 00 17
T 00 02 AF ED F4 52 90 22
R 00 00 00 17
T 00 02 B4
R 00 00 00 17
T 00 02 B4 E5 00 00 01 60 04 ED 42 A0 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 BC
R 00 00 00 17
T 00 02 BC ED F4 52 A0 22
R 00 00 00 17
T 00 02 C1
R 00 00 00 17
T 00 02 C1 E5 00 00 01 60 04 ED 42 B0 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 C9
R 00 00 00 17
T 00 02 C9 ED F4 52 B0 22
R 00 00 00 17
T 00 02 CE
R 00 00 00 17
T 00 02 CE E5 00 00 01 60 04 ED 42 C0 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 D6
R 00 00 00 17
T 00 02 D6 ED F4 52 C0 22
R 00 00 00 17
T 00 02 DB
R 00 00 00 17
T 00 02 DB E5 00 00 01 60 04 ED 42 C8 22
R 00 00 00 17 F1 21 04 00 06
T 00 02 E3
R 00 00 00 17
T 00 02 E3 ED F4 52 C8 22
R 00 00 00 17
T 00 02 E8
R 00 00 00 17
T 00 02 E8 AF 82 C3 74 05 9F E4 33 FE 70 06 E5
R 00 00 00 17
T 00 02 F4 00 00 00 24 F8 50 04
R 00 00 00 17 F1 21 03 00 06
T 00 02 F9
R 00 00 00 17
T 00 02 F9 75 82 00 22
R 00 00 00 17
T 00 02 FD
R 00 00 00 17
T 00 02 FD AD 00 00 00 8D F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 03 07
R 00 00 00 17
T 00 03 07 25 E0
R 00 00 00 17
T 00 03 09
R 00 00 00 17
T 00 03 09 D5 F0 FB FD EE 60 03 02 03 91
R 00 00 00 17 00 0B 00 17
T 00 03 13
R 00 00 00 17
T 00 03 13 EF 2F 90 03 19 73
R 00 00 00 17 00 06 00 17
T 00 03 19
R 00 00 00 17
T 00 03 19 80 0A 80 1A 80 2A 80 3A 80 4A 80 5A
R 00 00 00 17
T 00 03 25
R 00 00 00 17
T 00 03 25 ED 55 80 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 30
R 00 00 00 17
T 00 03 30 7E 00 7F 00
R 00 00 00 17
T 00 03 34
R 00 00 00 17
T 00 03 34 8E 82 22
R 00 00 00 17
T 00 03 37
R 00 00 00 17
T 00 03 37 ED 55 90 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 42
R 00 00 00 17
T 00 03 42 7E 00 7F 00
R 00 00 00 17
T 00 03 46
R 00 00 00 17
T 00 03 46 8E 82 22
R 00 00 00 17
T 00 03 49
R 00 00 00 17
T 00 03 49 ED 55 A0 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 54
R 00 00 00 17
T 00 03 54 7E 00 7F 00
R 00 00 00 17
T 00 03 58
R 00 00 00 17
T 00 03 58 8E 82 22
R 00 00 00 17
T 00 03 5B
R 00 00 00 17
T 00 03 5B ED 55 B0 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 66
R 00 00 00 17
T 00 03 66 7E 00 7F 00
R 00 00 00 17
T 00 03 6A
R 00 00 00 17
T 00 03 6A 8E 82 22
R 00 00 00 17
T 00 03 6D
R 00 00 00 17
T 00 03 6D ED 55 C0 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 78
R 00 00 00 17
T 00 03 78 7E 00 7F 00
R 00 00 00 17
T 00 03 7C
R 00 00 00 17
T 00 03 7C 8E 82 22
R 00 00 00 17
T 00 03 7F
R 00 00 00 17
T 00 03 7F ED 55 C8 60 06 7E 01 7F 00 80 04
R 00 00 00 17
T 00 03 8A
R 00 00 00 17
T 00 03 8A 7E 00 7F 00
R 00 00 00 17
T 00 03 8E
R 00 00 00 17
T 00 03 8E 8E 82 22
R 00 00 00 17
T 00 03 91
R 00 00 00 17
T 00 03 91 75 82 00 22
R 00 00 00 17
T 00 03 95
R 00 00 00 17
T 00 03 95 AF 82 C3 74 05 9F E4 33 FE 70 06 E5
R 00 00 00 17
T 00 03 A1 00 00 00 24 F8 50 01
R 00 00 00 17 F1 21 03 00 06
T 00 03 A6
R 00 00 00 17
T 00 03 A6 22
R 00 00 00 17
T 00 03 A7
R 00 00 00 17
T 00 03 A7 AD 00 00 00 8D F0 05 F0 74 01 80 02
R 00 00 00 17 F1 21 04 00 06
T 00 03 B1
R 00 00 00 17
T 00 03 B1 25 E0
R 00 00 00 17
T 00 03 B3
R 00 00 00 17
T 00 03 B3 D5 F0 FB FD EE 70 29 EF 2F 90 03 C0 73
R 00 00 00 17 00 0D 00 17
T 00 03 C0
R 00 00 00 17
T 00 03 C0 80 0A 80 0C 80 0E 80 10 80 12 80 14
R 00 00 00 17
T 00 03 CC
R 00 00 00 17
T 00 03 CC ED 62 80 22
R 00 00 00 17
T 00 03 D0
R 00 00 00 17
T 00 03 D0 ED 62 90 22
R 00 00 00 17
T 00 03 D4
R 00 00 00 17
T 00 03 D4 ED 62 A0 22
R 00 00 00 17
T 00 03 D8
R 00 00 00 17
T 00 03 D8 ED 62 B0 22
R 00 00 00 17
T 00 03 DC
R 00 00 00 17
T 00 03 DC ED 62 C0 22
R 00 00 00 17
T 00 03 E0
R 00 00 00 17
T 00 03 E0 ED 62 C8
R 00 00 00 17
T 00 03 E3
R 00 00 00 17
T 00 03 E3 22
R 00 00 00 17
AliceRX_STC/build/gpio.sym
+588
View File
@@ -0,0 +1,588 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
_IP = 0000B8 G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M0_REG = 000094 G
_P0M1 = 000093 G
_P0M1_REG = 000093 G
_P0_REG = 000080 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M0_REG = 000092 G
_P1M1 = 000091 G
_P1M1_REG = 000091 G
_P1_REG = 000090 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M0_REG = 000096 G
_P2M1 = 000095 G
_P2M1_REG = 000095 G
_P2_REG = 0000A0 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M0_REG = 0000B2 G
_P3M1 = 0000B1 G
_P3M1_REG = 0000B1 G
_P3_REG = 0000B0 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M0_REG = 0000B4 G
_P4M1 = 0000B3 G
_P4M1_REG = 0000B3 G
_P4_REG = 0000C0 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M0_REG = 0000CA G
_P5M1 = 0000C9 G
_P5M1_REG = 0000C9 G
_P5_REG = 0000C8 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
17 _gpio_read 0002E8 GR
6 _gpio_read_PARM_2 000000 GR
17 _gpio_set_mode 00022E GR
5 _gpio_set_mode_PARM_2 000000 GR
5 _gpio_set_mode_PARM_3 000001 GR
17 _gpio_toggle 000395 GR
6 _gpio_toggle_PARM_2 000000 GR
17 _gpio_write 000262 GR
6 _gpio_write_PARM_2 000000 GR
6 _gpio_write_PARM_3 000001 GR
17 _set_m0 000000 R
6 _set_m0_PARM_2 000000 R
6 _set_m0_PARM_3 000001 R
17 _set_m1 000117 R
6 _set_m1_PARM_2 000000 R
6 _set_m1_PARM_3 000001 R
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 2 flags 0
6 OSEG size 2 flags 4
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 0 flags 40
C XABS size 0 flags 48
D XISEG size 0 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 3E4 flags 20
18 CONST size 0 flags 20
19 XINIT size 0 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/intrinsics_shim.asm
+112
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@@ -0,0 +1,112 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module intrinsics_shim
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl __nop_
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function '_nop_'
;------------------------------------------------------------
; src/intrinsics_shim.c:9: void _nop_(void)
; -----------------------------------------
; function _nop_
; -----------------------------------------
__nop_:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/intrinsics_shim.c:13: __endasm;
nop
; src/intrinsics_shim.c:14: }
ret
.area CSEG (CODE)
.area CONST (CODE)
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/intrinsics_shim.lst
+112
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@@ -0,0 +1,112 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module intrinsics_shim
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl __nop_
12 ;--------------------------------------------------------
13 ; special function registers
14 ;--------------------------------------------------------
15 .area RSEG (ABS,DATA)
000000 16 .org 0x0000
17 ;--------------------------------------------------------
18 ; special function bits
19 ;--------------------------------------------------------
20 .area RSEG (ABS,DATA)
000000 21 .org 0x0000
22 ;--------------------------------------------------------
23 ; overlayable register banks
24 ;--------------------------------------------------------
25 .area REG_BANK_0 (REL,OVR,DATA)
000000 26 .ds 8
27 ;--------------------------------------------------------
28 ; internal ram data
29 ;--------------------------------------------------------
30 .area DSEG (DATA)
31 ;--------------------------------------------------------
32 ; overlayable items in internal ram
33 ;--------------------------------------------------------
34 ;--------------------------------------------------------
35 ; indirectly addressable internal ram data
36 ;--------------------------------------------------------
37 .area ISEG (DATA)
38 ;--------------------------------------------------------
39 ; absolute internal ram data
40 ;--------------------------------------------------------
41 .area IABS (ABS,DATA)
42 .area IABS (ABS,DATA)
43 ;--------------------------------------------------------
44 ; bit data
45 ;--------------------------------------------------------
46 .area BSEG (BIT)
47 ;--------------------------------------------------------
48 ; paged external ram data
49 ;--------------------------------------------------------
50 .area PSEG (PAG,XDATA)
51 ;--------------------------------------------------------
52 ; external ram data
53 ;--------------------------------------------------------
54 .area XSEG (XDATA)
55 ;--------------------------------------------------------
56 ; absolute external ram data
57 ;--------------------------------------------------------
58 .area XABS (ABS,XDATA)
59 ;--------------------------------------------------------
60 ; external initialized ram data
61 ;--------------------------------------------------------
62 .area XISEG (XDATA)
63 .area HOME (CODE)
64 .area GSINIT0 (CODE)
65 .area GSINIT1 (CODE)
66 .area GSINIT2 (CODE)
67 .area GSINIT3 (CODE)
68 .area GSINIT4 (CODE)
69 .area GSINIT5 (CODE)
70 .area GSINIT (CODE)
71 .area GSFINAL (CODE)
72 .area CSEG (CODE)
73 ;--------------------------------------------------------
74 ; global & static initialisations
75 ;--------------------------------------------------------
76 .area HOME (CODE)
77 .area GSINIT (CODE)
78 .area GSFINAL (CODE)
79 .area GSINIT (CODE)
80 ;--------------------------------------------------------
81 ; Home
82 ;--------------------------------------------------------
83 .area HOME (CODE)
84 .area HOME (CODE)
85 ;--------------------------------------------------------
86 ; code
87 ;--------------------------------------------------------
88 .area CSEG (CODE)
89 ;------------------------------------------------------------
90 ;Allocation info for local variables in function '_nop_'
91 ;------------------------------------------------------------
92 ; src/intrinsics_shim.c:9: void _nop_(void)
93 ; -----------------------------------------
94 ; function _nop_
95 ; -----------------------------------------
000000 96 __nop_:
000007 97 ar7 = 0x07
000006 98 ar6 = 0x06
000005 99 ar5 = 0x05
000004 100 ar4 = 0x04
000003 101 ar3 = 0x03
000002 102 ar2 = 0x02
000001 103 ar1 = 0x01
000000 104 ar0 = 0x00
105 ; src/intrinsics_shim.c:13: __endasm;
000000 00 [12] 106 nop
107 ; src/intrinsics_shim.c:14: }
000001 22 [24] 108 ret
109 .area CSEG (CODE)
110 .area CONST (CODE)
111 .area XINIT (CODE)
112 .area CABS (ABS,CODE)
AliceRX_STC/build/intrinsics_shim.rel
+42
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@@ -0,0 +1,42 @@
XH3
H 1A areas 2 global symbols
M intrinsics_shim
O -mmcs51 --model-small
S .__.ABS. Def000000
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 2 flags 20 addr 0
S __nop_ Def000000
A CONST size 0 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 16
T 00 00 00 00 22
R 00 00 00 16
AliceRX_STC/build/intrinsics_shim.sym
+434
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
16 __nop_ 000000 GR
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 0 flags 0
6 ISEG size 0 flags 0
7 IABS size 0 flags 8
8 BSEG size 0 flags 80
9 PSEG size 0 flags 50
A XSEG size 0 flags 40
B XABS size 0 flags 48
C XISEG size 0 flags 40
D HOME size 0 flags 20
E GSINIT0 size 0 flags 20
F GSINIT1 size 0 flags 20
10 GSINIT2 size 0 flags 20
11 GSINIT3 size 0 flags 20
12 GSINIT4 size 0 flags 20
13 GSINIT5 size 0 flags 20
14 GSINIT size 0 flags 20
15 GSFINAL size 0 flags 20
16 CSEG size 2 flags 20
17 CONST size 0 flags 20
18 XINIT size 0 flags 20
19 CABS size 0 flags 28
AliceRX_STC/build/main.asm
+1083
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File diff suppressed because it is too large Load Diff
AliceRX_STC/build/main.lst
+1085
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AliceRX_STC/build/main.rel
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@@ -0,0 +1,635 @@
XH3
H 1C areas 93 global symbols
M main
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _nrf24_set_rx_mode Ref000000
S _model_init Ref000000
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _pwm_init Ref000000
S __mcs51_genRAMCLEAR Ref000000
S _BRT Def00009C
S _sbus_unpack_channels_PARM_2 Ref000000
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S __mcs51_genXINIT Ref000000
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _pwm_set_from_sbus Ref000000
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _model_get_mode Ref000000
S __gptrput Ref000000
S _battery_read_mv Ref000000
S _gpio_write Ref000000
S _PSW Def0000D0
S _adc_init Ref000000
S _SPDAT Def0000CF
S _uart1_send_bytes Ref000000
S _P0M0 Def000094
S _gpio_set_mode_PARM_2 Ref000000
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _gpio_set_mode_PARM_3 Ref000000
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S _pwm_set Ref000000
S _nrf24_init Ref000000
S _sbus_make_uart_frame Ref000000
S .__.ABS. Def000000
S __mcs51_genXRAMCLEAR Ref000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _uart1_init Ref000000
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _nrf24_check Ref000000
S _sbus_unpack_channels Ref000000
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _cmd_poll Ref000000
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _nrf24_write_ack_payload Ref000000
S _pwm_set_from_sbus_PARM_2 Ref000000
S _T2H Def0000D6
S _IE Def0000A8
S _delay_ms Ref000000
S _g_nrf_status Ref000000
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _gpio_write_PARM_2 Ref000000
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _nrf24_data_ready Ref000000
S _gpio_write_PARM_3 Ref000000
S _PCA_PWM3 Def0000F5
S __sdcc_gsinit_startup Ref000000
S _RI Def000098
S _uart1_send_bytes_PARM_2 Ref000000
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _gpio_set_mode Ref000000
S _pwm_set_PARM_2 Ref000000
S _sbus_make_uart_frame_PARM_2 Ref000000
S _SPSTAT Def0000CD
S _spi_init Ref000000
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A BIT_BANK size 1 flags 4 addr 0
A DSEG size 1F flags 0 addr 0
A SSEG size 1 flags 0 addr 0
S __start__stack Def000000
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 20 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 5 flags 40 addr 0
A HOME size E1 flags 20 addr 0
S __sdcc_program_startup Def0000DE
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size B flags 20 addr 0
A GSFINAL size 3 flags 20 addr 0
A CSEG size 348 flags 20 addr 0
S _main Def0002D3
S _ms_tick_isr Def000220
A CONST size 2F flags 20 addr 0
A XINIT size 5 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 19
R 00 00 00 06
T 00 00 19
R 00 00 00 06
T 00 00 1B
R 00 00 00 06
T 00 00 1B
R 00 00 00 06
T 00 00 1C
R 00 00 00 06
T 00 00 1C
R 00 00 00 06
T 00 00 1E
R 00 00 00 06
T 00 00 1E
R 00 00 00 06
T 00 00 00
R 00 00 00 07
T 00 00 00
R 00 00 00 07
T 00 00 00
R 00 00 00 0C
T 00 00 00
R 00 00 00 0C
T 00 00 00
R 00 00 00 0E
T 00 00 00
R 00 00 00 0E
T 00 00 01
R 00 00 00 0E
T 00 00 01
R 00 00 00 0E
T 00 00 02
R 00 00 00 0E
T 00 00 02
R 00 00 00 0E
T 00 00 04
R 00 00 00 0E
T 00 00 04
R 00 00 00 0E
T 00 00 00
R 00 00 00 0F
T 00 00 00 02 00 00 32
R 00 00 00 0F 02 04 00 7F
T 00 00 04
R 00 00 00 0F
T 00 00 0B 32
R 00 00 00 0F
T 00 00 0C
R 00 00 00 0F
T 00 00 13 32
R 00 00 00 0F
T 00 00 14
R 00 00 00 0F
T 00 00 1B 32
R 00 00 00 0F
T 00 00 1C
R 00 00 00 0F
T 00 00 23 32
R 00 00 00 0F
T 00 00 24
R 00 00 00 0F
T 00 00 2B 32
R 00 00 00 0F
T 00 00 2C
R 00 00 00 0F
T 00 00 33 32
R 00 00 00 0F
T 00 00 34
R 00 00 00 0F
T 00 00 3B 32
R 00 00 00 0F
T 00 00 3C
R 00 00 00 0F
T 00 00 43 32
R 00 00 00 0F
T 00 00 44
R 00 00 00 0F
T 00 00 4B 32
R 00 00 00 0F
T 00 00 4C
R 00 00 00 0F
T 00 00 53 32
R 00 00 00 0F
T 00 00 54
R 00 00 00 0F
T 00 00 5B 32
R 00 00 00 0F
T 00 00 5C
R 00 00 00 0F
T 00 00 63 32
R 00 00 00 0F
T 00 00 64
R 00 00 00 0F
T 00 00 6B 32
R 00 00 00 0F
T 00 00 6C
R 00 00 00 0F
T 00 00 73 32
R 00 00 00 0F
T 00 00 74
R 00 00 00 0F
T 00 00 7B 32
R 00 00 00 0F
T 00 00 7C
R 00 00 00 0F
T 00 00 83 32
R 00 00 00 0F
T 00 00 84
R 00 00 00 0F
T 00 00 8B 32
R 00 00 00 0F
T 00 00 8C
R 00 00 00 0F
T 00 00 93 32
R 00 00 00 0F
T 00 00 94
R 00 00 00 0F
T 00 00 9B 32
R 00 00 00 0F
T 00 00 9C
R 00 00 00 0F
T 00 00 A3 32
R 00 00 00 0F
T 00 00 A4
R 00 00 00 0F
T 00 00 AB 32
R 00 00 00 0F
T 00 00 AC
R 00 00 00 0F
T 00 00 B3 32
R 00 00 00 0F
T 00 00 B4
R 00 00 00 0F
T 00 00 BB 32
R 00 00 00 0F
T 00 00 BC
R 00 00 00 0F
T 00 00 C3 32
R 00 00 00 0F
T 00 00 C4
R 00 00 00 0F
T 00 00 CB 32
R 00 00 00 0F
T 00 00 CC
R 00 00 00 0F
T 00 00 D3 32
R 00 00 00 0F
T 00 00 D4
R 00 00 00 0F
T 00 00 DB 02 02 20
R 00 00 00 0F 00 04 00 18
T 00 00 00 75 00 00 1E 00 75 00 00 1B 00 E4 F5
R 00 00 00 16 F1 21 04 00 06 F1 21 09 00 06
T 00 00 08 00 00 1C F5 00 00 1D
R 00 00 00 16 F1 21 03 00 06 F1 21 07 00 06
T 00 00 00 02 00 DE
R 00 00 00 17 00 04 00 0F
T 00 00 DE
R 00 00 00 0F
T 00 00 DE 02 02 D3
R 00 00 00 0F 00 04 00 18
T 00 00 00
R 00 00 00 18
T 00 00 00 43 BA 80 90 FE 00 E4 F0 90 FE 01 F0 53
R 00 00 00 18
T 00 00 0D BA 7F 75 9D 02 22
R 00 00 00 18
T 00 00 13
R 00 00 00 18
T 00 00 13 75 00 00 00 02 75 00 00 00 01 75 82 03
R 00 00 00 18 F1 23 04 00 28 F1 23 09 00 2C
T 00 00 1C 12 00 00 75 00 00 00 02 75
R 00 00 00 18 02 04 00 88 F1 23 07 00 79
T 00 00 23 00 00 00 00 75 82 03 02 00 00
R 00 00 00 18 F1 23 03 00 7D 02 0B 00 22
T 00 00 2B
R 00 00 00 18
T 00 00 2B 90 00 02 E0 24 01 F0 A3 E0 34 00 F0 90
R 00 00 00 18 00 04 00 0E
T 00 00 38 00 02 E0 FE A3 E0 FF C3 EE 94 64 EF 94
R 00 00 00 18 00 03 00 0E
T 00 00 45 00 40 1E 90 00 02 E4 F0 A3 F0 90 00 04
R 00 00 00 18 00 07 00 0E 00 0E 00 0E
T 00 00 52 E0 63 E0 01 F0 90 00 04 E0 F5 00 00 00
R 00 00 00 18 00 09 00 0E F1 23 0D 00 7D
T 00 00 5D 75 00 00 00 02 75 82 03 02 00 00
R 00 00 00 18 F1 23 04 00 79 02 0C 00 22
T 00 00 66
R 00 00 00 18
T 00 00 66 22
R 00 00 00 18
T 00 00 67
R 00 00 00 18
T 00 00 67 AD 82 AE 83 AF F0 C0 07 C0 06 C0 05 12
R 00 00 00 18
T 00 00 74 00 00 AC 82 D0 05 D0 06 D0 07 BC 01 02
R 00 00 00 18 02 03 00 1F
T 00 00 81 80 03
R 00 00 00 18
T 00 00 83
R 00 00 00 18
T 00 00 83 02 01 21
R 00 00 00 18 00 04 00 18
T 00 00 86
R 00 00 00 18
T 00 00 86 8D 82 8E 83 8F F0 12 00 00 F5 00 00 00
R 00 00 00 18 02 0A 00 82 F1 23 0D 00 59
T 00 00 91 A3 12 00 00 F5 00 00 01 75 82 00 C0 07
R 00 00 00 18 02 05 00 82 F1 23 08 00 59
T 00 00 9C C0 06 C0 05 12 00 00 D0 05 D0 06 D0 07
R 00 00 00 18 02 08 00 15
T 00 00 A9 74 02 2D F9 E4 3E FA 8F 03 89 82 8A 83
R 00 00 00 18
T 00 00 B6 8B F0 12 00 00 F5 00 00 00 A3 12
R 00 00 00 18 02 06 00 82 F1 23 09 00 59
T 00 00 BF 00 00 F5 00 00 01 75 82 01 C0 07 C0 06
R 00 00 00 18 02 03 00 82 F1 23 06 00 59
T 00 00 CA C0 05 12 00 00 D0 05 D0 06 D0 07 74 04
R 00 00 00 18 02 06 00 15
T 00 00 D7 2D F9 E4 3E FA 8F 03 89 82 8A 83 8B F0
R 00 00 00 18
T 00 00 E4 12 00 00 F5 00 00 00 A3 12
R 00 00 00 18 02 04 00 82 F1 23 07 00 59
T 00 00 EB 00 00 F5 00 00 01 75 82 02 C0 07 C0 06
R 00 00 00 18 02 03 00 82 F1 23 06 00 59
T 00 00 F6 C0 05 12 00 00 D0 05 D0 06 D0 07 74 06
R 00 00 00 18 02 06 00 15
T 00 01 03 2D F9 E4 3E FA 8F 03 89 82 8A 83 8B F0
R 00 00 00 18
T 00 01 10 12 00 00 F5 00 00 00 A3 12
R 00 00 00 18 02 04 00 82 F1 23 07 00 59
T 00 01 17 00 00 F5 00 00 01 75 82 03 02
R 00 00 00 18 02 03 00 82 F1 23 06 00 59
T 00 01 1F 00 00
R 00 00 00 18 02 03 00 15
T 00 01 21
R 00 00 00 18
T 00 01 21 EC 70 1D 75 00 00 00 00 00 00 F5
R 00 00 00 18 F1 23 07 00 8A F1 01 0A 00 06
T 00 01 28 00 00 01 75 00 00 02 40 8D 82 8E 83 8F
R 00 00 00 18 F1 23 03 00 8A F1 23 07 00 8A
T 00 01 31 F0 12 00 00 75 00 00 00 19 90
R 00 00 00 18 02 05 00 32 F1 23 08 00 81
T 00 01 39 00 00 75 F0 40 02 00 00
R 00 00 00 18 00 03 00 06 02 09 00 26
T 00 01 41
R 00 00 00 18
T 00 01 41 22
R 00 00 00 18
T 00 01 42
R 00 00 00 18
T 00 01 42 AD 82 AE 83 AF F0 C0 07 C0 06 C0 05 12
R 00 00 00 18
T 00 01 4F 00 00 85 82 00 00 19 85 83
R 00 00 00 18 02 03 00 21 F1 21 07 00 06
T 00 01 56 00 00 1A D0 05 D0 06 D0 07 8D 82 8E 83
R 00 00 00 18 F1 21 03 00 06
T 00 01 61 8F F0 74 B0 12 00 00 74 01 2D F8 E4 3E
R 00 00 00 18 02 08 00 20
T 00 01 6E F9 8F 02 90 00 00 E0 88 82 89 83 8A F0
R 00 00 00 18 00 07 00 0E
T 00 01 7B 12 00 00 74 02 2D FA E4 3E FB 8F 04 A9
R 00 00 00 18 02 04 00 20
T 00 01 88 00 00 1A 8A 82 8B 83 8C F0 E9 12 00 00
R 00 00 00 18 F1 21 03 00 06 02 0E 00 20
T 00 01 93 74 03 2D FA E4 3E FB 8F 04 A9 00 00 19
R 00 00 00 18 F1 21 0D 00 06
T 00 01 9E 8A 82 8B 83 8C F0 E9 12 00 00 74 04 2D
R 00 00 00 18 02 0B 00 20
T 00 01 AB FA E4 3E FB 8F 04 8A 82 8B 83 8C F0 E4
R 00 00 00 18
T 00 01 B8 12 00 00 7C 05
R 00 00 00 18 02 04 00 20
T 00 01 BD
R 00 00 00 18
T 00 01 BD BC 20 00
R 00 00 00 18
T 00 01 C0
R 00 00 00 18
T 00 01 C0 50 15 EC 2D F9 E4 3E FA 8F 03 89 82 8A
R 00 00 00 18
T 00 01 CD 83 8B F0 E4 12 00 00 0C 80 E6
R 00 00 00 18 02 08 00 20
T 00 01 D7
R 00 00 00 18
T 00 01 D7 22
R 00 00 00 18
T 00 01 D8
R 00 00 00 18
T 00 01 D8 90 00 04 E0 FF BF A0 3F 90 00 05 75 F0
R 00 00 00 18 02 04 00 5D 02 0C 00 5D
T 00 01 E5 00 12 00 00 90 00 00 F0 75
R 00 00 00 18 02 05 00 82 00 08 00 0E
T 00 01 EE 00 00 00 00 00 00 75
R 00 00 00 18 F1 23 03 00 0D F1 01 06 00 0C
T 00 01 F1 00 00 01 00 00 00 75
R 00 00 00 18 F1 23 03 00 0D F1 81 06 00 0C
T 00 01 F4 00 00 02 00 90 00 08 75 F0 00 12
R 00 00 00 18 F1 23 03 00 0D 02 08 00 5D
T 00 01 FD 00 00 90 00 01 E4 F0 90
R 00 00 00 18 02 03 00 4B 00 06 00 0E
T 00 02 05 00 00 75 F0 00 12 00 67 90
R 00 00 00 18 00 03 00 0C 00 09 00 18
T 00 02 0E 00 04 75 F0 00 12 01 42 90
R 00 00 00 18 02 03 00 5D 00 09 00 18
T 00 02 17 00 04 75 F0 00 02 00 00
R 00 00 00 18 02 03 00 5D 02 09 00 58
T 00 02 1F
R 00 00 00 18
T 00 02 1F 22
R 00 00 00 18
T 00 02 20
R 00 00 00 18
T 00 02 20 C0 00 00 00 C0 E0 C0 F0 C0 82 C0 83 C0
R 00 00 00 18 F1 21 04 00 05
T 00 02 2B 07 C0 06 C0 05 C0 04 C0 03 C0 02 C0 01
R 00 00 00 18
T 00 02 38 C0 00 C0 D0 75 D0 00 AE 00 00 1C AF
R 00 00 00 18 F1 21 0B 00 06
T 00 02 42 00 00 1D 74 01 2E F5 00 00 1C E4 3F F5
R 00 00 00 18 F1 21 03 00 06 F1 21 0A 00 06
T 00 02 4B 00 00 1D 90 00 01 E0 FF B5
R 00 00 00 18 F1 21 03 00 06 02 07 00 5D
T 00 02 52 00 00 1E 02 80 0D
R 00 00 00 18 F1 21 03 00 06
T 00 02 56
R 00 00 00 18
T 00 02 56 90 00 01 E4 F0 90 00 01 E0 F5
R 00 00 00 18 00 04 00 0E 02 09 00 5D
T 00 02 60 00 00 1E 80 06
R 00 00 00 18 F1 21 03 00 06
T 00 02 63
R 00 00 00 18
T 00 02 63 90 00 01 74 01 F0
R 00 00 00 18 00 04 00 0E
T 00 02 69
R 00 00 00 18
T 00 02 69 12 00 2B 90 00 01 E0 60 30 75
R 00 00 00 18 00 04 00 18 00 07 00 0E
T 00 02 73 00 00 00 DC 75 00 00 01 05 75 82 00 12
R 00 00 00 18 F1 23 03 00 89 F1 23 08 00 89
T 00 02 7C 00 00 75 00 00 00 DC 75
R 00 00 00 18 02 03 00 30 F1 23 06 00 89
T 00 02 82 00 00 01 05 75 82 01 12 00 00 75
R 00 00 00 18 F1 23 03 00 89 02 0B 00 30
T 00 02 8B 00 00 00 DC 75 00 00 01 05 75 82 02 12
R 00 00 00 18 F1 23 03 00 89 F1 23 08 00 89
T 00 02 94 00 00 75 00 00 00 DC 75
R 00 00 00 18 02 03 00 30 F1 23 06 00 89
T 00 02 9A 00 00 01 05 75 82 03 12 00 00
R 00 00 00 18 F1 23 03 00 89 02 0B 00 30
T 00 02 A2
R 00 00 00 18
T 00 02 A2 D0 D0 D0 00 D0 01 D0 02 D0 03 D0 04 D0
R 00 00 00 18
T 00 02 AF 05 D0 06 D0 07 D0 83 D0 82 D0 F0 D0 E0
R 00 00 00 18
T 00 02 BC D0 00 00 00 32
R 00 00 00 18 F1 21 04 00 05
T 00 02 BF
R 00 00 00 18
T 00 02 BF 53 89 0F 85 89 89 53 8E BF 75 8B C0 75
R 00 00 00 18
T 00 02 CC 8D 63 D2 AB D2 8E 22
R 00 00 00 18
T 00 02 D3
R 00 00 00 18
T 00 02 D3 12 00 00 90 00 32 12 00 00 12
R 00 00 00 18 00 04 00 18 02 0A 00 5C
T 00 02 DD 00 13 90 C2 00 75 F0 01 E4 12 00 00 75
R 00 00 00 18 00 03 00 18 02 0D 00 3A
T 00 02 EA 00 00 00 0E 90 00 05 75 F0 80 12
R 00 00 00 18 F1 23 03 00 81 00 08 00 19
T 00 02 F3 00 00 12 00 00 12
R 00 00 00 18 02 03 00 26 02 06 00 8C
T 00 02 F9 00 00 12 00 00 E5 82 70 0E 75
R 00 00 00 18 02 03 00 24 02 06 00 4A
T 00 03 03 00 00 00 08 90 00 13 75 F0 80 12
R 00 00 00 18 F1 23 03 00 81 00 08 00 19
T 00 03 0C 00 00 80 0C
R 00 00 00 18 02 03 00 26
T 00 03 10
R 00 00 00 18
T 00 03 10 75 00 00 00 0A 90 00 1C 75 F0 80 12
R 00 00 00 18 F1 23 04 00 81 00 09 00 19
T 00 03 1A 00 00
R 00 00 00 18 02 03 00 26
T 00 03 1C
R 00 00 00 18
T 00 03 1C 12 00 00 12 00 00 12
R 00 00 00 18 02 04 00 05 02 07 00 31
T 00 03 23 00 00 12 00 00 12
R 00 00 00 18 02 03 00 04 02 06 00 0A
T 00 03 29 02 BF D2 AF 75 00 00 00 07 90
R 00 00 00 18 00 03 00 18 F1 23 08 00 81
T 00 03 31 00 27 75 F0 80 12 00 00
R 00 00 00 18 00 03 00 19 02 09 00 26
T 00 03 39
R 00 00 00 18
T 00 03 39 12 00 00 12 00 00 E5 82 60 F6 12
R 00 00 00 18 02 04 00 4F 02 07 00 7C
T 00 03 44 01 D8 80 F1
R 00 00 00 18 00 03 00 18
T 00 00 00
R 00 00 00 19
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 19
T 00 00 05
R 00 00 00 19
T 00 00 05 4C 6F 6C 69 52 58 20 62 6F 6F 74 0D 0A
R 00 00 00 19
T 00 00 12 00
R 00 00 00 19
T 00 00 13
R 00 00 00 19
T 00 00 13 4E 52 46 20 4F 4B 0D 0A 00
R 00 00 00 19
T 00 00 1C
R 00 00 00 19
T 00 00 1C 4E 52 46 20 46 41 49 4C 0D 0A 00
R 00 00 00 19
T 00 00 27
R 00 00 00 19
T 00 00 27 52 65 61 64 79 0D 0A 00
R 00 00 00 19
T 00 00 00
R 00 00 00 1A
T 00 00 00 00
R 00 00 00 1A
T 00 00 01
R 00 00 00 1A
T 00 00 01 01
R 00 00 00 1A
T 00 00 02
R 00 00 00 1A
T 00 00 02 00 00
R 00 00 00 1A
T 00 00 04
R 00 00 00 1A
T 00 00 04 00
R 00 00 00 1A
AliceRX_STC/build/main.sym
+631
View File
@@ -0,0 +1,631 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
19 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
19 ___str_0 000005 R
19 ___str_1 000013 R
19 ___str_2 00001C R
19 ___str_3 000027 R
__gptrget ****** GX
__gptrput ****** GX
F __interrupt_vect 000000 R
__mcs51_genRAMCLEAR ****** GX
__mcs51_genXINIT ****** GX
__mcs51_genXRAMCLEAR ****** GX
__sdcc_gsinit_startup ****** GX
F __sdcc_program_startup 0000DE GR
7 __start__stack 000000 GR
1A __xinit__s_frame_lost 000001 R
1A __xinit__s_frame_seq 000000 R
1A __xinit__s_led_state 000004 R
1A __xinit__s_led_tick_ms 000002 R
_adc_init ****** GX
_battery_read_mv ****** GX
_cmd_poll ****** GX
_delay_ms ****** GX
_g_nrf_status ****** GX
_gpio_set_mode ****** GX
_gpio_set_mode_PARM_2 ****** GX
_gpio_set_mode_PARM_3 ****** GX
_gpio_write ****** GX
_gpio_write_PARM_2 ****** GX
_gpio_write_PARM_3 ****** GX
18 _handle_rx_frame 0001D8 R
18 _led_blink_tick 00002B R
18 _led_init 000013 R
18 _main 0002D3 GR
18 _make_ack_payload 000142 R
6 _make_ack_payload_mv_65536_57 000019 R
_model_get_mode ****** GX
_model_init ****** GX
18 _ms_tick_isr 000220 GR
6 _ms_tick_isr_last_rx_count_65537_63 00001E R
_nrf24_check ****** GX
_nrf24_data_ready ****** GX
_nrf24_init ****** GX
_nrf24_set_rx_mode ****** GX
_nrf24_write_ack_payload ****** GX
18 _output_channels 000067 R
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
6 _output_channels_frame_131072_54 000000 R
_pwm_init ****** GX
_pwm_set ****** GX
_pwm_set_PARM_2 ****** GX
_pwm_set_from_sbus ****** GX
_pwm_set_from_sbus_PARM_2 ****** GX
C _s_channels 000000 R
E _s_frame_lost 000001 R
E _s_frame_seq 000000 R
E _s_led_state 000004 R
E _s_led_tick_ms 000002 R
6 _s_ms_count 00001C R
6 _s_ms_tick 00001B R
_sbus_make_uart_frame ****** GX
_sbus_make_uart_frame_PARM_2 ****** GX
_sbus_unpack_channels ****** GX
_sbus_unpack_channels_PARM_2 ****** GX
_spi_init ****** GX
18 _sys_clock_init 000000 R
18 _tick_init 0002BF R
_uart1_init ****** GX
_uart1_send_bytes ****** GX
_uart1_send_bytes_PARM_2 ****** GX
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
5 b0 = 008000 R
5 b1 = 008100 R
5 b2 = 008200 R
5 b3 = 008300 R
5 b4 = 008400 R
5 b5 = 008500 R
5 b6 = 008600 R
5 b7 = 008700 R
5 bits 000000 R
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 BIT_BANK size 1 flags 4
6 DSEG size 1F flags 0
7 SSEG size 1 flags 0
8 ISEG size 0 flags 0
9 IABS size 0 flags 8
A BSEG size 0 flags 80
B PSEG size 0 flags 50
C XSEG size 20 flags 40
D XABS size 0 flags 48
E XISEG size 5 flags 40
F HOME size E1 flags 20
10 GSINIT0 size 0 flags 20
11 GSINIT1 size 0 flags 20
12 GSINIT2 size 0 flags 20
13 GSINIT3 size 0 flags 20
14 GSINIT4 size 0 flags 20
15 GSINIT5 size 0 flags 20
16 GSINIT size B flags 20
17 GSFINAL size 3 flags 20
18 CSEG size 348 flags 20
19 CONST size 2F flags 20
1A XINIT size 5 flags 20
1B CABS size 0 flags 28
AliceRX_STC/build/model.asm
+545
View File
@@ -0,0 +1,545 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module model
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl ___memcpy
.globl _nrf24_set_address
.globl _nrf24_set_channel
.globl _eeprom_write
.globl _eeprom_read
.globl _eeprom_init
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _model_init
.globl _model_get_mode
.globl _model_get_channel
.globl _model_get_address
.globl _model_set_mode
.globl _model_set_address
.globl _model_set_channel
.globl _model_apply
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_s_mode:
.ds 1
_s_channel:
.ds 1
_s_address:
.ds 5
_model_init_m_131072_48:
.ds 1
_model_init_ch_131072_48:
.ds 1
_model_init_addr_131072_48:
.ds 5
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
; src/model.c:11: static uint8_t s_mode = MODE_SBUS;
mov _s_mode,#0x00
; src/model.c:12: static uint8_t s_channel = DEFAULT_RF_CH;
mov _s_channel,#0x4c
; src/model.c:13: static uint8_t s_address[5] = { 0xE7, 0xE7, 0xE7, 0xE7, 0xC2 };
mov _s_address,#0xe7
mov (_s_address + 0x0001),#0xe7
mov (_s_address + 0x0002),#0xe7
mov (_s_address + 0x0003),#0xe7
mov (_s_address + 0x0004),#0xc2
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'model_init'
;------------------------------------------------------------
;m Allocated with name '_model_init_m_131072_48'
;ch Allocated with name '_model_init_ch_131072_48'
;addr Allocated with name '_model_init_addr_131072_48'
;------------------------------------------------------------
; src/model.c:15: void model_init(void)
; -----------------------------------------
; function model_init
; -----------------------------------------
_model_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/model.c:17: if (eeprom_init() == EEPROM_OK) {
lcall _eeprom_init
mov a,dpl
; src/model.c:19: if (eeprom_read(&m, &ch, addr) == EEPROM_OK) {
jnz 00104$
mov _eeprom_read_PARM_2,#_model_init_ch_131072_48
mov (_eeprom_read_PARM_2 + 1),a
mov (_eeprom_read_PARM_2 + 2),#0x40
mov _eeprom_read_PARM_3,#_model_init_addr_131072_48
mov (_eeprom_read_PARM_3 + 1),#0x00
mov (_eeprom_read_PARM_3 + 2),#0x40
mov dptr,#_model_init_m_131072_48
mov b,#0x40
lcall _eeprom_read
mov a,dpl
; src/model.c:20: s_mode = m;
; src/model.c:21: s_channel = ch;
; src/model.c:22: memcpy(s_address, addr, 5);
jnz 00105$
mov _s_mode,_model_init_m_131072_48
mov _s_channel,_model_init_ch_131072_48
mov ___memcpy_PARM_2,#_model_init_addr_131072_48
mov (___memcpy_PARM_2 + 1),a
mov (___memcpy_PARM_2 + 2),#0x40
mov ___memcpy_PARM_3,#0x05
mov (___memcpy_PARM_3 + 1),#0x00
mov dptr,#_s_address
mov b,#0x40
lcall ___memcpy
sjmp 00105$
00104$:
; src/model.c:26: eeprom_write(MODE_SBUS, DEFAULT_RF_CH, DEFAULT_ADDR);
mov _eeprom_write_PARM_3,#_DEFAULT_ADDR
mov (_eeprom_write_PARM_3 + 1),#(_DEFAULT_ADDR >> 8)
mov (_eeprom_write_PARM_3 + 2),#0x80
mov _eeprom_write_PARM_2,#0x4c
mov dpl,#0x00
lcall _eeprom_write
00105$:
; src/model.c:28: model_apply();
; src/model.c:29: }
ljmp _model_apply
;------------------------------------------------------------
;Allocation info for local variables in function 'model_get_mode'
;------------------------------------------------------------
; src/model.c:31: uint8_t model_get_mode(void) { return s_mode; }
; -----------------------------------------
; function model_get_mode
; -----------------------------------------
_model_get_mode:
mov dpl,_s_mode
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'model_get_channel'
;------------------------------------------------------------
; src/model.c:32: uint8_t model_get_channel(void) { return s_channel; }
; -----------------------------------------
; function model_get_channel
; -----------------------------------------
_model_get_channel:
mov dpl,_s_channel
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'model_get_address'
;------------------------------------------------------------
; src/model.c:33: const uint8_t *model_get_address(void) { return s_address; }
; -----------------------------------------
; function model_get_address
; -----------------------------------------
_model_get_address:
mov dptr,#_s_address
mov b,#0x40
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'model_set_mode'
;------------------------------------------------------------
;mode Allocated to registers r7
;------------------------------------------------------------
; src/model.c:35: void model_set_mode(uint8_t mode)
; -----------------------------------------
; function model_set_mode
; -----------------------------------------
_model_set_mode:
; src/model.c:37: if (mode > MODE_UART) return;
mov a,dpl
mov r7,a
add a,#0xff - 0x02
jnc 00102$
ret
00102$:
; src/model.c:38: s_mode = mode;
mov _s_mode,r7
; src/model.c:39: eeprom_write(s_mode, s_channel, s_address);
mov _eeprom_write_PARM_3,#_s_address
mov (_eeprom_write_PARM_3 + 1),#0x00
mov (_eeprom_write_PARM_3 + 2),#0x40
mov _eeprom_write_PARM_2,_s_channel
mov dpl,_s_mode
; src/model.c:40: }
ljmp _eeprom_write
;------------------------------------------------------------
;Allocation info for local variables in function 'model_set_address'
;------------------------------------------------------------
;addr Allocated to registers r5 r6 r7
;------------------------------------------------------------
; src/model.c:42: void model_set_address(const uint8_t *addr)
; -----------------------------------------
; function model_set_address
; -----------------------------------------
_model_set_address:
mov r5,dpl
mov r6,dph
mov r7,b
; src/model.c:44: memcpy(s_address, addr, 5);
mov ___memcpy_PARM_2,r5
mov (___memcpy_PARM_2 + 1),r6
mov (___memcpy_PARM_2 + 2),r7
mov ___memcpy_PARM_3,#0x05
mov (___memcpy_PARM_3 + 1),#0x00
mov dptr,#_s_address
mov b,#0x40
lcall ___memcpy
; src/model.c:45: eeprom_write(s_mode, s_channel, s_address);
mov _eeprom_write_PARM_3,#_s_address
mov (_eeprom_write_PARM_3 + 1),#0x00
mov (_eeprom_write_PARM_3 + 2),#0x40
mov _eeprom_write_PARM_2,_s_channel
mov dpl,_s_mode
lcall _eeprom_write
; src/model.c:46: nrf24_set_address(s_address);
mov dptr,#_s_address
mov b,#0x40
; src/model.c:47: }
ljmp _nrf24_set_address
;------------------------------------------------------------
;Allocation info for local variables in function 'model_set_channel'
;------------------------------------------------------------
;ch Allocated to registers r7
;------------------------------------------------------------
; src/model.c:49: void model_set_channel(uint8_t ch)
; -----------------------------------------
; function model_set_channel
; -----------------------------------------
_model_set_channel:
; src/model.c:51: if (ch > 125) return;
mov a,dpl
mov r7,a
add a,#0xff - 0x7d
jnc 00102$
ret
00102$:
; src/model.c:52: s_channel = ch;
mov _s_channel,r7
; src/model.c:53: eeprom_write(s_mode, s_channel, s_address);
mov _eeprom_write_PARM_3,#_s_address
mov (_eeprom_write_PARM_3 + 1),#0x00
mov (_eeprom_write_PARM_3 + 2),#0x40
mov _eeprom_write_PARM_2,_s_channel
mov dpl,_s_mode
push ar7
lcall _eeprom_write
pop ar7
; src/model.c:54: nrf24_set_channel(ch);
mov dpl,r7
; src/model.c:55: }
ljmp _nrf24_set_channel
;------------------------------------------------------------
;Allocation info for local variables in function 'model_apply'
;------------------------------------------------------------
; src/model.c:57: void model_apply(void)
; -----------------------------------------
; function model_apply
; -----------------------------------------
_model_apply:
; src/model.c:59: nrf24_set_address(s_address);
mov dptr,#_s_address
mov b,#0x40
lcall _nrf24_set_address
; src/model.c:60: nrf24_set_channel(s_channel);
mov dpl,_s_channel
; src/model.c:61: }
ljmp _nrf24_set_channel
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/model.lst
+545
View File
@@ -0,0 +1,545 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module model
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl ___memcpy
12 .globl _nrf24_set_address
13 .globl _nrf24_set_channel
14 .globl _eeprom_write
15 .globl _eeprom_read
16 .globl _eeprom_init
17 .globl _EADC
18 .globl _ET1
19 .globl _ET0
20 .globl _ES
21 .globl _EA
22 .globl _REN
23 .globl _RI
24 .globl _TI
25 .globl _TR1
26 .globl _TF1
27 .globl _IT0
28 .globl _IE0
29 .globl _TR0
30 .globl _TF0
31 .globl _CMPCR2
32 .globl _CMPCR1
33 .globl _TA
34 .globl _IRCBAND_REG
35 .globl _IAP_TPS
36 .globl _IAP_CONTR
37 .globl _IAP_TRIG
38 .globl _IAP_CMD
39 .globl _IAP_ADDRL
40 .globl _IAP_ADDRH
41 .globl _IAP_DATA
42 .globl _WDT_CONTR
43 .globl _PCA_PWM3
44 .globl _PCA_PWM2
45 .globl _PCA_PWM1
46 .globl _PCA_PWM0
47 .globl _CCAP3L
48 .globl _CCAP2L
49 .globl _CCAP1L
50 .globl _CCAP0L
51 .globl _CCAPM3
52 .globl _CCAPM2
53 .globl _CCAPM1
54 .globl _CCAPM0
55 .globl _CMOD
56 .globl _CCON
57 .globl _ADCTIM_X
58 .globl _ADCCFG
59 .globl _ADC_RESL
60 .globl _ADC_RES
61 .globl _ADC_CONTR
62 .globl _SPDAT
63 .globl _SPCTL
64 .globl _SPSTAT
65 .globl _IP2H
66 .globl _IP2
67 .globl _IP
68 .globl _IE2
69 .globl _IE
70 .globl _BRT
71 .globl _P_SW1
72 .globl _SADEN
73 .globl _SADDR
74 .globl _S2BUF
75 .globl _S2CON
76 .globl _SBUF
77 .globl _SCON
78 .globl _TM4PS_X
79 .globl _TM3PS_X
80 .globl _TM2PS_X
81 .globl _T4T3M
82 .globl _T4L
83 .globl _T4H
84 .globl _T3L
85 .globl _T3H
86 .globl _T2L
87 .globl _T2H
88 .globl _INTCLKO
89 .globl _AUXR
90 .globl _TH1
91 .globl _TH0
92 .globl _TL1
93 .globl _TL0
94 .globl _TMOD
95 .globl _TCON
96 .globl _P_SW2
97 .globl _P5M0
98 .globl _P5M1
99 .globl _P4M0
100 .globl _P4M1
101 .globl _P3M0
102 .globl _P3M1
103 .globl _P2M0
104 .globl _P2M1
105 .globl _P1M0
106 .globl _P1M1
107 .globl _P0M0
108 .globl _P0M1
109 .globl _PSW
110 .globl _B
111 .globl _ACC
112 .globl _PCON
113 .globl _DPH
114 .globl _DPL
115 .globl _SP
116 .globl _P5
117 .globl _P4
118 .globl _P3
119 .globl _P2
120 .globl _P1
121 .globl _P0
122 .globl _model_init
123 .globl _model_get_mode
124 .globl _model_get_channel
125 .globl _model_get_address
126 .globl _model_set_mode
127 .globl _model_set_address
128 .globl _model_set_channel
129 .globl _model_apply
130 ;--------------------------------------------------------
131 ; special function registers
132 ;--------------------------------------------------------
133 .area RSEG (ABS,DATA)
000000 134 .org 0x0000
000080 135 _P0 = 0x0080
000090 136 _P1 = 0x0090
0000A0 137 _P2 = 0x00a0
0000B0 138 _P3 = 0x00b0
0000C0 139 _P4 = 0x00c0
0000C8 140 _P5 = 0x00c8
000081 141 _SP = 0x0081
000082 142 _DPL = 0x0082
000083 143 _DPH = 0x0083
000087 144 _PCON = 0x0087
0000E0 145 _ACC = 0x00e0
0000F0 146 _B = 0x00f0
0000D0 147 _PSW = 0x00d0
000093 148 _P0M1 = 0x0093
000094 149 _P0M0 = 0x0094
000091 150 _P1M1 = 0x0091
000092 151 _P1M0 = 0x0092
000095 152 _P2M1 = 0x0095
000096 153 _P2M0 = 0x0096
0000B1 154 _P3M1 = 0x00b1
0000B2 155 _P3M0 = 0x00b2
0000B3 156 _P4M1 = 0x00b3
0000B4 157 _P4M0 = 0x00b4
0000C9 158 _P5M1 = 0x00c9
0000CA 159 _P5M0 = 0x00ca
0000BA 160 _P_SW2 = 0x00ba
000088 161 _TCON = 0x0088
000089 162 _TMOD = 0x0089
00008A 163 _TL0 = 0x008a
00008B 164 _TL1 = 0x008b
00008C 165 _TH0 = 0x008c
00008D 166 _TH1 = 0x008d
00008E 167 _AUXR = 0x008e
00008F 168 _INTCLKO = 0x008f
0000D6 169 _T2H = 0x00d6
0000D7 170 _T2L = 0x00d7
0000D4 171 _T3H = 0x00d4
0000D5 172 _T3L = 0x00d5
0000D2 173 _T4H = 0x00d2
0000D3 174 _T4L = 0x00d3
0000D1 175 _T4T3M = 0x00d1
00FEA1 176 _TM2PS_X = 0xfea1
00FEA2 177 _TM3PS_X = 0xfea2
00FEA3 178 _TM4PS_X = 0xfea3
000098 179 _SCON = 0x0098
000099 180 _SBUF = 0x0099
00009A 181 _S2CON = 0x009a
00009B 182 _S2BUF = 0x009b
0000A9 183 _SADDR = 0x00a9
0000B9 184 _SADEN = 0x00b9
0000A2 185 _P_SW1 = 0x00a2
00009C 186 _BRT = 0x009c
0000A8 187 _IE = 0x00a8
0000AF 188 _IE2 = 0x00af
0000B8 189 _IP = 0x00b8
0000B6 190 _IP2 = 0x00b6
0000B7 191 _IP2H = 0x00b7
0000CD 192 _SPSTAT = 0x00cd
0000CE 193 _SPCTL = 0x00ce
0000CF 194 _SPDAT = 0x00cf
0000BC 195 _ADC_CONTR = 0x00bc
0000BD 196 _ADC_RES = 0x00bd
0000BE 197 _ADC_RESL = 0x00be
0000DE 198 _ADCCFG = 0x00de
00FEA8 199 _ADCTIM_X = 0xfea8
0000D8 200 _CCON = 0x00d8
0000D9 201 _CMOD = 0x00d9
0000DA 202 _CCAPM0 = 0x00da
0000DB 203 _CCAPM1 = 0x00db
0000DC 204 _CCAPM2 = 0x00dc
0000DD 205 _CCAPM3 = 0x00dd
0000EA 206 _CCAP0L = 0x00ea
0000EB 207 _CCAP1L = 0x00eb
0000EC 208 _CCAP2L = 0x00ec
0000ED 209 _CCAP3L = 0x00ed
0000F2 210 _PCA_PWM0 = 0x00f2
0000F3 211 _PCA_PWM1 = 0x00f3
0000F4 212 _PCA_PWM2 = 0x00f4
0000F5 213 _PCA_PWM3 = 0x00f5
0000C1 214 _WDT_CONTR = 0x00c1
0000C2 215 _IAP_DATA = 0x00c2
0000C3 216 _IAP_ADDRH = 0x00c3
0000C4 217 _IAP_ADDRL = 0x00c4
0000C5 218 _IAP_CMD = 0x00c5
0000C6 219 _IAP_TRIG = 0x00c6
0000C7 220 _IAP_CONTR = 0x00c7
0000F7 221 _IAP_TPS = 0x00f7
00009D 222 _IRCBAND_REG = 0x009d
0000AE 223 _TA = 0x00ae
0000E6 224 _CMPCR1 = 0x00e6
0000E7 225 _CMPCR2 = 0x00e7
226 ;--------------------------------------------------------
227 ; special function bits
228 ;--------------------------------------------------------
229 .area RSEG (ABS,DATA)
000000 230 .org 0x0000
00008D 231 _TF0 = 0x008d
00008C 232 _TR0 = 0x008c
000089 233 _IE0 = 0x0089
000088 234 _IT0 = 0x0088
00008F 235 _TF1 = 0x008f
00008E 236 _TR1 = 0x008e
000099 237 _TI = 0x0099
000098 238 _RI = 0x0098
00009C 239 _REN = 0x009c
0000AF 240 _EA = 0x00af
0000AC 241 _ES = 0x00ac
0000A9 242 _ET0 = 0x00a9
0000AB 243 _ET1 = 0x00ab
0000AD 244 _EADC = 0x00ad
245 ;--------------------------------------------------------
246 ; overlayable register banks
247 ;--------------------------------------------------------
248 .area REG_BANK_0 (REL,OVR,DATA)
000000 249 .ds 8
250 ;--------------------------------------------------------
251 ; internal ram data
252 ;--------------------------------------------------------
253 .area DSEG (DATA)
000000 254 _s_mode:
000000 255 .ds 1
000001 256 _s_channel:
000001 257 .ds 1
000002 258 _s_address:
000002 259 .ds 5
000007 260 _model_init_m_131072_48:
000007 261 .ds 1
000008 262 _model_init_ch_131072_48:
000008 263 .ds 1
000009 264 _model_init_addr_131072_48:
000009 265 .ds 5
266 ;--------------------------------------------------------
267 ; overlayable items in internal ram
268 ;--------------------------------------------------------
269 ;--------------------------------------------------------
270 ; indirectly addressable internal ram data
271 ;--------------------------------------------------------
272 .area ISEG (DATA)
273 ;--------------------------------------------------------
274 ; absolute internal ram data
275 ;--------------------------------------------------------
276 .area IABS (ABS,DATA)
277 .area IABS (ABS,DATA)
278 ;--------------------------------------------------------
279 ; bit data
280 ;--------------------------------------------------------
281 .area BSEG (BIT)
282 ;--------------------------------------------------------
283 ; paged external ram data
284 ;--------------------------------------------------------
285 .area PSEG (PAG,XDATA)
286 ;--------------------------------------------------------
287 ; external ram data
288 ;--------------------------------------------------------
289 .area XSEG (XDATA)
290 ;--------------------------------------------------------
291 ; absolute external ram data
292 ;--------------------------------------------------------
293 .area XABS (ABS,XDATA)
294 ;--------------------------------------------------------
295 ; external initialized ram data
296 ;--------------------------------------------------------
297 .area XISEG (XDATA)
298 .area HOME (CODE)
299 .area GSINIT0 (CODE)
300 .area GSINIT1 (CODE)
301 .area GSINIT2 (CODE)
302 .area GSINIT3 (CODE)
303 .area GSINIT4 (CODE)
304 .area GSINIT5 (CODE)
305 .area GSINIT (CODE)
306 .area GSFINAL (CODE)
307 .area CSEG (CODE)
308 ;--------------------------------------------------------
309 ; global & static initialisations
310 ;--------------------------------------------------------
311 .area HOME (CODE)
312 .area GSINIT (CODE)
313 .area GSFINAL (CODE)
314 .area GSINIT (CODE)
315 ; src/model.c:11: static uint8_t s_mode = MODE_SBUS;
000000 75*00 00 [24] 316 mov _s_mode,#0x00
317 ; src/model.c:12: static uint8_t s_channel = DEFAULT_RF_CH;
000003 75*01 4C [24] 318 mov _s_channel,#0x4c
319 ; src/model.c:13: static uint8_t s_address[5] = { 0xE7, 0xE7, 0xE7, 0xE7, 0xC2 };
000006 75*02 E7 [24] 320 mov _s_address,#0xe7
000009 75*03 E7 [24] 321 mov (_s_address + 0x0001),#0xe7
00000C 75*04 E7 [24] 322 mov (_s_address + 0x0002),#0xe7
00000F 75*05 E7 [24] 323 mov (_s_address + 0x0003),#0xe7
000012 75*06 C2 [24] 324 mov (_s_address + 0x0004),#0xc2
325 ;--------------------------------------------------------
326 ; Home
327 ;--------------------------------------------------------
328 .area HOME (CODE)
329 .area HOME (CODE)
330 ;--------------------------------------------------------
331 ; code
332 ;--------------------------------------------------------
333 .area CSEG (CODE)
334 ;------------------------------------------------------------
335 ;Allocation info for local variables in function 'model_init'
336 ;------------------------------------------------------------
337 ;m Allocated with name '_model_init_m_131072_48'
338 ;ch Allocated with name '_model_init_ch_131072_48'
339 ;addr Allocated with name '_model_init_addr_131072_48'
340 ;------------------------------------------------------------
341 ; src/model.c:15: void model_init(void)
342 ; -----------------------------------------
343 ; function model_init
344 ; -----------------------------------------
000000 345 _model_init:
000007 346 ar7 = 0x07
000006 347 ar6 = 0x06
000005 348 ar5 = 0x05
000004 349 ar4 = 0x04
000003 350 ar3 = 0x03
000002 351 ar2 = 0x02
000001 352 ar1 = 0x01
000000 353 ar0 = 0x00
354 ; src/model.c:17: if (eeprom_init() == EEPROM_OK) {
000000 12r00r00 [24] 355 lcall _eeprom_init
000003 E5 82 [12] 356 mov a,dpl
357 ; src/model.c:19: if (eeprom_read(&m, &ch, addr) == EEPROM_OK) {
000005 70 3D [24] 358 jnz 00104$
000007 75*00r08 [24] 359 mov _eeprom_read_PARM_2,#_model_init_ch_131072_48
00000A F5*01 [12] 360 mov (_eeprom_read_PARM_2 + 1),a
00000C 75*02 40 [24] 361 mov (_eeprom_read_PARM_2 + 2),#0x40
00000F 75*00r09 [24] 362 mov _eeprom_read_PARM_3,#_model_init_addr_131072_48
000012 75*01 00 [24] 363 mov (_eeprom_read_PARM_3 + 1),#0x00
000015 75*02 40 [24] 364 mov (_eeprom_read_PARM_3 + 2),#0x40
000018 90r00r07 [24] 365 mov dptr,#_model_init_m_131072_48
00001B 75 F0 40 [24] 366 mov b,#0x40
00001E 12r00r00 [24] 367 lcall _eeprom_read
000021 E5 82 [12] 368 mov a,dpl
369 ; src/model.c:20: s_mode = m;
370 ; src/model.c:21: s_channel = ch;
371 ; src/model.c:22: memcpy(s_address, addr, 5);
000023 70 31 [24] 372 jnz 00105$
000025 85*07*00 [24] 373 mov _s_mode,_model_init_m_131072_48
000028 85*08*01 [24] 374 mov _s_channel,_model_init_ch_131072_48
00002B 75*00r09 [24] 375 mov ___memcpy_PARM_2,#_model_init_addr_131072_48
00002E F5*01 [12] 376 mov (___memcpy_PARM_2 + 1),a
000030 75*02 40 [24] 377 mov (___memcpy_PARM_2 + 2),#0x40
000033 75*00 05 [24] 378 mov ___memcpy_PARM_3,#0x05
000036 75*01 00 [24] 379 mov (___memcpy_PARM_3 + 1),#0x00
000039 90r00r02 [24] 380 mov dptr,#_s_address
00003C 75 F0 40 [24] 381 mov b,#0x40
00003F 12r00r00 [24] 382 lcall ___memcpy
000042 80 12 [24] 383 sjmp 00105$
000044 384 00104$:
385 ; src/model.c:26: eeprom_write(MODE_SBUS, DEFAULT_RF_CH, DEFAULT_ADDR);
000044 75*00r00 [24] 386 mov _eeprom_write_PARM_3,#_DEFAULT_ADDR
000047 75*01s00 [24] 387 mov (_eeprom_write_PARM_3 + 1),#(_DEFAULT_ADDR >> 8)
00004A 75*02 80 [24] 388 mov (_eeprom_write_PARM_3 + 2),#0x80
00004D 75*00 4C [24] 389 mov _eeprom_write_PARM_2,#0x4c
000050 75 82 00 [24] 390 mov dpl,#0x00
000053 12r00r00 [24] 391 lcall _eeprom_write
000056 392 00105$:
393 ; src/model.c:28: model_apply();
394 ; src/model.c:29: }
000056 02r00rDF [24] 395 ljmp _model_apply
396 ;------------------------------------------------------------
397 ;Allocation info for local variables in function 'model_get_mode'
398 ;------------------------------------------------------------
399 ; src/model.c:31: uint8_t model_get_mode(void) { return s_mode; }
400 ; -----------------------------------------
401 ; function model_get_mode
402 ; -----------------------------------------
000059 403 _model_get_mode:
000059 85*00 82 [24] 404 mov dpl,_s_mode
00005C 22 [24] 405 ret
406 ;------------------------------------------------------------
407 ;Allocation info for local variables in function 'model_get_channel'
408 ;------------------------------------------------------------
409 ; src/model.c:32: uint8_t model_get_channel(void) { return s_channel; }
410 ; -----------------------------------------
411 ; function model_get_channel
412 ; -----------------------------------------
00005D 413 _model_get_channel:
00005D 85*01 82 [24] 414 mov dpl,_s_channel
000060 22 [24] 415 ret
416 ;------------------------------------------------------------
417 ;Allocation info for local variables in function 'model_get_address'
418 ;------------------------------------------------------------
419 ; src/model.c:33: const uint8_t *model_get_address(void) { return s_address; }
420 ; -----------------------------------------
421 ; function model_get_address
422 ; -----------------------------------------
000061 423 _model_get_address:
000061 90r00r02 [24] 424 mov dptr,#_s_address
000064 75 F0 40 [24] 425 mov b,#0x40
000067 22 [24] 426 ret
427 ;------------------------------------------------------------
428 ;Allocation info for local variables in function 'model_set_mode'
429 ;------------------------------------------------------------
430 ;mode Allocated to registers r7
431 ;------------------------------------------------------------
432 ; src/model.c:35: void model_set_mode(uint8_t mode)
433 ; -----------------------------------------
434 ; function model_set_mode
435 ; -----------------------------------------
000068 436 _model_set_mode:
437 ; src/model.c:37: if (mode > MODE_UART) return;
000068 E5 82 [12] 438 mov a,dpl
00006A FF [12] 439 mov r7,a
00006B 24 FD [12] 440 add a,#0xff - 0x02
00006D 50 01 [24] 441 jnc 00102$
00006F 22 [24] 442 ret
000070 443 00102$:
444 ; src/model.c:38: s_mode = mode;
000070 8F*00 [24] 445 mov _s_mode,r7
446 ; src/model.c:39: eeprom_write(s_mode, s_channel, s_address);
000072 75*00r02 [24] 447 mov _eeprom_write_PARM_3,#_s_address
000075 75*01 00 [24] 448 mov (_eeprom_write_PARM_3 + 1),#0x00
000078 75*02 40 [24] 449 mov (_eeprom_write_PARM_3 + 2),#0x40
00007B 85*01*00 [24] 450 mov _eeprom_write_PARM_2,_s_channel
00007E 85*00 82 [24] 451 mov dpl,_s_mode
452 ; src/model.c:40: }
000081 02r00r00 [24] 453 ljmp _eeprom_write
454 ;------------------------------------------------------------
455 ;Allocation info for local variables in function 'model_set_address'
456 ;------------------------------------------------------------
457 ;addr Allocated to registers r5 r6 r7
458 ;------------------------------------------------------------
459 ; src/model.c:42: void model_set_address(const uint8_t *addr)
460 ; -----------------------------------------
461 ; function model_set_address
462 ; -----------------------------------------
000084 463 _model_set_address:
000084 AD 82 [24] 464 mov r5,dpl
000086 AE 83 [24] 465 mov r6,dph
000088 AF F0 [24] 466 mov r7,b
467 ; src/model.c:44: memcpy(s_address, addr, 5);
00008A 8D*00 [24] 468 mov ___memcpy_PARM_2,r5
00008C 8E*01 [24] 469 mov (___memcpy_PARM_2 + 1),r6
00008E 8F*02 [24] 470 mov (___memcpy_PARM_2 + 2),r7
000090 75*00 05 [24] 471 mov ___memcpy_PARM_3,#0x05
000093 75*01 00 [24] 472 mov (___memcpy_PARM_3 + 1),#0x00
000096 90r00r02 [24] 473 mov dptr,#_s_address
000099 75 F0 40 [24] 474 mov b,#0x40
00009C 12r00r00 [24] 475 lcall ___memcpy
476 ; src/model.c:45: eeprom_write(s_mode, s_channel, s_address);
00009F 75*00r02 [24] 477 mov _eeprom_write_PARM_3,#_s_address
0000A2 75*01 00 [24] 478 mov (_eeprom_write_PARM_3 + 1),#0x00
0000A5 75*02 40 [24] 479 mov (_eeprom_write_PARM_3 + 2),#0x40
0000A8 85*01*00 [24] 480 mov _eeprom_write_PARM_2,_s_channel
0000AB 85*00 82 [24] 481 mov dpl,_s_mode
0000AE 12r00r00 [24] 482 lcall _eeprom_write
483 ; src/model.c:46: nrf24_set_address(s_address);
0000B1 90r00r02 [24] 484 mov dptr,#_s_address
0000B4 75 F0 40 [24] 485 mov b,#0x40
486 ; src/model.c:47: }
0000B7 02r00r00 [24] 487 ljmp _nrf24_set_address
488 ;------------------------------------------------------------
489 ;Allocation info for local variables in function 'model_set_channel'
490 ;------------------------------------------------------------
491 ;ch Allocated to registers r7
492 ;------------------------------------------------------------
493 ; src/model.c:49: void model_set_channel(uint8_t ch)
494 ; -----------------------------------------
495 ; function model_set_channel
496 ; -----------------------------------------
0000BA 497 _model_set_channel:
498 ; src/model.c:51: if (ch > 125) return;
0000BA E5 82 [12] 499 mov a,dpl
0000BC FF [12] 500 mov r7,a
0000BD 24 82 [12] 501 add a,#0xff - 0x7d
0000BF 50 01 [24] 502 jnc 00102$
0000C1 22 [24] 503 ret
0000C2 504 00102$:
505 ; src/model.c:52: s_channel = ch;
0000C2 8F*01 [24] 506 mov _s_channel,r7
507 ; src/model.c:53: eeprom_write(s_mode, s_channel, s_address);
0000C4 75*00r02 [24] 508 mov _eeprom_write_PARM_3,#_s_address
0000C7 75*01 00 [24] 509 mov (_eeprom_write_PARM_3 + 1),#0x00
0000CA 75*02 40 [24] 510 mov (_eeprom_write_PARM_3 + 2),#0x40
0000CD 85*01*00 [24] 511 mov _eeprom_write_PARM_2,_s_channel
0000D0 85*00 82 [24] 512 mov dpl,_s_mode
0000D3 C0 07 [24] 513 push ar7
0000D5 12r00r00 [24] 514 lcall _eeprom_write
0000D8 D0 07 [24] 515 pop ar7
516 ; src/model.c:54: nrf24_set_channel(ch);
0000DA 8F 82 [24] 517 mov dpl,r7
518 ; src/model.c:55: }
0000DC 02r00r00 [24] 519 ljmp _nrf24_set_channel
520 ;------------------------------------------------------------
521 ;Allocation info for local variables in function 'model_apply'
522 ;------------------------------------------------------------
523 ; src/model.c:57: void model_apply(void)
524 ; -----------------------------------------
525 ; function model_apply
526 ; -----------------------------------------
0000DF 527 _model_apply:
528 ; src/model.c:59: nrf24_set_address(s_address);
0000DF 90r00r02 [24] 529 mov dptr,#_s_address
0000E2 75 F0 40 [24] 530 mov b,#0x40
0000E5 12r00r00 [24] 531 lcall _nrf24_set_address
532 ; src/model.c:60: nrf24_set_channel(s_channel);
0000E8 85*01 82 [24] 533 mov dpl,_s_channel
534 ; src/model.c:61: }
0000EB 02r00r00 [24] 535 ljmp _nrf24_set_channel
536 .area CSEG (CODE)
537 .area CONST (CODE)
000000 538 _DEFAULT_ADDR:
000000 E7 539 .db #0xe7 ; 231
000001 E7 540 .db #0xe7 ; 231
000002 E7 541 .db #0xe7 ; 231
000003 E7 542 .db #0xe7 ; 231
000004 C2 543 .db #0xc2 ; 194
544 .area XINIT (CODE)
545 .area CABS (ABS,CODE)
AliceRX_STC/build/model.rel
+308
View File
@@ -0,0 +1,308 @@
XH3
H 1A areas 7E global symbols
M model
O -mmcs51 --model-small
S _S2BUF Def00009B
S _eeprom_read_PARM_2 Ref000000
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _eeprom_read_PARM_3 Ref000000
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S ___memcpy_PARM_2 Ref000000
S _ADCTIM_X Def00FEA8
S ___memcpy_PARM_3 Ref000000
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _eeprom_write_PARM_2 Ref000000
S _eeprom_write_PARM_3 Ref000000
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _eeprom_read Ref000000
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S ___memcpy Ref000000
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _nrf24_set_channel Ref000000
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _eeprom_write Ref000000
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _eeprom_init Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _nrf24_set_address Ref000000
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size E flags 0 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 15 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size EE flags 20 addr 0
S _model_init Def000000
S _model_get_channel Def00005D
S _model_set_channel Def0000BA
S _model_get_mode Def000059
S _model_get_address Def000061
S _model_set_mode Def000068
S _model_set_address Def000084
S _model_apply Def0000DF
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 02
R 00 00 00 05
T 00 00 02
R 00 00 00 05
T 00 00 07
R 00 00 00 05
T 00 00 07
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 00 75 00 00 00 00 75 00 00 01 4C 75
R 00 00 00 14 F1 21 04 00 05 F1 21 09 00 05
T 00 00 07 00 00 02 E7 75 00 00 03 E7 75
R 00 00 00 14 F1 21 03 00 05 F1 21 08 00 05
T 00 00 0D 00 00 04 E7 75 00 00 05 E7 75
R 00 00 00 14 F1 21 03 00 05 F1 21 08 00 05
T 00 00 13 00 00 06 C2
R 00 00 00 14 F1 21 03 00 05
T 00 00 00
R 00 00 00 16
T 00 00 00 12 00 00 E5 82 70 3D 75 00 00 00
R 00 00 00 16 02 04 00 6C F1 23 0B 00 01
T 00 00 09 00 00 08 F5 00 00 01 75
R 00 00 00 16 F1 01 03 00 05 F1 23 07 00 01
T 00 00 0D 00 00 02 40 75 00 00 00
R 00 00 00 16 F1 23 03 00 01 F1 23 08 00 05
T 00 00 11 00 00 09 75 00 00 01 00 75
R 00 00 00 16 F1 01 03 00 05 F1 23 07 00 05
T 00 00 16 00 00 02 40 90 00 07 75 F0 40 12
R 00 00 00 16 F1 23 03 00 05 00 08 00 05
T 00 00 1F 00 00 E5 82 70 31 85 00 00 07
R 00 00 00 16 02 03 00 36 F1 21 0A 00 05
T 00 00 27 00 00 00 85 00 00 08
R 00 00 00 16 F1 21 03 00 05 F1 21 07 00 05
T 00 00 2A 00 00 01 75 00 00 00
R 00 00 00 16 F1 21 03 00 05 F1 23 07 00 0B
T 00 00 2D 00 00 09 F5 00 00 01 75
R 00 00 00 16 F1 01 03 00 05 F1 23 07 00 0B
T 00 00 31 00 00 02 40 75 00 00 00 05 75
R 00 00 00 16 F1 23 03 00 0B F1 23 08 00 0D
T 00 00 37 00 00 01 00 90 00 02 75 F0 40 12
R 00 00 00 16 F1 23 03 00 0D 00 08 00 05
T 00 00 40 00 00 80 12
R 00 00 00 16 02 03 00 3D
T 00 00 44
R 00 00 00 16
T 00 00 44 75 00 00 00 00 00 00 75
R 00 00 00 16 F1 23 04 00 1A F1 01 07 00 17
T 00 00 48 00 00 01 00 00 00 75
R 00 00 00 16 F1 23 03 00 1A F1 81 06 00 17
T 00 00 4B 00 00 02 80 75 00 00 00 4C 75 82 00 12
R 00 00 00 16 F1 23 03 00 1A F1 23 08 00 19
T 00 00 54 00 00
R 00 00 00 16 02 03 00 52
T 00 00 56
R 00 00 00 16
T 00 00 56 02 00 DF
R 00 00 00 16 00 04 00 16
T 00 00 59
R 00 00 00 16
T 00 00 59 85 00 00 00 82 22
R 00 00 00 16 F1 21 04 00 05
T 00 00 5D
R 00 00 00 16
T 00 00 5D 85 00 00 01 82 22
R 00 00 00 16 F1 21 04 00 05
T 00 00 61
R 00 00 00 16
T 00 00 61 90 00 02 75 F0 40 22
R 00 00 00 16 00 04 00 05
T 00 00 68
R 00 00 00 16
T 00 00 68 E5 82 FF 24 FD 50 01 22
R 00 00 00 16
T 00 00 70
R 00 00 00 16
T 00 00 70 8F 00 00 00 75 00 00 00
R 00 00 00 16 F1 21 04 00 05 F1 23 08 00 1A
T 00 00 74 00 00 02 75 00 00 01 00 75
R 00 00 00 16 F1 01 03 00 05 F1 23 07 00 1A
T 00 00 79 00 00 02 40 85 00 00 01
R 00 00 00 16 F1 23 03 00 1A F1 21 08 00 05
T 00 00 7D 00 00 00 85 00 00 00 82 02
R 00 00 00 16 F1 23 03 00 19 F1 21 07 00 05
T 00 00 82 00 00
R 00 00 00 16 02 03 00 52
T 00 00 84
R 00 00 00 16
T 00 00 84 AD 82 AE 83 AF F0 8D 00 00 00 8E
R 00 00 00 16 F1 23 0A 00 0B
T 00 00 8D 00 00 01 8F 00 00 02 75
R 00 00 00 16 F1 23 03 00 0B F1 23 07 00 0B
T 00 00 91 00 00 00 05 75 00 00 01 00 90
R 00 00 00 16 F1 23 03 00 0D F1 23 08 00 0D
T 00 00 97 00 02 75 F0 40 12 00 00 75
R 00 00 00 16 00 03 00 05 02 09 00 3D
T 00 00 A0 00 00 00 00 00 02 75
R 00 00 00 16 F1 23 03 00 1A F1 01 06 00 05
T 00 00 A3 00 00 01 00 75 00 00 02 40 85
R 00 00 00 16 F1 23 03 00 1A F1 23 08 00 1A
T 00 00 A9 00 00 01 00 00 00 85
R 00 00 00 16 F1 21 03 00 05 F1 23 06 00 19
T 00 00 AC 00 00 00 82 12 00 00 90
R 00 00 00 16 F1 21 03 00 05 02 08 00 52
T 00 00 B2 00 02 75 F0 40 02 00 00
R 00 00 00 16 00 03 00 05 02 09 00 70
T 00 00 BA
R 00 00 00 16
T 00 00 BA E5 82 FF 24 82 50 01 22
R 00 00 00 16
T 00 00 C2
R 00 00 00 16
T 00 00 C2 8F 00 00 01 75 00 00 00
R 00 00 00 16 F1 21 04 00 05 F1 23 08 00 1A
T 00 00 C6 00 00 02 75 00 00 01 00 75
R 00 00 00 16 F1 01 03 00 05 F1 23 07 00 1A
T 00 00 CB 00 00 02 40 85 00 00 01
R 00 00 00 16 F1 23 03 00 1A F1 21 08 00 05
T 00 00 CF 00 00 00 85 00 00 00 82 C0 07 12
R 00 00 00 16 F1 23 03 00 19 F1 21 07 00 05
T 00 00 D6 00 00 D0 07 8F 82 02 00 00
R 00 00 00 16 02 03 00 52 02 0A 00 4C
T 00 00 DF
R 00 00 00 16
T 00 00 DF 90 00 02 75 F0 40 12 00 00 85
R 00 00 00 16 00 04 00 05 02 0A 00 70
T 00 00 E9 00 00 01 82 02 00 00
R 00 00 00 16 F1 21 03 00 05 02 08 00 4C
T 00 00 00
R 00 00 00 17
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 17
AliceRX_STC/build/model.sym
+580
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@@ -0,0 +1,580 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
17 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
___memcpy ****** GX
___memcpy_PARM_2 ****** GX
___memcpy_PARM_3 ****** GX
_eeprom_init ****** GX
_eeprom_read ****** GX
_eeprom_read_PARM_2 ****** GX
_eeprom_read_PARM_3 ****** GX
_eeprom_write ****** GX
_eeprom_write_PARM_2 ****** GX
_eeprom_write_PARM_3 ****** GX
16 _model_apply 0000DF GR
16 _model_get_address 000061 GR
16 _model_get_channel 00005D GR
16 _model_get_mode 000059 GR
16 _model_init 000000 GR
5 _model_init_addr_131072_48 000009 R
5 _model_init_ch_131072_48 000008 R
5 _model_init_m_131072_48 000007 R
16 _model_set_address 000084 GR
16 _model_set_channel 0000BA GR
16 _model_set_mode 000068 GR
_nrf24_set_address ****** GX
_nrf24_set_channel ****** GX
5 _s_address 000002 R
5 _s_channel 000001 R
5 _s_mode 000000 R
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size E flags 0
6 ISEG size 0 flags 0
7 IABS size 0 flags 8
8 BSEG size 0 flags 80
9 PSEG size 0 flags 50
A XSEG size 0 flags 40
B XABS size 0 flags 48
C XISEG size 0 flags 40
D HOME size 0 flags 20
E GSINIT0 size 0 flags 20
F GSINIT1 size 0 flags 20
10 GSINIT2 size 0 flags 20
11 GSINIT3 size 0 flags 20
12 GSINIT4 size 0 flags 20
13 GSINIT5 size 0 flags 20
14 GSINIT size 15 flags 20
15 GSFINAL size 0 flags 20
16 CSEG size EE flags 20
17 CONST size 5 flags 20
18 XINIT size 0 flags 20
19 CABS size 0 flags 28
AliceRX_STC/build/nrf24l01.asm
+1015
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AliceRX_STC/build/nrf24l01.lst
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AliceRX_STC/build/nrf24l01.rel
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XH3
H 1A areas 7E global symbols
M nrf24l01
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S __gptrput Ref000000
S _gpio_write Ref000000
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _gpio_set_mode_PARM_2 Ref000000
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _gpio_set_mode_PARM_3 Ref000000
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _delay_ms Ref000000
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _spi_transfer Ref000000
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _delay_us Ref000000
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _gpio_write_PARM_2 Ref000000
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _gpio_write_PARM_3 Ref000000
S _PCA_PWM3 Def0000F5
S _RI Def000098
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _gpio_set_mode Ref000000
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 13 flags 0 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 24 flags 40 addr 0
S _g_nrf_status Def000000
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 3EA flags 20 addr 0
S _nrf24_set_rx_mode Def0002EB
S _nrf24_init Def00016B
S _nrf24_check Def000248
S _nrf24_write_ack_payload Def00035A
S _nrf24_set_channel Def0002AA
S _nrf24_irq_handler Def0003BA
S _nrf24_data_ready Def000311
S _nrf24_set_address Def0002BB
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 01
R 00 00 00 05
T 00 00 04
R 00 00 00 05
T 00 00 04
R 00 00 00 05
T 00 00 05
R 00 00 00 05
T 00 00 05
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 08
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 09
R 00 00 00 05
T 00 00 0E
R 00 00 00 05
T 00 00 0E
R 00 00 00 05
T 00 00 00
R 00 00 00 0A
T 00 00 00
R 00 00 00 0A
T 00 00 00
R 00 00 00 16
T 00 00 00 AF 82 75 00 00 00 04 75 00 00 00 00 75
R 00 00 00 16 F1 23 06 00 65 F1 23 0B 00 68
T 00 00 09 82 05 C0 07 12 00 00 D0 07 8F 82 12
R 00 00 00 16 02 08 00 19
T 00 00 15 00 00 AF 82 85 00 00 00 82 C0 07 12
R 00 00 00 16 02 03 00 4B F1 21 08 00 05
T 00 00 1F 00 00 75 00 00 00 04 75
R 00 00 00 16 02 03 00 4B F1 23 06 00 65
T 00 00 25 00 00 00 01 75 82 05 12 00 00 D0 07 8F
R 00 00 00 16 F1 23 03 00 68 02 0B 00 19
T 00 00 30 82 22
R 00 00 00 16
T 00 00 32
R 00 00 00 16
T 00 00 32 AF 82 75 00 00 00 04 75 00 00 00 00 75
R 00 00 00 16 F1 23 06 00 65 F1 23 0B 00 68
T 00 00 3B 82 05 C0 07 12 00 00 D0 07 8F 82 12
R 00 00 00 16 02 08 00 19
T 00 00 47 00 00 AF 82 AC 00 00 01 AD
R 00 00 00 16 02 03 00 4B F1 21 08 00 05
T 00 00 4E 00 00 02 AE 00 00 03 AB
R 00 00 00 16 F1 21 03 00 05 F1 21 07 00 05
T 00 00 52 00 00 04
R 00 00 00 16 F1 21 03 00 05
T 00 00 53
R 00 00 00 16
T 00 00 53 8B 02 1B EA 60 2A 8C 82 8D 83 8E F0 12
R 00 00 00 16
T 00 00 60 00 00 FA A3 AC 82 AD 83 8A 82 C0 07 C0
R 00 00 00 16 02 03 00 6B
T 00 00 6D 06 C0 05 C0 04 C0 03 12 00 00 D0 03 D0
R 00 00 00 16 02 0B 00 4B
T 00 00 7A 04 D0 05 D0 06 D0 07 80 D0
R 00 00 00 16
T 00 00 83
R 00 00 00 16
T 00 00 83 75 00 00 00 04 75 00 00 00 01 75 82 05
R 00 00 00 16 F1 23 04 00 65 F1 23 09 00 68
T 00 00 8C C0 07 12 00 00 D0 07 8F 82 22
R 00 00 00 16 02 06 00 19
T 00 00 96
R 00 00 00 16
T 00 00 96 AF 82 75 00 00 00 04 75 00 00 00 00 75
R 00 00 00 16 F1 23 06 00 65 F1 23 0B 00 68
T 00 00 9F 82 05 C0 07 12 00 00 D0 07 8F 82 12
R 00 00 00 16 02 08 00 19
T 00 00 AB 00 00 75 82 FF 12 00 00 AF 82 75
R 00 00 00 16 02 03 00 4B 02 09 00 4B
T 00 00 B6 00 00 00 04 75 00 00 00 01 75 82 05 C0
R 00 00 00 16 F1 23 03 00 65 F1 23 08 00 68
T 00 00 BF 07 12 00 00 D0 07 8F 82 22
R 00 00 00 16 02 05 00 19
T 00 00 C8
R 00 00 00 16
T 00 00 C8 AF 82 75 00 00 00 04 75 00 00 00 00 75
R 00 00 00 16 F1 23 06 00 65 F1 23 0B 00 68
T 00 00 D1 82 05 C0 07 12 00 00 D0 07 8F 82 12
R 00 00 00 16 02 08 00 19
T 00 00 DD 00 00 AF 82 AC 00 00 05 AD
R 00 00 00 16 02 03 00 4B F1 21 08 00 05
T 00 00 E4 00 00 06 AE 00 00 07 AB
R 00 00 00 16 F1 21 03 00 05 F1 21 07 00 05
T 00 00 E8 00 00 08
R 00 00 00 16 F1 21 03 00 05
T 00 00 E9
R 00 00 00 16
T 00 00 E9 8B 02 1B EA 60 2D 75 82 FF C0 07 C0 06
R 00 00 00 16
T 00 00 F6 C0 05 C0 04 C0 03 12 00 00 AA 82 D0 03
R 00 00 00 16 02 0A 00 4B
T 00 01 03 D0 04 D0 05 D0 06 D0 07 8C 82 8D 83 8E
R 00 00 00 16
T 00 01 10 F0 EA 12 00 00 A3 AC 82 AD 83 80 CD
R 00 00 00 16 02 06 00 18
T 00 01 1C
R 00 00 00 16
T 00 01 1C 75 00 00 00 04 75 00 00 00 01 75 82 05
R 00 00 00 16 F1 23 04 00 65 F1 23 09 00 68
T 00 01 25 C0 07 12 00 00 D0 07 8F 82 22
R 00 00 00 16 02 06 00 19
T 00 01 2F
R 00 00 00 16
T 00 01 2F 75 00 00 00 04 75 00 00 00 00 75 82 05
R 00 00 00 16 F1 23 04 00 65 F1 23 09 00 68
T 00 01 38 12 00 00 75 82 E2 12 00 00 75
R 00 00 00 16 02 04 00 19 02 0A 00 4B
T 00 01 42 00 00 00 04 75 00 00 00 01 75 82 05 02
R 00 00 00 16 F1 23 03 00 65 F1 23 08 00 68
T 00 01 4B 00 00
R 00 00 00 16 02 03 00 19
T 00 01 4D
R 00 00 00 16
T 00 01 4D 75 00 00 00 04 75 00 00 00 00 75 82 05
R 00 00 00 16 F1 23 04 00 65 F1 23 09 00 68
T 00 01 56 12 00 00 75 82 E1 12 00 00 75
R 00 00 00 16 02 04 00 19 02 0A 00 4B
T 00 01 60 00 00 00 04 75 00 00 00 01 75 82 05 02
R 00 00 00 16 F1 23 03 00 65 F1 23 08 00 68
T 00 01 69 00 00
R 00 00 00 16 02 03 00 19
T 00 01 6B
R 00 00 00 16
T 00 01 6B 75 00 00 00 04 75 00 00 00 01 75 82 05
R 00 00 00 16 F1 23 04 00 1D F1 23 09 00 21
T 00 01 74 12 00 00 75 00 00 00 06 75
R 00 00 00 16 02 04 00 71 F1 23 07 00 1D
T 00 01 7B 00 00 00 01 75 82 01 12 00 00 75
R 00 00 00 16 F1 23 03 00 21 02 0B 00 71
T 00 01 84 00 00 00 07 75 00 00 00 02 75 82 01 12
R 00 00 00 16 F1 23 03 00 1D F1 23 08 00 21
T 00 01 8D 00 00 75 00 00 00 06 75
R 00 00 00 16 02 03 00 71 F1 23 06 00 65
T 00 01 93 00 00 00 00 75 82 01 12 00 00 75
R 00 00 00 16 F1 23 03 00 68 02 0B 00 19
T 00 01 9C 00 00 00 04 75 00 00 00 01 75 82 05 12
R 00 00 00 16 F1 23 03 00 65 F1 23 08 00 68
T 00 01 A5 00 00 90 00 64 12 00 00 75
R 00 00 00 16 02 03 00 19 02 09 00 47
T 00 01 AE 00 00 01 00 00 00 75
R 00 00 00 16 F1 21 03 00 05 F1 01 06 00 17
T 00 01 B1 00 00 02 00 00 00 75
R 00 00 00 16 F1 21 03 00 05 F1 81 06 00 17
T 00 01 B4 00 00 03 80 75 00 00 04 05 75 82 2A 12
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 01 BD 00 32 75 00 00 01
R 00 00 00 16 00 03 00 16 F1 21 06 00 05
T 00 01 C1 00 00 00 75 00 00 02
R 00 00 00 16 F1 01 03 00 17 F1 21 07 00 05
T 00 01 C4 00 00 00 75 00 00 03 80 75
R 00 00 00 16 F1 81 03 00 17 F1 21 07 00 05
T 00 01 C9 00 00 04 05 75 82 30 12 00 32 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 D2 00 00 00 01 75 82 21 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 DB 00 00 00 01 75 82 22 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 E4 00 00 00 03 75 82 23 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 ED 00 00 00 1A 75 82 24 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 F6 00 00 00 4C 75 82 25 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 01 FF 00 00 00 0F 75 82 26 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 08 00 00 00 20 75 82 31 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 11 00 00 00 01 75 82 3C 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 1A 00 00 00 06 75 82 3D 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 23 00 00 00 0F 75 82 20 12 00 00 75 82 07
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 2E 12 00 96 85 82 00 00 00 75 82 27 12
R 00 00 00 16 00 04 00 16 F1 21 08 00 05
T 00 02 38 00 00 90 00 00 E4 F0 90
R 00 00 00 16 00 03 00 16 00 06 00 0A
T 00 02 40 00 01 F0 90 00 03 F0 22
R 00 00 00 16 00 03 00 0A 00 07 00 0A
T 00 02 48
R 00 00 00 16
T 00 02 48 75 00 00 09 A5 75 00 00 0A A5 75
R 00 00 00 16 F1 21 04 00 05 F1 21 09 00 05
T 00 02 4F 00 00 0B A5 75 00 00 0C A5 75
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 02 55 00 00 0D A5 75 00 00 01
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 02 59 00 00 09 75 00 00 02 00 75
R 00 00 00 16 F1 01 03 00 05 F1 21 07 00 05
T 00 02 5E 00 00 03 40 75 00 00 04 05 75 82 30 12
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 02 67 00 32 75 00 00 05
R 00 00 00 16 00 03 00 16 F1 21 06 00 05
T 00 02 6B 00 00 0E 75 00 00 06 00 75
R 00 00 00 16 F1 01 03 00 05 F1 21 07 00 05
T 00 02 70 00 00 07 40 75 00 00 08 05 75 82 10 12
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 02 79 00 C8 7F 00
R 00 00 00 16 00 03 00 16
T 00 02 7D
R 00 00 00 16
T 00 02 7D BF 05 00
R 00 00 00 16
T 00 02 80
R 00 00 00 16
T 00 02 80 50 12 EF 24 00 00 0E F9 87 06 BE A5 02
R 00 00 00 16 F1 01 07 00 05
T 00 02 8B 80 04
R 00 00 00 16
T 00 02 8D
R 00 00 00 16
T 00 02 8D 75 82 01 22
R 00 00 00 16
T 00 02 91
R 00 00 00 16
T 00 02 91 0F 80 E9
R 00 00 00 16
T 00 02 94
R 00 00 00 16
T 00 02 94 75 00 00 01 00 00 00 75
R 00 00 00 16 F1 21 04 00 05 F1 01 07 00 17
T 00 02 98 00 00 02 00 00 00 75
R 00 00 00 16 F1 21 03 00 05 F1 81 06 00 17
T 00 02 9B 00 00 03 80 75 00 00 04 05 75 82 30 12
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 02 A4 00 32 75 82 00 22
R 00 00 00 16 00 03 00 16
T 00 02 AA
R 00 00 00 16
T 00 02 AA E5 82 FF 24 82 50 02 7F 7D
R 00 00 00 16
T 00 02 B3
R 00 00 00 16
T 00 02 B3 8F 00 00 00 75 82 25 02 00 00
R 00 00 00 16 F1 21 04 00 05 00 0B 00 16
T 00 02 BB
R 00 00 00 16
T 00 02 BB AD 82 AE 83 AF F0 8D 00 00 01 8E
R 00 00 00 16 F1 21 0A 00 05
T 00 02 C4 00 00 02 8F 00 00 03 75
R 00 00 00 16 F1 21 03 00 05 F1 21 07 00 05
T 00 02 C8 00 00 04 05 75 82 2A C0 07 C0 06 C0 05
R 00 00 00 16 F1 21 03 00 05
T 00 02 D3 12 00 32 D0 05 D0 06 D0 07 8D 00 00 01
R 00 00 00 16 00 04 00 16 F1 21 0D 00 05
T 00 02 DE 8E 00 00 02 8F 00 00 03 75
R 00 00 00 16 F1 21 04 00 05 F1 21 08 00 05
T 00 02 E3 00 00 04 05 75 82 30 02 00 32
R 00 00 00 16 F1 21 03 00 05 00 0B 00 16
T 00 02 EB
R 00 00 00 16
T 00 02 EB 75 82 00 12 00 96 E5 82 54 7C 44 0F F5
R 00 00 00 16 00 07 00 16
T 00 02 F8 00 00 00 75 82 20 12 00 00 75
R 00 00 00 16 F1 21 03 00 05 00 0A 00 16
T 00 03 00 00 00 00 06 75 00 00 00 01 75 82 01 12
R 00 00 00 16 F1 23 03 00 65 F1 23 08 00 68
T 00 03 09 00 00 90 00 82 02 00 00
R 00 00 00 16 02 03 00 19 02 09 00 5E
T 00 03 11
R 00 00 00 16
T 00 03 11 75 82 07 12 00 96 E5 82 FF 30 E6 39 75
R 00 00 00 16 00 07 00 16
T 00 03 1E 00 00 05 00 00 04 75
R 00 00 00 16 F1 21 03 00 05 F1 01 06 00 0A
T 00 03 21 00 00 06 00 00 04 75
R 00 00 00 16 F1 21 03 00 05 F1 81 06 00 0A
T 00 03 24 00 00 07 00 75 00 00 08 20 75 82 61 C0
R 00 00 00 16 F1 21 03 00 05 F1 21 08 00 05
T 00 03 2D 07 12 00 C8 12 01 2F D0 07 8F
R 00 00 00 16 00 05 00 16 00 08 00 16
T 00 03 37 00 00 00 75 82 27 C0 07 12 00 00 D0 07
R 00 00 00 16 F1 21 03 00 05 00 0C 00 16
T 00 03 42 90 00 00 EF F0 90 00 01 E0 FF 0F 90
R 00 00 00 16 00 04 00 0A 00 09 00 0A
T 00 03 4E 00 01 EF F0 75 82 01 22
R 00 00 00 16 00 03 00 0A
T 00 03 56
R 00 00 00 16
T 00 03 56 75 82 00 22
R 00 00 00 16
T 00 03 5A
R 00 00 00 16
T 00 03 5A AD 82 AE 83 AF F0 75 00 00 00 04 75
R 00 00 00 16 F1 23 0A 00 65
T 00 03 64 00 00 00 00 75 82 05 C0 07 C0 06 C0 05
R 00 00 00 16 F1 23 03 00 68
T 00 03 6F 12 00 00 75 82 A8 12 00 00 D0 05 D0 06
R 00 00 00 16 02 04 00 19 02 0A 00 4B
T 00 03 7C D0 07 7C 00
R 00 00 00 16
T 00 03 80
R 00 00 00 16
T 00 03 80 BC 20 00
R 00 00 00 16
T 00 03 83
R 00 00 00 16
T 00 03 83 50 29 EC 2D F9 E4 3E FA 8F 03 89 82 8A
R 00 00 00 16
T 00 03 90 83 8B F0 12 00 00 F5 82 C0 07 C0 06 C0
R 00 00 00 16 02 07 00 6B
T 00 03 9D 05 C0 04 12 00 00 D0 04 D0 05 D0 06 D0
R 00 00 00 16 02 07 00 4B
T 00 03 AA 07 0C 80 D2
R 00 00 00 16
T 00 03 AE
R 00 00 00 16
T 00 03 AE 75 00 00 00 04 75 00 00 00 01 75 82 05
R 00 00 00 16 F1 23 04 00 65 F1 23 09 00 68
T 00 03 B7 02 00 00
R 00 00 00 16 02 04 00 19
T 00 03 BA
R 00 00 00 16
T 00 03 BA 75 82 07 12 00 96 AF 82 8F 00 00 00 75
R 00 00 00 16 00 07 00 16 F1 21 0C 00 05
T 00 03 C5 82 27 C0 07 12 00 00 D0 07 90 00 00 EF
R 00 00 00 16 00 08 00 16 00 0D 00 0A
T 00 03 D2 F0 EF 30 E6 0B 90 00 01 E0 FE 0E 90
R 00 00 00 16 00 09 00 0A
T 00 03 DE 00 01 EE F0
R 00 00 00 16 00 03 00 0A
T 00 03 E2
R 00 00 00 16
T 00 03 E2 EF 30 E4 03 02 01 4D
R 00 00 00 16 00 08 00 16
T 00 03 E9
R 00 00 00 16
T 00 03 E9 22
R 00 00 00 16
T 00 00 00
R 00 00 00 17
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 17
AliceRX_STC/build/nrf24l01.sym
+587
View File
@@ -0,0 +1,587 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
17 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
__gptrget ****** GX
__gptrput ****** GX
_delay_ms ****** GX
_delay_us ****** GX
A _g_nrf_status 000000 GR
_gpio_set_mode ****** GX
_gpio_set_mode_PARM_2 ****** GX
_gpio_set_mode_PARM_3 ****** GX
_gpio_write ****** GX
_gpio_write_PARM_2 ****** GX
_gpio_write_PARM_3 ****** GX
16 _nrf24_check 000248 GR
5 _nrf24_check_buf_65536_33 000009 R
5 _nrf24_check_rb_65536_33 00000E R
16 _nrf24_data_ready 000311 GR
16 _nrf24_init 00016B GR
16 _nrf24_irq_handler 0003BA GR
16 _nrf24_set_address 0002BB GR
16 _nrf24_set_channel 0002AA GR
16 _nrf24_set_rx_mode 0002EB GR
16 _nrf24_write_ack_payload 00035A GR
16 _nrf_flush_rx 00012F R
16 _nrf_flush_tx 00014D R
16 _nrf_r_buf 0000C8 R
5 _nrf_r_buf_PARM_2 000005 R
5 _nrf_r_buf_PARM_3 000008 R
16 _nrf_r_reg 000096 R
16 _nrf_w_buf 000032 R
5 _nrf_w_buf_PARM_2 000001 R
5 _nrf_w_buf_PARM_3 000004 R
16 _nrf_w_reg 000000 R
5 _nrf_w_reg_PARM_2 000000 R
_spi_transfer ****** GX
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 13 flags 0
6 ISEG size 0 flags 0
7 IABS size 0 flags 8
8 BSEG size 0 flags 80
9 PSEG size 0 flags 50
A XSEG size 24 flags 40
B XABS size 0 flags 48
C XISEG size 0 flags 40
D HOME size 0 flags 20
E GSINIT0 size 0 flags 20
F GSINIT1 size 0 flags 20
10 GSINIT2 size 0 flags 20
11 GSINIT3 size 0 flags 20
12 GSINIT4 size 0 flags 20
13 GSINIT5 size 0 flags 20
14 GSINIT size 0 flags 20
15 GSFINAL size 0 flags 20
16 CSEG size 3EA flags 20
17 CONST size 5 flags 20
18 XINIT size 0 flags 20
19 CABS size 0 flags 28
AliceRX_STC/build/pwm.asm
+805
View File
@@ -0,0 +1,805 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module pwm
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _pwm_tick_isr
.globl _gpio_write
.globl _gpio_set_mode
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _pwm_set_from_sbus_PARM_2
.globl _pwm_set_PARM_2
.globl _pwm_init
.globl _pwm_set
.globl _pwm_set_from_sbus
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; overlayable bit register bank
;--------------------------------------------------------
.area BIT_BANK (REL,OVR,DATA)
bits:
.ds 1
b0 = bits[0]
b1 = bits[1]
b2 = bits[2]
b3 = bits[3]
b4 = bits[4]
b5 = bits[5]
b6 = bits[6]
b7 = bits[7]
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_pwm_set_PARM_2:
.ds 2
_pwm_set_from_sbus_PARM_2:
.ds 2
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
_s_high_remain:
.ds 4
_s_period_cnt:
.ds 2
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_init'
;------------------------------------------------------------
;i Allocated to registers r7
;------------------------------------------------------------
; src/pwm.c:30: void pwm_init(void)
; -----------------------------------------
; function pwm_init
; -----------------------------------------
_pwm_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00102$:
; src/pwm.c:34: s_high_remain[i] = 1500 / PWM_UNIT_US; /* 默认 1500us 中位 */
mov a,r7
add a,#_s_high_remain
mov dpl,a
clr a
addc a,#(_s_high_remain >> 8)
mov dph,a
mov a,#0x4b
movx @dptr,a
; src/pwm.c:35: gpio_set_mode(CH_PORT[i], CH_BIT[i], GPIO_MODE_PUSHPULL);
mov a,r7
add a,#_CH_PORT
mov r5,a
clr a
addc a,#(_CH_PORT >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
clr a
movc a,@a+dptr
mov r4,a
mov a,r7
add a,#_CH_BIT
mov r2,a
clr a
addc a,#(_CH_BIT >> 8)
mov r3,a
mov dpl,r2
mov dph,r3
clr a
movc a,@a+dptr
mov _gpio_set_mode_PARM_2,a
mov _gpio_set_mode_PARM_3,#0x01
mov dpl,r4
push ar7
push ar6
push ar5
push ar3
push ar2
lcall _gpio_set_mode
pop ar2
pop ar3
pop ar5
pop ar6
; src/pwm.c:36: gpio_write(CH_PORT[i], CH_BIT[i], 0);
mov dpl,r5
mov dph,r6
clr a
movc a,@a+dptr
mov r5,a
mov dpl,r2
mov dph,r3
clr a
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x00
mov dpl,r5
lcall _gpio_write
pop ar7
; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00115$
00115$:
jc 00102$
; src/pwm.c:38: s_period_cnt = 0;
mov dptr,#_s_period_cnt
clr a
movx @dptr,a
inc dptr
movx @dptr,a
; src/pwm.c:41: TMOD &= 0xF0;
anl _TMOD,#0xf0
; src/pwm.c:42: TMOD |= 0x00; /* T0 模式 0 (16 位自动重载) */
mov _TMOD,_TMOD
; src/pwm.c:44: AUXR &= ~0x80; /* T0x12 = 0: 12T 模式 → 24MHz/12 = 2MHz */
anl _AUXR,#0x7f
; src/pwm.c:46: AUXR |= 0x80; /* T0x12 = 1: 1T 模式 → 24MHz */
orl _AUXR,#0x80
; src/pwm.c:49: TL0 = 0x40;
mov _TL0,#0x40
; src/pwm.c:50: TH0 = 0xFE;
mov _TH0,#0xfe
; src/pwm.c:52: ET0 = 1; /* 使能 T0 中断 */
; assignBit
setb _ET0
; src/pwm.c:53: TR0 = 1; /* 启动 T0 */
; assignBit
setb _TR0
; src/pwm.c:54: EA = 1;
; assignBit
setb _EA
; src/pwm.c:55: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_set'
;------------------------------------------------------------
;width_us Allocated with name '_pwm_set_PARM_2'
;ch Allocated to registers r7
;cnt Allocated to registers
;------------------------------------------------------------
; src/pwm.c:57: void pwm_set(uint8_t ch, uint16_t width_us)
; -----------------------------------------
; function pwm_set
; -----------------------------------------
_pwm_set:
mov r7,dpl
; src/pwm.c:59: if (ch >= CH_COUNT) return;
cjne r7,#0x04,00121$
00121$:
jc 00102$
ret
00102$:
; src/pwm.c:61: if (width_us < 800) width_us = 800;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
clr c
mov a,r5
subb a,#0x20
mov a,r6
subb a,#0x03
jnc 00104$
mov _pwm_set_PARM_2,#0x20
mov (_pwm_set_PARM_2 + 1),#0x03
00104$:
; src/pwm.c:62: if (width_us > 2200) width_us = 2200;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
clr c
mov a,#0x98
subb a,r5
mov a,#0x08
subb a,r6
jnc 00106$
mov _pwm_set_PARM_2,#0x98
mov (_pwm_set_PARM_2 + 1),#0x08
00106$:
; src/pwm.c:64: uint16_t cnt = (width_us + PWM_UNIT_US / 2) / PWM_UNIT_US;
mov r5,_pwm_set_PARM_2
mov r6,(_pwm_set_PARM_2 + 1)
mov a,#0x0a
add a,r5
mov dpl,a
clr a
addc a,r6
mov dph,a
mov __divuint_PARM_2,#0x14
mov (__divuint_PARM_2 + 1),#0x00
push ar7
lcall __divuint
mov r5,dpl
pop ar7
; src/pwm.c:65: CRITICAL(s_high_remain[ch] = cnt;);
; assignBit
clr _EA
mov a,r7
add a,#_s_high_remain
mov dpl,a
clr a
addc a,#(_s_high_remain >> 8)
mov dph,a
mov a,r5
movx @dptr,a
; assignBit
setb _EA
; src/pwm.c:66: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_set_from_sbus'
;------------------------------------------------------------
;sbus_val Allocated with name '_pwm_set_from_sbus_PARM_2'
;ch Allocated to registers r7
;offset Allocated to registers
;width Allocated to registers r3 r4
;------------------------------------------------------------
; src/pwm.c:68: void pwm_set_from_sbus(uint8_t ch, uint16_t sbus_val)
; -----------------------------------------
; function pwm_set_from_sbus
; -----------------------------------------
_pwm_set_from_sbus:
mov r7,dpl
; src/pwm.c:72: if (sbus_val < 172) sbus_val = 172;
mov r5,_pwm_set_from_sbus_PARM_2
mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
clr c
mov a,r5
subb a,#0xac
mov a,r6
subb a,#0x00
jnc 00102$
mov _pwm_set_from_sbus_PARM_2,#0xac
mov (_pwm_set_from_sbus_PARM_2 + 1),#0x00
00102$:
; src/pwm.c:73: if (sbus_val > 1811) sbus_val = 1811;
mov r5,_pwm_set_from_sbus_PARM_2
mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
clr c
mov a,#0x13
subb a,r5
mov a,#0x07
subb a,r6
jnc 00104$
mov _pwm_set_from_sbus_PARM_2,#0x13
mov (_pwm_set_from_sbus_PARM_2 + 1),#0x07
00104$:
; src/pwm.c:74: int32_t offset = (int32_t)sbus_val - 1024; /* -852..787 */
mov r3,_pwm_set_from_sbus_PARM_2
mov r4,(_pwm_set_from_sbus_PARM_2 + 1)
mov r5,#0x00
mov r6,#0x00
mov __mullong_PARM_2,r3
mov a,r4
add a,#0xfc
mov (__mullong_PARM_2 + 1),a
mov a,r5
addc a,#0xff
mov (__mullong_PARM_2 + 2),a
mov a,r6
addc a,#0xff
mov (__mullong_PARM_2 + 3),a
; src/pwm.c:76: uint16_t width = 1500 + (uint16_t)((offset * 1000) / 1024);
mov dptr,#0x03e8
clr a
mov b,a
push ar7
lcall __mullong
mov r3,dpl
mov r4,dph
mov r5,b
mov r6,a
clr a
mov __divslong_PARM_2,a
mov (__divslong_PARM_2 + 1),#0x04
mov (__divslong_PARM_2 + 2),a
mov (__divslong_PARM_2 + 3),a
mov dpl,r3
mov dph,r4
mov b,r5
mov a,r6
lcall __divslong
mov r3,dpl
mov r4,dph
pop ar7
mov a,#0xdc
add a,r3
mov r3,a
mov a,#0x05
addc a,r4
mov r4,a
; src/pwm.c:77: if (width < 800) width = 800;
mov ar5,r3
mov ar6,r4
clr c
mov a,r5
subb a,#0x20
mov a,r6
subb a,#0x03
jnc 00106$
mov r3,#0x20
mov r4,#0x03
00106$:
; src/pwm.c:78: if (width > 2200) width = 2200;
mov ar5,r3
mov ar6,r4
clr c
mov a,#0x98
subb a,r5
mov a,#0x08
subb a,r6
jnc 00108$
mov r3,#0x98
mov r4,#0x08
00108$:
; src/pwm.c:79: pwm_set(ch, width);
mov _pwm_set_PARM_2,r3
mov (_pwm_set_PARM_2 + 1),r4
mov dpl,r7
; src/pwm.c:80: }
ljmp _pwm_set
;------------------------------------------------------------
;Allocation info for local variables in function 'pwm_tick_isr'
;------------------------------------------------------------
;i Allocated to registers r7
;------------------------------------------------------------
; src/pwm.c:83: void pwm_tick_isr(void) __interrupt (INT_ADDR_T0)
; -----------------------------------------
; function pwm_tick_isr
; -----------------------------------------
_pwm_tick_isr:
push bits
push acc
push b
push dpl
push dph
push (0+7)
push (0+6)
push (0+5)
push (0+4)
push (0+3)
push (0+2)
push (0+1)
push (0+0)
push psw
mov psw,#0x00
; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00109$:
; src/pwm.c:89: if (s_high_remain[i] > 0) {
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
jz 00110$
; src/pwm.c:90: s_high_remain[i]--;
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
mov r4,a
dec r4
mov dpl,r5
mov dph,r6
mov a,r4
movx @dptr,a
; src/pwm.c:91: if (s_high_remain[i] == 0) {
mov a,r7
add a,#_s_high_remain
mov r5,a
clr a
addc a,#(_s_high_remain >> 8)
mov r6,a
mov dpl,r5
mov dph,r6
movx a,@dptr
jnz 00110$
; src/pwm.c:92: gpio_write(CH_PORT[i], CH_BIT[i], 0); /* 拉低 */
mov a,r7
mov dptr,#_CH_PORT
movc a,@a+dptr
mov r6,a
mov a,r7
mov dptr,#_CH_BIT
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x00
mov dpl,r6
push ar7
lcall _gpio_write
pop ar7
00110$:
; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00143$
00143$:
jc 00109$
; src/pwm.c:97: s_period_cnt++;
mov dptr,#_s_period_cnt
movx a,@dptr
mov r6,a
inc dptr
movx a,@dptr
mov r7,a
mov dptr,#_s_period_cnt
mov a,#0x01
add a,r6
movx @dptr,a
clr a
addc a,r7
inc dptr
movx @dptr,a
; src/pwm.c:98: if (s_period_cnt >= PWM_PERIOD_COUNT) {
mov dptr,#_s_period_cnt
movx a,@dptr
mov r6,a
inc dptr
movx a,@dptr
mov r7,a
clr c
mov a,r6
subb a,#0xe8
mov a,r7
subb a,#0x03
jc 00113$
; src/pwm.c:99: s_period_cnt = 0;
mov dptr,#_s_period_cnt
clr a
movx @dptr,a
inc dptr
movx @dptr,a
; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
mov r7,#0x00
00111$:
; src/pwm.c:102: gpio_write(CH_PORT[i], CH_BIT[i], 1);
mov a,r7
mov dptr,#_CH_PORT
movc a,@a+dptr
mov r6,a
mov a,r7
mov dptr,#_CH_BIT
movc a,@a+dptr
mov _gpio_write_PARM_2,a
mov _gpio_write_PARM_3,#0x01
mov dpl,r6
push ar7
lcall _gpio_write
pop ar7
; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
inc r7
cjne r7,#0x04,00146$
00146$:
jc 00111$
00113$:
; src/pwm.c:105: }
pop psw
pop (0+0)
pop (0+1)
pop (0+2)
pop (0+3)
pop (0+4)
pop (0+5)
pop (0+6)
pop (0+7)
pop dph
pop dpl
pop b
pop acc
pop bits
reti
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
_CH_PORT:
.db #0x03 ; 3
.db #0x03 ; 3
.db #0x03 ; 3
.db #0x03 ; 3
_CH_BIT:
.db #0x07 ; 7
.db #0x06 ; 6
.db #0x05 ; 5
.db #0x04 ; 4
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/pwm.lst
+805
View File
@@ -0,0 +1,805 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module pwm
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _pwm_tick_isr
12 .globl _gpio_write
13 .globl _gpio_set_mode
14 .globl _EADC
15 .globl _ET1
16 .globl _ET0
17 .globl _ES
18 .globl _EA
19 .globl _REN
20 .globl _RI
21 .globl _TI
22 .globl _TR1
23 .globl _TF1
24 .globl _IT0
25 .globl _IE0
26 .globl _TR0
27 .globl _TF0
28 .globl _CMPCR2
29 .globl _CMPCR1
30 .globl _TA
31 .globl _IRCBAND_REG
32 .globl _IAP_TPS
33 .globl _IAP_CONTR
34 .globl _IAP_TRIG
35 .globl _IAP_CMD
36 .globl _IAP_ADDRL
37 .globl _IAP_ADDRH
38 .globl _IAP_DATA
39 .globl _WDT_CONTR
40 .globl _PCA_PWM3
41 .globl _PCA_PWM2
42 .globl _PCA_PWM1
43 .globl _PCA_PWM0
44 .globl _CCAP3L
45 .globl _CCAP2L
46 .globl _CCAP1L
47 .globl _CCAP0L
48 .globl _CCAPM3
49 .globl _CCAPM2
50 .globl _CCAPM1
51 .globl _CCAPM0
52 .globl _CMOD
53 .globl _CCON
54 .globl _ADCTIM_X
55 .globl _ADCCFG
56 .globl _ADC_RESL
57 .globl _ADC_RES
58 .globl _ADC_CONTR
59 .globl _SPDAT
60 .globl _SPCTL
61 .globl _SPSTAT
62 .globl _IP2H
63 .globl _IP2
64 .globl _IP
65 .globl _IE2
66 .globl _IE
67 .globl _BRT
68 .globl _P_SW1
69 .globl _SADEN
70 .globl _SADDR
71 .globl _S2BUF
72 .globl _S2CON
73 .globl _SBUF
74 .globl _SCON
75 .globl _TM4PS_X
76 .globl _TM3PS_X
77 .globl _TM2PS_X
78 .globl _T4T3M
79 .globl _T4L
80 .globl _T4H
81 .globl _T3L
82 .globl _T3H
83 .globl _T2L
84 .globl _T2H
85 .globl _INTCLKO
86 .globl _AUXR
87 .globl _TH1
88 .globl _TH0
89 .globl _TL1
90 .globl _TL0
91 .globl _TMOD
92 .globl _TCON
93 .globl _P_SW2
94 .globl _P5M0
95 .globl _P5M1
96 .globl _P4M0
97 .globl _P4M1
98 .globl _P3M0
99 .globl _P3M1
100 .globl _P2M0
101 .globl _P2M1
102 .globl _P1M0
103 .globl _P1M1
104 .globl _P0M0
105 .globl _P0M1
106 .globl _PSW
107 .globl _B
108 .globl _ACC
109 .globl _PCON
110 .globl _DPH
111 .globl _DPL
112 .globl _SP
113 .globl _P5
114 .globl _P4
115 .globl _P3
116 .globl _P2
117 .globl _P1
118 .globl _P0
119 .globl _pwm_set_from_sbus_PARM_2
120 .globl _pwm_set_PARM_2
121 .globl _pwm_init
122 .globl _pwm_set
123 .globl _pwm_set_from_sbus
124 ;--------------------------------------------------------
125 ; special function registers
126 ;--------------------------------------------------------
127 .area RSEG (ABS,DATA)
000000 128 .org 0x0000
000080 129 _P0 = 0x0080
000090 130 _P1 = 0x0090
0000A0 131 _P2 = 0x00a0
0000B0 132 _P3 = 0x00b0
0000C0 133 _P4 = 0x00c0
0000C8 134 _P5 = 0x00c8
000081 135 _SP = 0x0081
000082 136 _DPL = 0x0082
000083 137 _DPH = 0x0083
000087 138 _PCON = 0x0087
0000E0 139 _ACC = 0x00e0
0000F0 140 _B = 0x00f0
0000D0 141 _PSW = 0x00d0
000093 142 _P0M1 = 0x0093
000094 143 _P0M0 = 0x0094
000091 144 _P1M1 = 0x0091
000092 145 _P1M0 = 0x0092
000095 146 _P2M1 = 0x0095
000096 147 _P2M0 = 0x0096
0000B1 148 _P3M1 = 0x00b1
0000B2 149 _P3M0 = 0x00b2
0000B3 150 _P4M1 = 0x00b3
0000B4 151 _P4M0 = 0x00b4
0000C9 152 _P5M1 = 0x00c9
0000CA 153 _P5M0 = 0x00ca
0000BA 154 _P_SW2 = 0x00ba
000088 155 _TCON = 0x0088
000089 156 _TMOD = 0x0089
00008A 157 _TL0 = 0x008a
00008B 158 _TL1 = 0x008b
00008C 159 _TH0 = 0x008c
00008D 160 _TH1 = 0x008d
00008E 161 _AUXR = 0x008e
00008F 162 _INTCLKO = 0x008f
0000D6 163 _T2H = 0x00d6
0000D7 164 _T2L = 0x00d7
0000D4 165 _T3H = 0x00d4
0000D5 166 _T3L = 0x00d5
0000D2 167 _T4H = 0x00d2
0000D3 168 _T4L = 0x00d3
0000D1 169 _T4T3M = 0x00d1
00FEA1 170 _TM2PS_X = 0xfea1
00FEA2 171 _TM3PS_X = 0xfea2
00FEA3 172 _TM4PS_X = 0xfea3
000098 173 _SCON = 0x0098
000099 174 _SBUF = 0x0099
00009A 175 _S2CON = 0x009a
00009B 176 _S2BUF = 0x009b
0000A9 177 _SADDR = 0x00a9
0000B9 178 _SADEN = 0x00b9
0000A2 179 _P_SW1 = 0x00a2
00009C 180 _BRT = 0x009c
0000A8 181 _IE = 0x00a8
0000AF 182 _IE2 = 0x00af
0000B8 183 _IP = 0x00b8
0000B6 184 _IP2 = 0x00b6
0000B7 185 _IP2H = 0x00b7
0000CD 186 _SPSTAT = 0x00cd
0000CE 187 _SPCTL = 0x00ce
0000CF 188 _SPDAT = 0x00cf
0000BC 189 _ADC_CONTR = 0x00bc
0000BD 190 _ADC_RES = 0x00bd
0000BE 191 _ADC_RESL = 0x00be
0000DE 192 _ADCCFG = 0x00de
00FEA8 193 _ADCTIM_X = 0xfea8
0000D8 194 _CCON = 0x00d8
0000D9 195 _CMOD = 0x00d9
0000DA 196 _CCAPM0 = 0x00da
0000DB 197 _CCAPM1 = 0x00db
0000DC 198 _CCAPM2 = 0x00dc
0000DD 199 _CCAPM3 = 0x00dd
0000EA 200 _CCAP0L = 0x00ea
0000EB 201 _CCAP1L = 0x00eb
0000EC 202 _CCAP2L = 0x00ec
0000ED 203 _CCAP3L = 0x00ed
0000F2 204 _PCA_PWM0 = 0x00f2
0000F3 205 _PCA_PWM1 = 0x00f3
0000F4 206 _PCA_PWM2 = 0x00f4
0000F5 207 _PCA_PWM3 = 0x00f5
0000C1 208 _WDT_CONTR = 0x00c1
0000C2 209 _IAP_DATA = 0x00c2
0000C3 210 _IAP_ADDRH = 0x00c3
0000C4 211 _IAP_ADDRL = 0x00c4
0000C5 212 _IAP_CMD = 0x00c5
0000C6 213 _IAP_TRIG = 0x00c6
0000C7 214 _IAP_CONTR = 0x00c7
0000F7 215 _IAP_TPS = 0x00f7
00009D 216 _IRCBAND_REG = 0x009d
0000AE 217 _TA = 0x00ae
0000E6 218 _CMPCR1 = 0x00e6
0000E7 219 _CMPCR2 = 0x00e7
220 ;--------------------------------------------------------
221 ; special function bits
222 ;--------------------------------------------------------
223 .area RSEG (ABS,DATA)
000000 224 .org 0x0000
00008D 225 _TF0 = 0x008d
00008C 226 _TR0 = 0x008c
000089 227 _IE0 = 0x0089
000088 228 _IT0 = 0x0088
00008F 229 _TF1 = 0x008f
00008E 230 _TR1 = 0x008e
000099 231 _TI = 0x0099
000098 232 _RI = 0x0098
00009C 233 _REN = 0x009c
0000AF 234 _EA = 0x00af
0000AC 235 _ES = 0x00ac
0000A9 236 _ET0 = 0x00a9
0000AB 237 _ET1 = 0x00ab
0000AD 238 _EADC = 0x00ad
239 ;--------------------------------------------------------
240 ; overlayable register banks
241 ;--------------------------------------------------------
242 .area REG_BANK_0 (REL,OVR,DATA)
000000 243 .ds 8
244 ;--------------------------------------------------------
245 ; overlayable bit register bank
246 ;--------------------------------------------------------
247 .area BIT_BANK (REL,OVR,DATA)
000000 248 bits:
000000 249 .ds 1
008000 250 b0 = bits[0]
008100 251 b1 = bits[1]
008200 252 b2 = bits[2]
008300 253 b3 = bits[3]
008400 254 b4 = bits[4]
008500 255 b5 = bits[5]
008600 256 b6 = bits[6]
008700 257 b7 = bits[7]
258 ;--------------------------------------------------------
259 ; internal ram data
260 ;--------------------------------------------------------
261 .area DSEG (DATA)
000000 262 _pwm_set_PARM_2:
000000 263 .ds 2
000002 264 _pwm_set_from_sbus_PARM_2:
000002 265 .ds 2
266 ;--------------------------------------------------------
267 ; overlayable items in internal ram
268 ;--------------------------------------------------------
269 ;--------------------------------------------------------
270 ; indirectly addressable internal ram data
271 ;--------------------------------------------------------
272 .area ISEG (DATA)
273 ;--------------------------------------------------------
274 ; absolute internal ram data
275 ;--------------------------------------------------------
276 .area IABS (ABS,DATA)
277 .area IABS (ABS,DATA)
278 ;--------------------------------------------------------
279 ; bit data
280 ;--------------------------------------------------------
281 .area BSEG (BIT)
282 ;--------------------------------------------------------
283 ; paged external ram data
284 ;--------------------------------------------------------
285 .area PSEG (PAG,XDATA)
286 ;--------------------------------------------------------
287 ; external ram data
288 ;--------------------------------------------------------
289 .area XSEG (XDATA)
000000 290 _s_high_remain:
000000 291 .ds 4
000004 292 _s_period_cnt:
000004 293 .ds 2
294 ;--------------------------------------------------------
295 ; absolute external ram data
296 ;--------------------------------------------------------
297 .area XABS (ABS,XDATA)
298 ;--------------------------------------------------------
299 ; external initialized ram data
300 ;--------------------------------------------------------
301 .area XISEG (XDATA)
302 .area HOME (CODE)
303 .area GSINIT0 (CODE)
304 .area GSINIT1 (CODE)
305 .area GSINIT2 (CODE)
306 .area GSINIT3 (CODE)
307 .area GSINIT4 (CODE)
308 .area GSINIT5 (CODE)
309 .area GSINIT (CODE)
310 .area GSFINAL (CODE)
311 .area CSEG (CODE)
312 ;--------------------------------------------------------
313 ; global & static initialisations
314 ;--------------------------------------------------------
315 .area HOME (CODE)
316 .area GSINIT (CODE)
317 .area GSFINAL (CODE)
318 .area GSINIT (CODE)
319 ;--------------------------------------------------------
320 ; Home
321 ;--------------------------------------------------------
322 .area HOME (CODE)
323 .area HOME (CODE)
324 ;--------------------------------------------------------
325 ; code
326 ;--------------------------------------------------------
327 .area CSEG (CODE)
328 ;------------------------------------------------------------
329 ;Allocation info for local variables in function 'pwm_init'
330 ;------------------------------------------------------------
331 ;i Allocated to registers r7
332 ;------------------------------------------------------------
333 ; src/pwm.c:30: void pwm_init(void)
334 ; -----------------------------------------
335 ; function pwm_init
336 ; -----------------------------------------
000000 337 _pwm_init:
000007 338 ar7 = 0x07
000006 339 ar6 = 0x06
000005 340 ar5 = 0x05
000004 341 ar4 = 0x04
000003 342 ar3 = 0x03
000002 343 ar2 = 0x02
000001 344 ar1 = 0x01
000000 345 ar0 = 0x00
346 ; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
000000 7F 00 [12] 347 mov r7,#0x00
000002 348 00102$:
349 ; src/pwm.c:34: s_high_remain[i] = 1500 / PWM_UNIT_US; /* 默认 1500us 中位 */
000002 EF [12] 350 mov a,r7
000003 24r00 [12] 351 add a,#_s_high_remain
000005 F5 82 [12] 352 mov dpl,a
000007 E4 [12] 353 clr a
000008 34s00 [12] 354 addc a,#(_s_high_remain >> 8)
00000A F5 83 [12] 355 mov dph,a
00000C 74 4B [12] 356 mov a,#0x4b
00000E F0 [24] 357 movx @dptr,a
358 ; src/pwm.c:35: gpio_set_mode(CH_PORT[i], CH_BIT[i], GPIO_MODE_PUSHPULL);
00000F EF [12] 359 mov a,r7
000010 24r05 [12] 360 add a,#_CH_PORT
000012 FD [12] 361 mov r5,a
000013 E4 [12] 362 clr a
000014 34s00 [12] 363 addc a,#(_CH_PORT >> 8)
000016 FE [12] 364 mov r6,a
000017 8D 82 [24] 365 mov dpl,r5
000019 8E 83 [24] 366 mov dph,r6
00001B E4 [12] 367 clr a
00001C 93 [24] 368 movc a,@a+dptr
00001D FC [12] 369 mov r4,a
00001E EF [12] 370 mov a,r7
00001F 24r09 [12] 371 add a,#_CH_BIT
000021 FA [12] 372 mov r2,a
000022 E4 [12] 373 clr a
000023 34s00 [12] 374 addc a,#(_CH_BIT >> 8)
000025 FB [12] 375 mov r3,a
000026 8A 82 [24] 376 mov dpl,r2
000028 8B 83 [24] 377 mov dph,r3
00002A E4 [12] 378 clr a
00002B 93 [24] 379 movc a,@a+dptr
00002C F5*00 [12] 380 mov _gpio_set_mode_PARM_2,a
00002E 75*00 01 [24] 381 mov _gpio_set_mode_PARM_3,#0x01
000031 8C 82 [24] 382 mov dpl,r4
000033 C0 07 [24] 383 push ar7
000035 C0 06 [24] 384 push ar6
000037 C0 05 [24] 385 push ar5
000039 C0 03 [24] 386 push ar3
00003B C0 02 [24] 387 push ar2
00003D 12r00r00 [24] 388 lcall _gpio_set_mode
000040 D0 02 [24] 389 pop ar2
000042 D0 03 [24] 390 pop ar3
000044 D0 05 [24] 391 pop ar5
000046 D0 06 [24] 392 pop ar6
393 ; src/pwm.c:36: gpio_write(CH_PORT[i], CH_BIT[i], 0);
000048 8D 82 [24] 394 mov dpl,r5
00004A 8E 83 [24] 395 mov dph,r6
00004C E4 [12] 396 clr a
00004D 93 [24] 397 movc a,@a+dptr
00004E FD [12] 398 mov r5,a
00004F 8A 82 [24] 399 mov dpl,r2
000051 8B 83 [24] 400 mov dph,r3
000053 E4 [12] 401 clr a
000054 93 [24] 402 movc a,@a+dptr
000055 F5*00 [12] 403 mov _gpio_write_PARM_2,a
000057 75*00 00 [24] 404 mov _gpio_write_PARM_3,#0x00
00005A 8D 82 [24] 405 mov dpl,r5
00005C 12r00r00 [24] 406 lcall _gpio_write
00005F D0 07 [24] 407 pop ar7
408 ; src/pwm.c:33: for (i = 0; i < CH_COUNT; i++) {
000061 0F [12] 409 inc r7
000062 BF 04 00 [24] 410 cjne r7,#0x04,00115$
000065 411 00115$:
000065 40 9B [24] 412 jc 00102$
413 ; src/pwm.c:38: s_period_cnt = 0;
000067 90r00r04 [24] 414 mov dptr,#_s_period_cnt
00006A E4 [12] 415 clr a
00006B F0 [24] 416 movx @dptr,a
00006C A3 [24] 417 inc dptr
00006D F0 [24] 418 movx @dptr,a
419 ; src/pwm.c:41: TMOD &= 0xF0;
00006E 53 89 F0 [24] 420 anl _TMOD,#0xf0
421 ; src/pwm.c:42: TMOD |= 0x00; /* T0 模式 0 (16 位自动重载) */
000071 85 89 89 [24] 422 mov _TMOD,_TMOD
423 ; src/pwm.c:44: AUXR &= ~0x80; /* T0x12 = 0: 12T 模式 → 24MHz/12 = 2MHz */
000074 53 8E 7F [24] 424 anl _AUXR,#0x7f
425 ; src/pwm.c:46: AUXR |= 0x80; /* T0x12 = 1: 1T 模式 → 24MHz */
000077 43 8E 80 [24] 426 orl _AUXR,#0x80
427 ; src/pwm.c:49: TL0 = 0x40;
00007A 75 8A 40 [24] 428 mov _TL0,#0x40
429 ; src/pwm.c:50: TH0 = 0xFE;
00007D 75 8C FE [24] 430 mov _TH0,#0xfe
431 ; src/pwm.c:52: ET0 = 1; /* 使能 T0 中断 */
432 ; assignBit
000080 D2 A9 [12] 433 setb _ET0
434 ; src/pwm.c:53: TR0 = 1; /* 启动 T0 */
435 ; assignBit
000082 D2 8C [12] 436 setb _TR0
437 ; src/pwm.c:54: EA = 1;
438 ; assignBit
000084 D2 AF [12] 439 setb _EA
440 ; src/pwm.c:55: }
000086 22 [24] 441 ret
442 ;------------------------------------------------------------
443 ;Allocation info for local variables in function 'pwm_set'
444 ;------------------------------------------------------------
445 ;width_us Allocated with name '_pwm_set_PARM_2'
446 ;ch Allocated to registers r7
447 ;cnt Allocated to registers
448 ;------------------------------------------------------------
449 ; src/pwm.c:57: void pwm_set(uint8_t ch, uint16_t width_us)
450 ; -----------------------------------------
451 ; function pwm_set
452 ; -----------------------------------------
000087 453 _pwm_set:
000087 AF 82 [24] 454 mov r7,dpl
455 ; src/pwm.c:59: if (ch >= CH_COUNT) return;
000089 BF 04 00 [24] 456 cjne r7,#0x04,00121$
00008C 457 00121$:
00008C 40 01 [24] 458 jc 00102$
00008E 22 [24] 459 ret
00008F 460 00102$:
461 ; src/pwm.c:61: if (width_us < 800) width_us = 800;
00008F AD*00 [24] 462 mov r5,_pwm_set_PARM_2
000091 AE*01 [24] 463 mov r6,(_pwm_set_PARM_2 + 1)
000093 C3 [12] 464 clr c
000094 ED [12] 465 mov a,r5
000095 94 20 [12] 466 subb a,#0x20
000097 EE [12] 467 mov a,r6
000098 94 03 [12] 468 subb a,#0x03
00009A 50 06 [24] 469 jnc 00104$
00009C 75*00 20 [24] 470 mov _pwm_set_PARM_2,#0x20
00009F 75*01 03 [24] 471 mov (_pwm_set_PARM_2 + 1),#0x03
0000A2 472 00104$:
473 ; src/pwm.c:62: if (width_us > 2200) width_us = 2200;
0000A2 AD*00 [24] 474 mov r5,_pwm_set_PARM_2
0000A4 AE*01 [24] 475 mov r6,(_pwm_set_PARM_2 + 1)
0000A6 C3 [12] 476 clr c
0000A7 74 98 [12] 477 mov a,#0x98
0000A9 9D [12] 478 subb a,r5
0000AA 74 08 [12] 479 mov a,#0x08
0000AC 9E [12] 480 subb a,r6
0000AD 50 06 [24] 481 jnc 00106$
0000AF 75*00 98 [24] 482 mov _pwm_set_PARM_2,#0x98
0000B2 75*01 08 [24] 483 mov (_pwm_set_PARM_2 + 1),#0x08
0000B5 484 00106$:
485 ; src/pwm.c:64: uint16_t cnt = (width_us + PWM_UNIT_US / 2) / PWM_UNIT_US;
0000B5 AD*00 [24] 486 mov r5,_pwm_set_PARM_2
0000B7 AE*01 [24] 487 mov r6,(_pwm_set_PARM_2 + 1)
0000B9 74 0A [12] 488 mov a,#0x0a
0000BB 2D [12] 489 add a,r5
0000BC F5 82 [12] 490 mov dpl,a
0000BE E4 [12] 491 clr a
0000BF 3E [12] 492 addc a,r6
0000C0 F5 83 [12] 493 mov dph,a
0000C2 75*00 14 [24] 494 mov __divuint_PARM_2,#0x14
0000C5 75*01 00 [24] 495 mov (__divuint_PARM_2 + 1),#0x00
0000C8 C0 07 [24] 496 push ar7
0000CA 12r00r00 [24] 497 lcall __divuint
0000CD AD 82 [24] 498 mov r5,dpl
0000CF D0 07 [24] 499 pop ar7
500 ; src/pwm.c:65: CRITICAL(s_high_remain[ch] = cnt;);
501 ; assignBit
0000D1 C2 AF [12] 502 clr _EA
0000D3 EF [12] 503 mov a,r7
0000D4 24r00 [12] 504 add a,#_s_high_remain
0000D6 F5 82 [12] 505 mov dpl,a
0000D8 E4 [12] 506 clr a
0000D9 34s00 [12] 507 addc a,#(_s_high_remain >> 8)
0000DB F5 83 [12] 508 mov dph,a
0000DD ED [12] 509 mov a,r5
0000DE F0 [24] 510 movx @dptr,a
511 ; assignBit
0000DF D2 AF [12] 512 setb _EA
513 ; src/pwm.c:66: }
0000E1 22 [24] 514 ret
515 ;------------------------------------------------------------
516 ;Allocation info for local variables in function 'pwm_set_from_sbus'
517 ;------------------------------------------------------------
518 ;sbus_val Allocated with name '_pwm_set_from_sbus_PARM_2'
519 ;ch Allocated to registers r7
520 ;offset Allocated to registers
521 ;width Allocated to registers r3 r4
522 ;------------------------------------------------------------
523 ; src/pwm.c:68: void pwm_set_from_sbus(uint8_t ch, uint16_t sbus_val)
524 ; -----------------------------------------
525 ; function pwm_set_from_sbus
526 ; -----------------------------------------
0000E2 527 _pwm_set_from_sbus:
0000E2 AF 82 [24] 528 mov r7,dpl
529 ; src/pwm.c:72: if (sbus_val < 172) sbus_val = 172;
0000E4 AD*02 [24] 530 mov r5,_pwm_set_from_sbus_PARM_2
0000E6 AE*03 [24] 531 mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
0000E8 C3 [12] 532 clr c
0000E9 ED [12] 533 mov a,r5
0000EA 94 AC [12] 534 subb a,#0xac
0000EC EE [12] 535 mov a,r6
0000ED 94 00 [12] 536 subb a,#0x00
0000EF 50 06 [24] 537 jnc 00102$
0000F1 75*02 AC [24] 538 mov _pwm_set_from_sbus_PARM_2,#0xac
0000F4 75*03 00 [24] 539 mov (_pwm_set_from_sbus_PARM_2 + 1),#0x00
0000F7 540 00102$:
541 ; src/pwm.c:73: if (sbus_val > 1811) sbus_val = 1811;
0000F7 AD*02 [24] 542 mov r5,_pwm_set_from_sbus_PARM_2
0000F9 AE*03 [24] 543 mov r6,(_pwm_set_from_sbus_PARM_2 + 1)
0000FB C3 [12] 544 clr c
0000FC 74 13 [12] 545 mov a,#0x13
0000FE 9D [12] 546 subb a,r5
0000FF 74 07 [12] 547 mov a,#0x07
000101 9E [12] 548 subb a,r6
000102 50 06 [24] 549 jnc 00104$
000104 75*02 13 [24] 550 mov _pwm_set_from_sbus_PARM_2,#0x13
000107 75*03 07 [24] 551 mov (_pwm_set_from_sbus_PARM_2 + 1),#0x07
00010A 552 00104$:
553 ; src/pwm.c:74: int32_t offset = (int32_t)sbus_val - 1024; /* -852..787 */
00010A AB*02 [24] 554 mov r3,_pwm_set_from_sbus_PARM_2
00010C AC*03 [24] 555 mov r4,(_pwm_set_from_sbus_PARM_2 + 1)
00010E 7D 00 [12] 556 mov r5,#0x00
000110 7E 00 [12] 557 mov r6,#0x00
000112 8B*00 [24] 558 mov __mullong_PARM_2,r3
000114 EC [12] 559 mov a,r4
000115 24 FC [12] 560 add a,#0xfc
000117 F5*01 [12] 561 mov (__mullong_PARM_2 + 1),a
000119 ED [12] 562 mov a,r5
00011A 34 FF [12] 563 addc a,#0xff
00011C F5*02 [12] 564 mov (__mullong_PARM_2 + 2),a
00011E EE [12] 565 mov a,r6
00011F 34 FF [12] 566 addc a,#0xff
000121 F5*03 [12] 567 mov (__mullong_PARM_2 + 3),a
568 ; src/pwm.c:76: uint16_t width = 1500 + (uint16_t)((offset * 1000) / 1024);
000123 90 03 E8 [24] 569 mov dptr,#0x03e8
000126 E4 [12] 570 clr a
000127 F5 F0 [12] 571 mov b,a
000129 C0 07 [24] 572 push ar7
00012B 12r00r00 [24] 573 lcall __mullong
00012E AB 82 [24] 574 mov r3,dpl
000130 AC 83 [24] 575 mov r4,dph
000132 AD F0 [24] 576 mov r5,b
000134 FE [12] 577 mov r6,a
000135 E4 [12] 578 clr a
000136 F5*00 [12] 579 mov __divslong_PARM_2,a
000138 75*01 04 [24] 580 mov (__divslong_PARM_2 + 1),#0x04
00013B F5*02 [12] 581 mov (__divslong_PARM_2 + 2),a
00013D F5*03 [12] 582 mov (__divslong_PARM_2 + 3),a
00013F 8B 82 [24] 583 mov dpl,r3
000141 8C 83 [24] 584 mov dph,r4
000143 8D F0 [24] 585 mov b,r5
000145 EE [12] 586 mov a,r6
000146 12r00r00 [24] 587 lcall __divslong
000149 AB 82 [24] 588 mov r3,dpl
00014B AC 83 [24] 589 mov r4,dph
00014D D0 07 [24] 590 pop ar7
00014F 74 DC [12] 591 mov a,#0xdc
000151 2B [12] 592 add a,r3
000152 FB [12] 593 mov r3,a
000153 74 05 [12] 594 mov a,#0x05
000155 3C [12] 595 addc a,r4
000156 FC [12] 596 mov r4,a
597 ; src/pwm.c:77: if (width < 800) width = 800;
000157 8B 05 [24] 598 mov ar5,r3
000159 8C 06 [24] 599 mov ar6,r4
00015B C3 [12] 600 clr c
00015C ED [12] 601 mov a,r5
00015D 94 20 [12] 602 subb a,#0x20
00015F EE [12] 603 mov a,r6
000160 94 03 [12] 604 subb a,#0x03
000162 50 04 [24] 605 jnc 00106$
000164 7B 20 [12] 606 mov r3,#0x20
000166 7C 03 [12] 607 mov r4,#0x03
000168 608 00106$:
609 ; src/pwm.c:78: if (width > 2200) width = 2200;
000168 8B 05 [24] 610 mov ar5,r3
00016A 8C 06 [24] 611 mov ar6,r4
00016C C3 [12] 612 clr c
00016D 74 98 [12] 613 mov a,#0x98
00016F 9D [12] 614 subb a,r5
000170 74 08 [12] 615 mov a,#0x08
000172 9E [12] 616 subb a,r6
000173 50 04 [24] 617 jnc 00108$
000175 7B 98 [12] 618 mov r3,#0x98
000177 7C 08 [12] 619 mov r4,#0x08
000179 620 00108$:
621 ; src/pwm.c:79: pwm_set(ch, width);
000179 8B*00 [24] 622 mov _pwm_set_PARM_2,r3
00017B 8C*01 [24] 623 mov (_pwm_set_PARM_2 + 1),r4
00017D 8F 82 [24] 624 mov dpl,r7
625 ; src/pwm.c:80: }
00017F 02r00r87 [24] 626 ljmp _pwm_set
627 ;------------------------------------------------------------
628 ;Allocation info for local variables in function 'pwm_tick_isr'
629 ;------------------------------------------------------------
630 ;i Allocated to registers r7
631 ;------------------------------------------------------------
632 ; src/pwm.c:83: void pwm_tick_isr(void) __interrupt (INT_ADDR_T0)
633 ; -----------------------------------------
634 ; function pwm_tick_isr
635 ; -----------------------------------------
000182 636 _pwm_tick_isr:
000182 C0*00 [24] 637 push bits
000184 C0 E0 [24] 638 push acc
000186 C0 F0 [24] 639 push b
000188 C0 82 [24] 640 push dpl
00018A C0 83 [24] 641 push dph
00018C C0 07 [24] 642 push (0+7)
00018E C0 06 [24] 643 push (0+6)
000190 C0 05 [24] 644 push (0+5)
000192 C0 04 [24] 645 push (0+4)
000194 C0 03 [24] 646 push (0+3)
000196 C0 02 [24] 647 push (0+2)
000198 C0 01 [24] 648 push (0+1)
00019A C0 00 [24] 649 push (0+0)
00019C C0 D0 [24] 650 push psw
00019E 75 D0 00 [24] 651 mov psw,#0x00
652 ; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
0001A1 7F 00 [12] 653 mov r7,#0x00
0001A3 654 00109$:
655 ; src/pwm.c:89: if (s_high_remain[i] > 0) {
0001A3 EF [12] 656 mov a,r7
0001A4 24r00 [12] 657 add a,#_s_high_remain
0001A6 FD [12] 658 mov r5,a
0001A7 E4 [12] 659 clr a
0001A8 34s00 [12] 660 addc a,#(_s_high_remain >> 8)
0001AA FE [12] 661 mov r6,a
0001AB 8D 82 [24] 662 mov dpl,r5
0001AD 8E 83 [24] 663 mov dph,r6
0001AF E0 [24] 664 movx a,@dptr
0001B0 60 3D [24] 665 jz 00110$
666 ; src/pwm.c:90: s_high_remain[i]--;
0001B2 EF [12] 667 mov a,r7
0001B3 24r00 [12] 668 add a,#_s_high_remain
0001B5 FD [12] 669 mov r5,a
0001B6 E4 [12] 670 clr a
0001B7 34s00 [12] 671 addc a,#(_s_high_remain >> 8)
0001B9 FE [12] 672 mov r6,a
0001BA 8D 82 [24] 673 mov dpl,r5
0001BC 8E 83 [24] 674 mov dph,r6
0001BE E0 [24] 675 movx a,@dptr
0001BF FC [12] 676 mov r4,a
0001C0 1C [12] 677 dec r4
0001C1 8D 82 [24] 678 mov dpl,r5
0001C3 8E 83 [24] 679 mov dph,r6
0001C5 EC [12] 680 mov a,r4
0001C6 F0 [24] 681 movx @dptr,a
682 ; src/pwm.c:91: if (s_high_remain[i] == 0) {
0001C7 EF [12] 683 mov a,r7
0001C8 24r00 [12] 684 add a,#_s_high_remain
0001CA FD [12] 685 mov r5,a
0001CB E4 [12] 686 clr a
0001CC 34s00 [12] 687 addc a,#(_s_high_remain >> 8)
0001CE FE [12] 688 mov r6,a
0001CF 8D 82 [24] 689 mov dpl,r5
0001D1 8E 83 [24] 690 mov dph,r6
0001D3 E0 [24] 691 movx a,@dptr
0001D4 70 19 [24] 692 jnz 00110$
693 ; src/pwm.c:92: gpio_write(CH_PORT[i], CH_BIT[i], 0); /* 拉低 */
0001D6 EF [12] 694 mov a,r7
0001D7 90r00r05 [24] 695 mov dptr,#_CH_PORT
0001DA 93 [24] 696 movc a,@a+dptr
0001DB FE [12] 697 mov r6,a
0001DC EF [12] 698 mov a,r7
0001DD 90r00r09 [24] 699 mov dptr,#_CH_BIT
0001E0 93 [24] 700 movc a,@a+dptr
0001E1 F5*00 [12] 701 mov _gpio_write_PARM_2,a
0001E3 75*00 00 [24] 702 mov _gpio_write_PARM_3,#0x00
0001E6 8E 82 [24] 703 mov dpl,r6
0001E8 C0 07 [24] 704 push ar7
0001EA 12r00r00 [24] 705 lcall _gpio_write
0001ED D0 07 [24] 706 pop ar7
0001EF 707 00110$:
708 ; src/pwm.c:88: for (i = 0; i < CH_COUNT; i++) {
0001EF 0F [12] 709 inc r7
0001F0 BF 04 00 [24] 710 cjne r7,#0x04,00143$
0001F3 711 00143$:
0001F3 40 AE [24] 712 jc 00109$
713 ; src/pwm.c:97: s_period_cnt++;
0001F5 90r00r04 [24] 714 mov dptr,#_s_period_cnt
0001F8 E0 [24] 715 movx a,@dptr
0001F9 FE [12] 716 mov r6,a
0001FA A3 [24] 717 inc dptr
0001FB E0 [24] 718 movx a,@dptr
0001FC FF [12] 719 mov r7,a
0001FD 90r00r04 [24] 720 mov dptr,#_s_period_cnt
000200 74 01 [12] 721 mov a,#0x01
000202 2E [12] 722 add a,r6
000203 F0 [24] 723 movx @dptr,a
000204 E4 [12] 724 clr a
000205 3F [12] 725 addc a,r7
000206 A3 [24] 726 inc dptr
000207 F0 [24] 727 movx @dptr,a
728 ; src/pwm.c:98: if (s_period_cnt >= PWM_PERIOD_COUNT) {
000208 90r00r04 [24] 729 mov dptr,#_s_period_cnt
00020B E0 [24] 730 movx a,@dptr
00020C FE [12] 731 mov r6,a
00020D A3 [24] 732 inc dptr
00020E E0 [24] 733 movx a,@dptr
00020F FF [12] 734 mov r7,a
000210 C3 [12] 735 clr c
000211 EE [12] 736 mov a,r6
000212 94 E8 [12] 737 subb a,#0xe8
000214 EF [12] 738 mov a,r7
000215 94 03 [12] 739 subb a,#0x03
000217 40 28 [24] 740 jc 00113$
741 ; src/pwm.c:99: s_period_cnt = 0;
000219 90r00r04 [24] 742 mov dptr,#_s_period_cnt
00021C E4 [12] 743 clr a
00021D F0 [24] 744 movx @dptr,a
00021E A3 [24] 745 inc dptr
00021F F0 [24] 746 movx @dptr,a
747 ; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
000220 7F 00 [12] 748 mov r7,#0x00
000222 749 00111$:
750 ; src/pwm.c:102: gpio_write(CH_PORT[i], CH_BIT[i], 1);
000222 EF [12] 751 mov a,r7
000223 90r00r05 [24] 752 mov dptr,#_CH_PORT
000226 93 [24] 753 movc a,@a+dptr
000227 FE [12] 754 mov r6,a
000228 EF [12] 755 mov a,r7
000229 90r00r09 [24] 756 mov dptr,#_CH_BIT
00022C 93 [24] 757 movc a,@a+dptr
00022D F5*00 [12] 758 mov _gpio_write_PARM_2,a
00022F 75*00 01 [24] 759 mov _gpio_write_PARM_3,#0x01
000232 8E 82 [24] 760 mov dpl,r6
000234 C0 07 [24] 761 push ar7
000236 12r00r00 [24] 762 lcall _gpio_write
000239 D0 07 [24] 763 pop ar7
764 ; src/pwm.c:101: for (i = 0; i < CH_COUNT; i++) {
00023B 0F [12] 765 inc r7
00023C BF 04 00 [24] 766 cjne r7,#0x04,00146$
00023F 767 00146$:
00023F 40 E1 [24] 768 jc 00111$
000241 769 00113$:
770 ; src/pwm.c:105: }
000241 D0 D0 [24] 771 pop psw
000243 D0 00 [24] 772 pop (0+0)
000245 D0 01 [24] 773 pop (0+1)
000247 D0 02 [24] 774 pop (0+2)
000249 D0 03 [24] 775 pop (0+3)
00024B D0 04 [24] 776 pop (0+4)
00024D D0 05 [24] 777 pop (0+5)
00024F D0 06 [24] 778 pop (0+6)
000251 D0 07 [24] 779 pop (0+7)
000253 D0 83 [24] 780 pop dph
000255 D0 82 [24] 781 pop dpl
000257 D0 F0 [24] 782 pop b
000259 D0 E0 [24] 783 pop acc
00025B D0*00 [24] 784 pop bits
00025D 32 [24] 785 reti
786 .area CSEG (CODE)
787 .area CONST (CODE)
000000 788 _DEFAULT_ADDR:
000000 E7 789 .db #0xe7 ; 231
000001 E7 790 .db #0xe7 ; 231
000002 E7 791 .db #0xe7 ; 231
000003 E7 792 .db #0xe7 ; 231
000004 C2 793 .db #0xc2 ; 194
000005 794 _CH_PORT:
000005 03 795 .db #0x03 ; 3
000006 03 796 .db #0x03 ; 3
000007 03 797 .db #0x03 ; 3
000008 03 798 .db #0x03 ; 3
000009 799 _CH_BIT:
000009 07 800 .db #0x07 ; 7
00000A 06 801 .db #0x06 ; 6
00000B 05 802 .db #0x05 ; 5
00000C 04 803 .db #0x04 ; 4
804 .area XINIT (CODE)
805 .area CABS (ABS,CODE)
AliceRX_STC/build/pwm.rel
+371
View File
@@ -0,0 +1,371 @@
XH3
H 1B areas 7C global symbols
M pwm
O -mmcs51 --model-small
S __divuint Ref000000
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S __divslong_PARM_2 Ref000000
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _gpio_write Ref000000
S _PSW Def0000D0
S _SPDAT Def0000CF
S __mullong_PARM_2 Ref000000
S _P0M0 Def000094
S _gpio_set_mode_PARM_2 Ref000000
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _gpio_set_mode_PARM_3 Ref000000
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S __divuint_PARM_2 Ref000000
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S __divslong Ref000000
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _gpio_write_PARM_2 Ref000000
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _gpio_write_PARM_3 Ref000000
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S __mullong Ref000000
S _ADC_RESL Def0000BE
S _TI Def000099
S _gpio_set_mode Ref000000
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A BIT_BANK size 1 flags 4 addr 0
A DSEG size 4 flags 0 addr 0
S _pwm_set_from_sbus_PARM_2 Def000002
S _pwm_set_PARM_2 Def000000
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 6 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 25E flags 20 addr 0
S _pwm_init Def000000
S _pwm_set_from_sbus Def0000E2
S _pwm_set Def000087
S _pwm_tick_isr Def000182
A CONST size D flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 02
R 00 00 00 06
T 00 00 02
R 00 00 00 06
T 00 00 00
R 00 00 00 0B
T 00 00 00
R 00 00 00 0B
T 00 00 04
R 00 00 00 0B
T 00 00 04
R 00 00 00 0B
T 00 00 00
R 00 00 00 17
T 00 00 00 7F 00
R 00 00 00 17
T 00 00 02
R 00 00 00 17
T 00 00 02 EF 24 00 00 00 F5 82 E4 34 00 00 00 F5
R 00 00 00 17 F1 01 05 00 0B F1 81 0C 00 0B
T 00 00 0B 83 74 4B F0 EF 24 00 00 05 FD E4 34
R 00 00 00 17 F1 01 09 00 18
T 00 00 15 00 00 05 FE 8D 82 8E 83 E4 93 FC EF 24
R 00 00 00 17 F1 81 03 00 18
T 00 00 20 00 00 09 FA E4 34 00 00 09 FB 8A 82 8B
R 00 00 00 17 F1 01 03 00 18 F1 81 09 00 18
T 00 00 29 83 E4 93 F5 00 00 00 75 00 00 00 01 8C
R 00 00 00 17 F1 23 07 00 1F F1 23 0B 00 23
T 00 00 32 82 C0 07 C0 06 C0 05 C0 03 C0 02 12
R 00 00 00 17
T 00 00 3E 00 00 D0 02 D0 03 D0 05 D0 06 8D 82 8E
R 00 00 00 17 02 03 00 72
T 00 00 4B 83 E4 93 FD 8A 82 8B 83 E4 93 F5
R 00 00 00 17
T 00 00 56 00 00 00 75 00 00 00 00 8D 82 12
R 00 00 00 17 F1 23 03 00 66 F1 23 07 00 69
T 00 00 5D 00 00 D0 07 0F BF 04 00
R 00 00 00 17 02 03 00 1A
T 00 00 65
R 00 00 00 17
T 00 00 65 40 9B 90 00 04 E4 F0 A3 F0 53 89 F0 85
R 00 00 00 17 00 06 00 0B
T 00 00 72 89 89 53 8E 7F 43 8E 80 75 8A 40 75 8C
R 00 00 00 17
T 00 00 7F FE D2 A9 D2 8C D2 AF 22
R 00 00 00 17
T 00 00 87
R 00 00 00 17
T 00 00 87 AF 82 BF 04 00
R 00 00 00 17
T 00 00 8C
R 00 00 00 17
T 00 00 8C 40 01 22
R 00 00 00 17
T 00 00 8F
R 00 00 00 17
T 00 00 8F AD 00 00 00 AE 00 00 01 C3 ED 94 20 EE
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 00 98 94 03 50 06 75 00 00 00 20 75 00 00 01
R 00 00 00 17 F1 21 08 00 06 F1 21 0D 00 06
T 00 00 A1 03
R 00 00 00 17
T 00 00 A2
R 00 00 00 17
T 00 00 A2 AD 00 00 00 AE 00 00 01 C3 74 98 9D 74
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 00 AB 08 9E 50 06 75 00 00 00 98 75 00 00 01
R 00 00 00 17 F1 21 08 00 06 F1 21 0D 00 06
T 00 00 B4 08
R 00 00 00 17
T 00 00 B5
R 00 00 00 17
T 00 00 B5 AD 00 00 00 AE 00 00 01 74 0A 2D F5 82
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 00 BE E4 3E F5 83 75 00 00 00 14 75 00 00 01
R 00 00 00 17 F1 23 08 00 30 F1 23 0D 00 30
T 00 00 C7 00 C0 07 12 00 00 AD 82 D0 07 C2 AF EF
R 00 00 00 17 02 07 00 00
T 00 00 D4 24 00 00 00 F5 82 E4 34 00 00 00 F5 83
R 00 00 00 17 F1 01 04 00 0B F1 81 0B 00 0B
T 00 00 DD ED F0 D2 AF 22
R 00 00 00 17
T 00 00 E2
R 00 00 00 17
T 00 00 E2 AF 82 AD 00 00 02 AE 00 00 03 C3 ED 94
R 00 00 00 17 F1 21 06 00 06 F1 21 0A 00 06
T 00 00 EB AC EE 94 00 50 06 75 00 00 02 AC 75
R 00 00 00 17 F1 21 0A 00 06
T 00 00 F5 00 00 03 00
R 00 00 00 17 F1 21 03 00 06
T 00 00 F7
R 00 00 00 17
T 00 00 F7 AD 00 00 02 AE 00 00 03 C3 74 13 9D 74
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 01 00 07 9E 50 06 75 00 00 02 13 75 00 00 03
R 00 00 00 17 F1 21 08 00 06 F1 21 0D 00 06
T 00 01 09 07
R 00 00 00 17
T 00 01 0A
R 00 00 00 17
T 00 01 0A AB 00 00 02 AC 00 00 03 7D 00 7E 00 8B
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 01 13 00 00 00 EC 24 FC F5 00 00 01 ED 34 FF
R 00 00 00 17 F1 23 03 00 1D F1 23 0A 00 1D
T 00 01 1C F5 00 00 02 EE 34 FF F5 00 00 03 90
R 00 00 00 17 F1 23 04 00 1D F1 23 0B 00 1D
T 00 01 24 03 E8 E4 F5 F0 C0 07 12 00 00 AB 82 AC
R 00 00 00 17 02 0B 00 6F
T 00 01 31 83 AD F0 FE E4 F5 00 00 00 75 00 00 01
R 00 00 00 17 F1 23 09 00 05 F1 23 0D 00 05
T 00 01 3A 04 F5 00 00 02 F5 00 00 03 8B 82 8C 83
R 00 00 00 17 F1 23 05 00 05 F1 23 09 00 05
T 00 01 43 8D F0 EE 12 00 00 AB 82 AC 83 D0 07 74
R 00 00 00 17 02 07 00 38
T 00 01 50 DC 2B FB 74 05 3C FC 8B 05 8C 06 C3 ED
R 00 00 00 17
T 00 01 5D 94 20 EE 94 03 50 04 7B 20 7C 03
R 00 00 00 17
T 00 01 68
R 00 00 00 17
T 00 01 68 8B 05 8C 06 C3 74 98 9D 74 08 9E 50 04
R 00 00 00 17
T 00 01 75 7B 98 7C 08
R 00 00 00 17
T 00 01 79
R 00 00 00 17
T 00 01 79 8B 00 00 00 8C 00 00 01 8F 82 02
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 01 80 00 87
R 00 00 00 17 00 03 00 17
T 00 01 82
R 00 00 00 17
T 00 01 82 C0 00 00 00 C0 E0 C0 F0 C0 82 C0 83 C0
R 00 00 00 17 F1 21 04 00 05
T 00 01 8D 07 C0 06 C0 05 C0 04 C0 03 C0 02 C0 01
R 00 00 00 17
T 00 01 9A C0 00 C0 D0 75 D0 00 7F 00
R 00 00 00 17
T 00 01 A3
R 00 00 00 17
T 00 01 A3 EF 24 00 00 00 FD E4 34 00 00 00 FE 8D
R 00 00 00 17 F1 01 05 00 0B F1 81 0B 00 0B
T 00 01 AC 82 8E 83 E0 60 3D EF 24 00 00 00 FD E4
R 00 00 00 17 F1 01 0B 00 0B
T 00 01 B7 34 00 00 00 FE 8D 82 8E 83 E0 FC 1C 8D
R 00 00 00 17 F1 81 04 00 0B
T 00 01 C2 82 8E 83 EC F0 EF 24 00 00 00 FD E4 34
R 00 00 00 17 F1 01 0A 00 0B
T 00 01 CD 00 00 00 FE 8D 82 8E 83 E0 70 19 EF 90
R 00 00 00 17 F1 81 03 00 0B
T 00 01 D8 00 05 93 FE EF 90 00 09 93 F5
R 00 00 00 17 00 03 00 18 00 09 00 18
T 00 01 E2 00 00 00 75 00 00 00 00 8E 82 C0 07 12
R 00 00 00 17 F1 23 03 00 66 F1 23 07 00 69
T 00 01 EB 00 00 D0 07
R 00 00 00 17 02 03 00 1A
T 00 01 EF
R 00 00 00 17
T 00 01 EF 0F BF 04 00
R 00 00 00 17
T 00 01 F3
R 00 00 00 17
T 00 01 F3 40 AE 90 00 04 E0 FE A3 E0 FF 90 00 04
R 00 00 00 17 00 06 00 0B 00 0E 00 0B
T 00 02 00 74 01 2E F0 E4 3F A3 F0 90 00 04 E0 FE
R 00 00 00 17 00 0C 00 0B
T 00 02 0D A3 E0 FF C3 EE 94 E8 EF 94 03 40 28 90
R 00 00 00 17
T 00 02 1A 00 04 E4 F0 A3 F0 7F 00
R 00 00 00 17 00 03 00 0B
T 00 02 22
R 00 00 00 17
T 00 02 22 EF 90 00 05 93 FE EF 90 00 09 93 F5
R 00 00 00 17 00 05 00 18 00 0B 00 18
T 00 02 2E 00 00 00 75 00 00 00 01 8E 82 C0 07 12
R 00 00 00 17 F1 23 03 00 66 F1 23 07 00 69
T 00 02 37 00 00 D0 07 0F BF 04 00
R 00 00 00 17 02 03 00 1A
T 00 02 3F
R 00 00 00 17
T 00 02 3F 40 E1
R 00 00 00 17
T 00 02 41
R 00 00 00 17
T 00 02 41 D0 D0 D0 00 D0 01 D0 02 D0 03 D0 04 D0
R 00 00 00 17
T 00 02 4E 05 D0 06 D0 07 D0 83 D0 82 D0 F0 D0 E0
R 00 00 00 17
T 00 02 5B D0 00 00 00 32
R 00 00 00 17 F1 21 04 00 05
T 00 00 00
R 00 00 00 18
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 18
T 00 00 05
R 00 00 00 18
T 00 00 05 03 03 03 03
R 00 00 00 18
T 00 00 09
R 00 00 00 18
T 00 00 09 07 06 05 04
R 00 00 00 18
AliceRX_STC/build/pwm.sym
+585
View File
@@ -0,0 +1,585 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
18 _CH_BIT 000009 R
18 _CH_PORT 000005 R
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
18 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IE2 = 0000AF G
_INTCLKO = 00008F G
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TF1 = 00008F G
_TH0 = 00008C G
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
__divslong ****** GX
__divslong_PARM_2 ****** GX
__divuint ****** GX
__divuint_PARM_2 ****** GX
__mullong ****** GX
__mullong_PARM_2 ****** GX
_gpio_set_mode ****** GX
_gpio_set_mode_PARM_2 ****** GX
_gpio_set_mode_PARM_3 ****** GX
_gpio_write ****** GX
_gpio_write_PARM_2 ****** GX
_gpio_write_PARM_3 ****** GX
17 _pwm_init 000000 GR
17 _pwm_set 000087 GR
6 _pwm_set_PARM_2 000000 GR
17 _pwm_set_from_sbus 0000E2 GR
6 _pwm_set_from_sbus_PARM_2 000002 GR
17 _pwm_tick_isr 000182 GR
B _s_high_remain 000000 R
B _s_period_cnt 000004 R
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
5 b0 = 008000 R
5 b1 = 008100 R
5 b2 = 008200 R
5 b3 = 008300 R
5 b4 = 008400 R
5 b5 = 008500 R
5 b6 = 008600 R
5 b7 = 008700 R
5 bits 000000 R
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 BIT_BANK size 1 flags 4
6 DSEG size 4 flags 0
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 6 flags 40
C XABS size 0 flags 48
D XISEG size 0 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 25E flags 20
18 CONST size D flags 20
19 XINIT size 0 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/sbus.asm
+680
View File
@@ -0,0 +1,680 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module sbus
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _sbus_make_uart_frame_PARM_2
.globl _sbus_unpack_channels_PARM_2
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _sbus_unpack_channels
.globl _sbus_make_uart_frame
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
.area OSEG (OVR,DATA)
_sbus_unpack_channels_PARM_2:
.ds 3
_sbus_unpack_channels_in_65536_3:
.ds 3
_sbus_unpack_channels_bit_buf_65536_4:
.ds 4
_sbus_unpack_channels_in_idx_65536_4:
.ds 1
_sbus_unpack_channels_i_65536_4:
.ds 1
.area OSEG (OVR,DATA)
_sbus_make_uart_frame_PARM_2:
.ds 3
_sbus_make_uart_frame_ch_65536_8:
.ds 3
_sbus_make_uart_frame_bit_buf_65536_9:
.ds 4
_sbus_make_uart_frame_bit_count_65536_9:
.ds 1
_sbus_make_uart_frame_out_idx_65536_9:
.ds 1
_sbus_make_uart_frame_i_65536_9:
.ds 1
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'sbus_unpack_channels'
;------------------------------------------------------------
;ch Allocated with name '_sbus_unpack_channels_PARM_2'
;in Allocated with name '_sbus_unpack_channels_in_65536_3'
;bit_buf Allocated with name '_sbus_unpack_channels_bit_buf_65536_4'
;bit_count Allocated to registers r0
;in_idx Allocated with name '_sbus_unpack_channels_in_idx_65536_4'
;i Allocated with name '_sbus_unpack_channels_i_65536_4'
;------------------------------------------------------------
; src/sbus.c:7: void sbus_unpack_channels(const uint8_t in[22], uint16_t ch[SBUS_CH_COUNT])
; -----------------------------------------
; function sbus_unpack_channels
; -----------------------------------------
_sbus_unpack_channels:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
mov _sbus_unpack_channels_in_65536_3,dpl
mov (_sbus_unpack_channels_in_65536_3 + 1),dph
mov (_sbus_unpack_channels_in_65536_3 + 2),b
; src/sbus.c:10: uint32_t bit_buf = 0;
clr a
mov _sbus_unpack_channels_bit_buf_65536_4,a
mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
mov (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
mov (_sbus_unpack_channels_bit_buf_65536_4 + 3),a
; src/sbus.c:11: uint8_t bit_count = 0;
mov r0,#0x00
; src/sbus.c:16: while (bit_count < 11) {
; 1-genFromRTrack replaced mov _sbus_unpack_channels_in_idx_65536_4,#0x00
mov _sbus_unpack_channels_in_idx_65536_4,a
; 1-genFromRTrack replaced mov _sbus_unpack_channels_i_65536_4,#0x00
mov _sbus_unpack_channels_i_65536_4,a
00101$:
cjne r0,#0x0b,00118$
00118$:
jnc 00103$
; src/sbus.c:17: bit_buf |= ((uint32_t)in[in_idx++]) << bit_count;
mov a,_sbus_unpack_channels_in_idx_65536_4
add a,_sbus_unpack_channels_in_65536_3
mov r5,a
clr a
addc a,(_sbus_unpack_channels_in_65536_3 + 1)
mov r6,a
mov r7,(_sbus_unpack_channels_in_65536_3 + 2)
inc _sbus_unpack_channels_in_idx_65536_4
mov dpl,r5
mov dph,r6
mov b,r7
lcall __gptrget
mov r7,a
mov r5,#0x00
mov r6,#0x00
mov r4,#0x00
mov b,r0
inc b
sjmp 00121$
00120$:
mov a,r7
add a,r7
mov r7,a
mov a,r5
rlc a
mov r5,a
mov a,r6
rlc a
mov r6,a
mov a,r4
rlc a
mov r4,a
00121$:
djnz b,00120$
mov a,r7
orl _sbus_unpack_channels_bit_buf_65536_4,a
mov a,r5
orl (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
mov a,r6
orl (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
mov a,r4
orl (_sbus_unpack_channels_bit_buf_65536_4 + 3),a
; src/sbus.c:18: bit_count += 8;
mov ar7,r0
mov a,#0x08
add a,r7
mov r0,a
sjmp 00101$
00103$:
; src/sbus.c:20: ch[i] = (uint16_t)(bit_buf & 0x07FF);
mov a,_sbus_unpack_channels_i_65536_4
mov b,#0x02
mul ab
add a,_sbus_unpack_channels_PARM_2
mov r5,a
mov a,(_sbus_unpack_channels_PARM_2 + 1)
addc a,b
mov r6,a
mov r7,(_sbus_unpack_channels_PARM_2 + 2)
mov r1,_sbus_unpack_channels_bit_buf_65536_4
mov r2,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
anl ar2,#0x07
mov dpl,r5
mov dph,r6
mov b,r7
mov a,r1
lcall __gptrput
inc dptr
mov a,r2
lcall __gptrput
; src/sbus.c:21: bit_buf >>= 11;
mov _sbus_unpack_channels_bit_buf_65536_4,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 2)
swap a
rl a
xch a,_sbus_unpack_channels_bit_buf_65536_4
swap a
rl a
anl a,#0x1f
xrl a,_sbus_unpack_channels_bit_buf_65536_4
xch a,_sbus_unpack_channels_bit_buf_65536_4
anl a,#0x1f
xch a,_sbus_unpack_channels_bit_buf_65536_4
xrl a,_sbus_unpack_channels_bit_buf_65536_4
xch a,_sbus_unpack_channels_bit_buf_65536_4
mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 3)
swap a
rl a
anl a,#0xe0
orl a,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 3)
swap a
rl a
anl a,#0x1f
mov (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
mov (_sbus_unpack_channels_bit_buf_65536_4 + 3),#0x00
; src/sbus.c:22: bit_count -= 11;
mov ar7,r0
mov a,r7
add a,#0xf5
mov r0,a
; src/sbus.c:15: for (i = 0; i < SBUS_CH_COUNT; i++) {
inc _sbus_unpack_channels_i_65536_4
mov a,#0x100 - 0x10
add a,_sbus_unpack_channels_i_65536_4
jc 00122$
ljmp 00101$
00122$:
; src/sbus.c:24: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'sbus_make_uart_frame'
;------------------------------------------------------------
;out Allocated with name '_sbus_make_uart_frame_PARM_2'
;ch Allocated with name '_sbus_make_uart_frame_ch_65536_8'
;bit_buf Allocated with name '_sbus_make_uart_frame_bit_buf_65536_9'
;bit_count Allocated with name '_sbus_make_uart_frame_bit_count_65536_9'
;out_idx Allocated with name '_sbus_make_uart_frame_out_idx_65536_9'
;i Allocated with name '_sbus_make_uart_frame_i_65536_9'
;------------------------------------------------------------
; src/sbus.c:26: void sbus_make_uart_frame(const uint16_t ch[SBUS_CH_COUNT], uint8_t out[25])
; -----------------------------------------
; function sbus_make_uart_frame
; -----------------------------------------
_sbus_make_uart_frame:
mov _sbus_make_uart_frame_ch_65536_8,dpl
mov (_sbus_make_uart_frame_ch_65536_8 + 1),dph
mov (_sbus_make_uart_frame_ch_65536_8 + 2),b
; src/sbus.c:28: uint32_t bit_buf = 0;
clr a
mov _sbus_make_uart_frame_bit_buf_65536_9,a
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 1),a
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 2),a
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 3),a
; src/sbus.c:29: uint8_t bit_count = 0;
; 1-genFromRTrack replaced mov _sbus_make_uart_frame_bit_count_65536_9,#0x00
mov _sbus_make_uart_frame_bit_count_65536_9,a
; src/sbus.c:30: uint8_t out_idx = 0;
; 1-genFromRTrack replaced mov _sbus_make_uart_frame_out_idx_65536_9,#0x00
mov _sbus_make_uart_frame_out_idx_65536_9,a
; src/sbus.c:33: out[0] = 0x0F; /* start byte */
mov r5,_sbus_make_uart_frame_PARM_2
mov r6,(_sbus_make_uart_frame_PARM_2 + 1)
mov r7,(_sbus_make_uart_frame_PARM_2 + 2)
mov dpl,r5
mov dph,r6
mov b,r7
mov a,#0x0f
lcall __gptrput
; src/sbus.c:35: for (i = 0; i < SBUS_CH_COUNT; i++) {
mov _sbus_make_uart_frame_i_65536_9,#0x00
00107$:
; src/sbus.c:36: bit_buf |= ((uint32_t)(ch[i] & 0x07FF)) << bit_count;
mov a,_sbus_make_uart_frame_i_65536_9
mov b,#0x02
mul ab
add a,_sbus_make_uart_frame_ch_65536_8
mov r1,a
mov a,(_sbus_make_uart_frame_ch_65536_8 + 1)
addc a,b
mov r2,a
mov r3,(_sbus_make_uart_frame_ch_65536_8 + 2)
mov dpl,r1
mov dph,r2
mov b,r3
lcall __gptrget
mov r1,a
inc dptr
lcall __gptrget
mov r2,a
anl ar2,#0x07
mov r3,#0x00
mov r4,#0x00
mov b,_sbus_make_uart_frame_bit_count_65536_9
inc b
sjmp 00134$
00133$:
mov a,r1
add a,r1
mov r1,a
mov a,r2
rlc a
mov r2,a
mov a,r3
rlc a
mov r3,a
mov a,r4
rlc a
mov r4,a
00134$:
djnz b,00133$
mov a,r1
orl _sbus_make_uart_frame_bit_buf_65536_9,a
mov a,r2
orl (_sbus_make_uart_frame_bit_buf_65536_9 + 1),a
mov a,r3
orl (_sbus_make_uart_frame_bit_buf_65536_9 + 2),a
mov a,r4
orl (_sbus_make_uart_frame_bit_buf_65536_9 + 3),a
; src/sbus.c:37: bit_count += 11;
mov r4,_sbus_make_uart_frame_bit_count_65536_9
mov a,#0x0b
add a,r4
mov _sbus_make_uart_frame_bit_count_65536_9,a
; src/sbus.c:38: while (bit_count >= 8) {
mov r4,_sbus_make_uart_frame_out_idx_65536_9
00101$:
mov a,#0x100 - 0x08
add a,_sbus_make_uart_frame_bit_count_65536_9
jnc 00116$
; src/sbus.c:39: out[1 + out_idx++] = (uint8_t)(bit_buf & 0xFF);
mov ar2,r4
mov r3,#0x00
inc r4
inc r2
cjne r2,#0x00,00136$
inc r3
00136$:
mov a,r2
add a,r5
mov r2,a
mov a,r3
addc a,r6
mov r1,a
mov ar3,r7
mov r0,_sbus_make_uart_frame_bit_buf_65536_9
mov dpl,r2
mov dph,r1
mov b,r3
mov a,r0
lcall __gptrput
; src/sbus.c:40: bit_buf >>= 8;
mov _sbus_make_uart_frame_bit_buf_65536_9,(_sbus_make_uart_frame_bit_buf_65536_9 + 1)
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 1),(_sbus_make_uart_frame_bit_buf_65536_9 + 2)
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 2),(_sbus_make_uart_frame_bit_buf_65536_9 + 3)
mov (_sbus_make_uart_frame_bit_buf_65536_9 + 3),#0x00
; src/sbus.c:41: bit_count -= 8;
mov a,_sbus_make_uart_frame_bit_count_65536_9
mov r0,a
add a,#0xf8
mov _sbus_make_uart_frame_bit_count_65536_9,a
sjmp 00101$
00116$:
mov _sbus_make_uart_frame_out_idx_65536_9,r4
; src/sbus.c:35: for (i = 0; i < SBUS_CH_COUNT; i++) {
inc _sbus_make_uart_frame_i_65536_9
mov a,#0x100 - 0x10
add a,_sbus_make_uart_frame_i_65536_9
jc 00137$
ljmp 00107$
00137$:
; src/sbus.c:45: if (bit_count > 0) out[1 + out_idx++] = (uint8_t)(bit_buf & 0xFF);
mov a,_sbus_make_uart_frame_bit_count_65536_9
jz 00106$
mov r3,#0x00
inc r4
cjne r4,#0x00,00139$
inc r3
00139$:
mov a,r4
add a,r5
mov r4,a
mov a,r3
addc a,r6
mov r3,a
mov ar2,r7
mov r1,_sbus_make_uart_frame_bit_buf_65536_9
mov dpl,r4
mov dph,r3
mov b,r2
mov a,r1
lcall __gptrput
00106$:
; src/sbus.c:47: out[23] = 0x00; /* flags (no failsafe) */
mov a,#0x17
add a,r5
mov r2,a
clr a
addc a,r6
mov r3,a
mov ar4,r7
mov dpl,r2
mov dph,r3
mov b,r4
clr a
lcall __gptrput
; src/sbus.c:48: out[24] = 0x00; /* end */
mov a,#0x18
add a,r5
mov r5,a
clr a
addc a,r6
mov r6,a
mov dpl,r5
mov dph,r6
mov b,r7
clr a
; src/sbus.c:49: }
ljmp __gptrput
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/sbus.lst
+680
View File
@@ -0,0 +1,680 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module sbus
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _sbus_make_uart_frame_PARM_2
12 .globl _sbus_unpack_channels_PARM_2
13 .globl _EADC
14 .globl _ET1
15 .globl _ET0
16 .globl _ES
17 .globl _EA
18 .globl _REN
19 .globl _RI
20 .globl _TI
21 .globl _TR1
22 .globl _TF1
23 .globl _IT0
24 .globl _IE0
25 .globl _TR0
26 .globl _TF0
27 .globl _CMPCR2
28 .globl _CMPCR1
29 .globl _TA
30 .globl _IRCBAND_REG
31 .globl _IAP_TPS
32 .globl _IAP_CONTR
33 .globl _IAP_TRIG
34 .globl _IAP_CMD
35 .globl _IAP_ADDRL
36 .globl _IAP_ADDRH
37 .globl _IAP_DATA
38 .globl _WDT_CONTR
39 .globl _PCA_PWM3
40 .globl _PCA_PWM2
41 .globl _PCA_PWM1
42 .globl _PCA_PWM0
43 .globl _CCAP3L
44 .globl _CCAP2L
45 .globl _CCAP1L
46 .globl _CCAP0L
47 .globl _CCAPM3
48 .globl _CCAPM2
49 .globl _CCAPM1
50 .globl _CCAPM0
51 .globl _CMOD
52 .globl _CCON
53 .globl _ADCTIM_X
54 .globl _ADCCFG
55 .globl _ADC_RESL
56 .globl _ADC_RES
57 .globl _ADC_CONTR
58 .globl _SPDAT
59 .globl _SPCTL
60 .globl _SPSTAT
61 .globl _IP2H
62 .globl _IP2
63 .globl _IP
64 .globl _IE2
65 .globl _IE
66 .globl _BRT
67 .globl _P_SW1
68 .globl _SADEN
69 .globl _SADDR
70 .globl _S2BUF
71 .globl _S2CON
72 .globl _SBUF
73 .globl _SCON
74 .globl _TM4PS_X
75 .globl _TM3PS_X
76 .globl _TM2PS_X
77 .globl _T4T3M
78 .globl _T4L
79 .globl _T4H
80 .globl _T3L
81 .globl _T3H
82 .globl _T2L
83 .globl _T2H
84 .globl _INTCLKO
85 .globl _AUXR
86 .globl _TH1
87 .globl _TH0
88 .globl _TL1
89 .globl _TL0
90 .globl _TMOD
91 .globl _TCON
92 .globl _P_SW2
93 .globl _P5M0
94 .globl _P5M1
95 .globl _P4M0
96 .globl _P4M1
97 .globl _P3M0
98 .globl _P3M1
99 .globl _P2M0
100 .globl _P2M1
101 .globl _P1M0
102 .globl _P1M1
103 .globl _P0M0
104 .globl _P0M1
105 .globl _PSW
106 .globl _B
107 .globl _ACC
108 .globl _PCON
109 .globl _DPH
110 .globl _DPL
111 .globl _SP
112 .globl _P5
113 .globl _P4
114 .globl _P3
115 .globl _P2
116 .globl _P1
117 .globl _P0
118 .globl _sbus_unpack_channels
119 .globl _sbus_make_uart_frame
120 ;--------------------------------------------------------
121 ; special function registers
122 ;--------------------------------------------------------
123 .area RSEG (ABS,DATA)
000000 124 .org 0x0000
000080 125 _P0 = 0x0080
000090 126 _P1 = 0x0090
0000A0 127 _P2 = 0x00a0
0000B0 128 _P3 = 0x00b0
0000C0 129 _P4 = 0x00c0
0000C8 130 _P5 = 0x00c8
000081 131 _SP = 0x0081
000082 132 _DPL = 0x0082
000083 133 _DPH = 0x0083
000087 134 _PCON = 0x0087
0000E0 135 _ACC = 0x00e0
0000F0 136 _B = 0x00f0
0000D0 137 _PSW = 0x00d0
000093 138 _P0M1 = 0x0093
000094 139 _P0M0 = 0x0094
000091 140 _P1M1 = 0x0091
000092 141 _P1M0 = 0x0092
000095 142 _P2M1 = 0x0095
000096 143 _P2M0 = 0x0096
0000B1 144 _P3M1 = 0x00b1
0000B2 145 _P3M0 = 0x00b2
0000B3 146 _P4M1 = 0x00b3
0000B4 147 _P4M0 = 0x00b4
0000C9 148 _P5M1 = 0x00c9
0000CA 149 _P5M0 = 0x00ca
0000BA 150 _P_SW2 = 0x00ba
000088 151 _TCON = 0x0088
000089 152 _TMOD = 0x0089
00008A 153 _TL0 = 0x008a
00008B 154 _TL1 = 0x008b
00008C 155 _TH0 = 0x008c
00008D 156 _TH1 = 0x008d
00008E 157 _AUXR = 0x008e
00008F 158 _INTCLKO = 0x008f
0000D6 159 _T2H = 0x00d6
0000D7 160 _T2L = 0x00d7
0000D4 161 _T3H = 0x00d4
0000D5 162 _T3L = 0x00d5
0000D2 163 _T4H = 0x00d2
0000D3 164 _T4L = 0x00d3
0000D1 165 _T4T3M = 0x00d1
00FEA1 166 _TM2PS_X = 0xfea1
00FEA2 167 _TM3PS_X = 0xfea2
00FEA3 168 _TM4PS_X = 0xfea3
000098 169 _SCON = 0x0098
000099 170 _SBUF = 0x0099
00009A 171 _S2CON = 0x009a
00009B 172 _S2BUF = 0x009b
0000A9 173 _SADDR = 0x00a9
0000B9 174 _SADEN = 0x00b9
0000A2 175 _P_SW1 = 0x00a2
00009C 176 _BRT = 0x009c
0000A8 177 _IE = 0x00a8
0000AF 178 _IE2 = 0x00af
0000B8 179 _IP = 0x00b8
0000B6 180 _IP2 = 0x00b6
0000B7 181 _IP2H = 0x00b7
0000CD 182 _SPSTAT = 0x00cd
0000CE 183 _SPCTL = 0x00ce
0000CF 184 _SPDAT = 0x00cf
0000BC 185 _ADC_CONTR = 0x00bc
0000BD 186 _ADC_RES = 0x00bd
0000BE 187 _ADC_RESL = 0x00be
0000DE 188 _ADCCFG = 0x00de
00FEA8 189 _ADCTIM_X = 0xfea8
0000D8 190 _CCON = 0x00d8
0000D9 191 _CMOD = 0x00d9
0000DA 192 _CCAPM0 = 0x00da
0000DB 193 _CCAPM1 = 0x00db
0000DC 194 _CCAPM2 = 0x00dc
0000DD 195 _CCAPM3 = 0x00dd
0000EA 196 _CCAP0L = 0x00ea
0000EB 197 _CCAP1L = 0x00eb
0000EC 198 _CCAP2L = 0x00ec
0000ED 199 _CCAP3L = 0x00ed
0000F2 200 _PCA_PWM0 = 0x00f2
0000F3 201 _PCA_PWM1 = 0x00f3
0000F4 202 _PCA_PWM2 = 0x00f4
0000F5 203 _PCA_PWM3 = 0x00f5
0000C1 204 _WDT_CONTR = 0x00c1
0000C2 205 _IAP_DATA = 0x00c2
0000C3 206 _IAP_ADDRH = 0x00c3
0000C4 207 _IAP_ADDRL = 0x00c4
0000C5 208 _IAP_CMD = 0x00c5
0000C6 209 _IAP_TRIG = 0x00c6
0000C7 210 _IAP_CONTR = 0x00c7
0000F7 211 _IAP_TPS = 0x00f7
00009D 212 _IRCBAND_REG = 0x009d
0000AE 213 _TA = 0x00ae
0000E6 214 _CMPCR1 = 0x00e6
0000E7 215 _CMPCR2 = 0x00e7
216 ;--------------------------------------------------------
217 ; special function bits
218 ;--------------------------------------------------------
219 .area RSEG (ABS,DATA)
000000 220 .org 0x0000
00008D 221 _TF0 = 0x008d
00008C 222 _TR0 = 0x008c
000089 223 _IE0 = 0x0089
000088 224 _IT0 = 0x0088
00008F 225 _TF1 = 0x008f
00008E 226 _TR1 = 0x008e
000099 227 _TI = 0x0099
000098 228 _RI = 0x0098
00009C 229 _REN = 0x009c
0000AF 230 _EA = 0x00af
0000AC 231 _ES = 0x00ac
0000A9 232 _ET0 = 0x00a9
0000AB 233 _ET1 = 0x00ab
0000AD 234 _EADC = 0x00ad
235 ;--------------------------------------------------------
236 ; overlayable register banks
237 ;--------------------------------------------------------
238 .area REG_BANK_0 (REL,OVR,DATA)
000000 239 .ds 8
240 ;--------------------------------------------------------
241 ; internal ram data
242 ;--------------------------------------------------------
243 .area DSEG (DATA)
244 ;--------------------------------------------------------
245 ; overlayable items in internal ram
246 ;--------------------------------------------------------
247 .area OSEG (OVR,DATA)
000000 248 _sbus_unpack_channels_PARM_2:
000000 249 .ds 3
000003 250 _sbus_unpack_channels_in_65536_3:
000003 251 .ds 3
000006 252 _sbus_unpack_channels_bit_buf_65536_4:
000006 253 .ds 4
00000A 254 _sbus_unpack_channels_in_idx_65536_4:
00000A 255 .ds 1
00000B 256 _sbus_unpack_channels_i_65536_4:
00000B 257 .ds 1
258 .area OSEG (OVR,DATA)
000000 259 _sbus_make_uart_frame_PARM_2:
000000 260 .ds 3
000003 261 _sbus_make_uart_frame_ch_65536_8:
000003 262 .ds 3
000006 263 _sbus_make_uart_frame_bit_buf_65536_9:
000006 264 .ds 4
00000A 265 _sbus_make_uart_frame_bit_count_65536_9:
00000A 266 .ds 1
00000B 267 _sbus_make_uart_frame_out_idx_65536_9:
00000B 268 .ds 1
00000C 269 _sbus_make_uart_frame_i_65536_9:
00000C 270 .ds 1
271 ;--------------------------------------------------------
272 ; indirectly addressable internal ram data
273 ;--------------------------------------------------------
274 .area ISEG (DATA)
275 ;--------------------------------------------------------
276 ; absolute internal ram data
277 ;--------------------------------------------------------
278 .area IABS (ABS,DATA)
279 .area IABS (ABS,DATA)
280 ;--------------------------------------------------------
281 ; bit data
282 ;--------------------------------------------------------
283 .area BSEG (BIT)
284 ;--------------------------------------------------------
285 ; paged external ram data
286 ;--------------------------------------------------------
287 .area PSEG (PAG,XDATA)
288 ;--------------------------------------------------------
289 ; external ram data
290 ;--------------------------------------------------------
291 .area XSEG (XDATA)
292 ;--------------------------------------------------------
293 ; absolute external ram data
294 ;--------------------------------------------------------
295 .area XABS (ABS,XDATA)
296 ;--------------------------------------------------------
297 ; external initialized ram data
298 ;--------------------------------------------------------
299 .area XISEG (XDATA)
300 .area HOME (CODE)
301 .area GSINIT0 (CODE)
302 .area GSINIT1 (CODE)
303 .area GSINIT2 (CODE)
304 .area GSINIT3 (CODE)
305 .area GSINIT4 (CODE)
306 .area GSINIT5 (CODE)
307 .area GSINIT (CODE)
308 .area GSFINAL (CODE)
309 .area CSEG (CODE)
310 ;--------------------------------------------------------
311 ; global & static initialisations
312 ;--------------------------------------------------------
313 .area HOME (CODE)
314 .area GSINIT (CODE)
315 .area GSFINAL (CODE)
316 .area GSINIT (CODE)
317 ;--------------------------------------------------------
318 ; Home
319 ;--------------------------------------------------------
320 .area HOME (CODE)
321 .area HOME (CODE)
322 ;--------------------------------------------------------
323 ; code
324 ;--------------------------------------------------------
325 .area CSEG (CODE)
326 ;------------------------------------------------------------
327 ;Allocation info for local variables in function 'sbus_unpack_channels'
328 ;------------------------------------------------------------
329 ;ch Allocated with name '_sbus_unpack_channels_PARM_2'
330 ;in Allocated with name '_sbus_unpack_channels_in_65536_3'
331 ;bit_buf Allocated with name '_sbus_unpack_channels_bit_buf_65536_4'
332 ;bit_count Allocated to registers r0
333 ;in_idx Allocated with name '_sbus_unpack_channels_in_idx_65536_4'
334 ;i Allocated with name '_sbus_unpack_channels_i_65536_4'
335 ;------------------------------------------------------------
336 ; src/sbus.c:7: void sbus_unpack_channels(const uint8_t in[22], uint16_t ch[SBUS_CH_COUNT])
337 ; -----------------------------------------
338 ; function sbus_unpack_channels
339 ; -----------------------------------------
000000 340 _sbus_unpack_channels:
000007 341 ar7 = 0x07
000006 342 ar6 = 0x06
000005 343 ar5 = 0x05
000004 344 ar4 = 0x04
000003 345 ar3 = 0x03
000002 346 ar2 = 0x02
000001 347 ar1 = 0x01
000000 348 ar0 = 0x00
000000 85 82*03 [24] 349 mov _sbus_unpack_channels_in_65536_3,dpl
000003 85 83*04 [24] 350 mov (_sbus_unpack_channels_in_65536_3 + 1),dph
000006 85 F0*05 [24] 351 mov (_sbus_unpack_channels_in_65536_3 + 2),b
352 ; src/sbus.c:10: uint32_t bit_buf = 0;
000009 E4 [12] 353 clr a
00000A F5*06 [12] 354 mov _sbus_unpack_channels_bit_buf_65536_4,a
00000C F5*07 [12] 355 mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
00000E F5*08 [12] 356 mov (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
000010 F5*09 [12] 357 mov (_sbus_unpack_channels_bit_buf_65536_4 + 3),a
358 ; src/sbus.c:11: uint8_t bit_count = 0;
000012 78 00 [12] 359 mov r0,#0x00
360 ; src/sbus.c:16: while (bit_count < 11) {
361 ; 1-genFromRTrack replaced mov _sbus_unpack_channels_in_idx_65536_4,#0x00
000014 F5*0A [12] 362 mov _sbus_unpack_channels_in_idx_65536_4,a
363 ; 1-genFromRTrack replaced mov _sbus_unpack_channels_i_65536_4,#0x00
000016 F5*0B [12] 364 mov _sbus_unpack_channels_i_65536_4,a
000018 365 00101$:
000018 B8 0B 00 [24] 366 cjne r0,#0x0b,00118$
00001B 367 00118$:
00001B 50 46 [24] 368 jnc 00103$
369 ; src/sbus.c:17: bit_buf |= ((uint32_t)in[in_idx++]) << bit_count;
00001D E5*0A [12] 370 mov a,_sbus_unpack_channels_in_idx_65536_4
00001F 25*03 [12] 371 add a,_sbus_unpack_channels_in_65536_3
000021 FD [12] 372 mov r5,a
000022 E4 [12] 373 clr a
000023 35*04 [12] 374 addc a,(_sbus_unpack_channels_in_65536_3 + 1)
000025 FE [12] 375 mov r6,a
000026 AF*05 [24] 376 mov r7,(_sbus_unpack_channels_in_65536_3 + 2)
000028 05*0A [12] 377 inc _sbus_unpack_channels_in_idx_65536_4
00002A 8D 82 [24] 378 mov dpl,r5
00002C 8E 83 [24] 379 mov dph,r6
00002E 8F F0 [24] 380 mov b,r7
000030 12r00r00 [24] 381 lcall __gptrget
000033 FF [12] 382 mov r7,a
000034 7D 00 [12] 383 mov r5,#0x00
000036 7E 00 [12] 384 mov r6,#0x00
000038 7C 00 [12] 385 mov r4,#0x00
00003A 88 F0 [24] 386 mov b,r0
00003C 05 F0 [12] 387 inc b
00003E 80 0C [24] 388 sjmp 00121$
000040 389 00120$:
000040 EF [12] 390 mov a,r7
000041 2F [12] 391 add a,r7
000042 FF [12] 392 mov r7,a
000043 ED [12] 393 mov a,r5
000044 33 [12] 394 rlc a
000045 FD [12] 395 mov r5,a
000046 EE [12] 396 mov a,r6
000047 33 [12] 397 rlc a
000048 FE [12] 398 mov r6,a
000049 EC [12] 399 mov a,r4
00004A 33 [12] 400 rlc a
00004B FC [12] 401 mov r4,a
00004C 402 00121$:
00004C D5 F0 F1 [24] 403 djnz b,00120$
00004F EF [12] 404 mov a,r7
000050 42*06 [12] 405 orl _sbus_unpack_channels_bit_buf_65536_4,a
000052 ED [12] 406 mov a,r5
000053 42*07 [12] 407 orl (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
000055 EE [12] 408 mov a,r6
000056 42*08 [12] 409 orl (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
000058 EC [12] 410 mov a,r4
000059 42*09 [12] 411 orl (_sbus_unpack_channels_bit_buf_65536_4 + 3),a
412 ; src/sbus.c:18: bit_count += 8;
00005B 88 07 [24] 413 mov ar7,r0
00005D 74 08 [12] 414 mov a,#0x08
00005F 2F [12] 415 add a,r7
000060 F8 [12] 416 mov r0,a
000061 80 B5 [24] 417 sjmp 00101$
000063 418 00103$:
419 ; src/sbus.c:20: ch[i] = (uint16_t)(bit_buf & 0x07FF);
000063 E5*0B [12] 420 mov a,_sbus_unpack_channels_i_65536_4
000065 75 F0 02 [24] 421 mov b,#0x02
000068 A4 [48] 422 mul ab
000069 25*00 [12] 423 add a,_sbus_unpack_channels_PARM_2
00006B FD [12] 424 mov r5,a
00006C E5*01 [12] 425 mov a,(_sbus_unpack_channels_PARM_2 + 1)
00006E 35 F0 [12] 426 addc a,b
000070 FE [12] 427 mov r6,a
000071 AF*02 [24] 428 mov r7,(_sbus_unpack_channels_PARM_2 + 2)
000073 A9*06 [24] 429 mov r1,_sbus_unpack_channels_bit_buf_65536_4
000075 AA*07 [24] 430 mov r2,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
000077 53 02 07 [24] 431 anl ar2,#0x07
00007A 8D 82 [24] 432 mov dpl,r5
00007C 8E 83 [24] 433 mov dph,r6
00007E 8F F0 [24] 434 mov b,r7
000080 E9 [12] 435 mov a,r1
000081 12r00r00 [24] 436 lcall __gptrput
000084 A3 [24] 437 inc dptr
000085 EA [12] 438 mov a,r2
000086 12r00r00 [24] 439 lcall __gptrput
440 ; src/sbus.c:21: bit_buf >>= 11;
000089 85*07*06 [24] 441 mov _sbus_unpack_channels_bit_buf_65536_4,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
00008C E5*08 [12] 442 mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 2)
00008E C4 [12] 443 swap a
00008F 23 [12] 444 rl a
000090 C5*06 [12] 445 xch a,_sbus_unpack_channels_bit_buf_65536_4
000092 C4 [12] 446 swap a
000093 23 [12] 447 rl a
000094 54 1F [12] 448 anl a,#0x1f
000096 65*06 [12] 449 xrl a,_sbus_unpack_channels_bit_buf_65536_4
000098 C5*06 [12] 450 xch a,_sbus_unpack_channels_bit_buf_65536_4
00009A 54 1F [12] 451 anl a,#0x1f
00009C C5*06 [12] 452 xch a,_sbus_unpack_channels_bit_buf_65536_4
00009E 65*06 [12] 453 xrl a,_sbus_unpack_channels_bit_buf_65536_4
0000A0 C5*06 [12] 454 xch a,_sbus_unpack_channels_bit_buf_65536_4
0000A2 F5*07 [12] 455 mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
0000A4 E5*09 [12] 456 mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 3)
0000A6 C4 [12] 457 swap a
0000A7 23 [12] 458 rl a
0000A8 54 E0 [12] 459 anl a,#0xe0
0000AA 45*07 [12] 460 orl a,(_sbus_unpack_channels_bit_buf_65536_4 + 1)
0000AC F5*07 [12] 461 mov (_sbus_unpack_channels_bit_buf_65536_4 + 1),a
0000AE E5*09 [12] 462 mov a,(_sbus_unpack_channels_bit_buf_65536_4 + 3)
0000B0 C4 [12] 463 swap a
0000B1 23 [12] 464 rl a
0000B2 54 1F [12] 465 anl a,#0x1f
0000B4 F5*08 [12] 466 mov (_sbus_unpack_channels_bit_buf_65536_4 + 2),a
0000B6 75*09 00 [24] 467 mov (_sbus_unpack_channels_bit_buf_65536_4 + 3),#0x00
468 ; src/sbus.c:22: bit_count -= 11;
0000B9 88 07 [24] 469 mov ar7,r0
0000BB EF [12] 470 mov a,r7
0000BC 24 F5 [12] 471 add a,#0xf5
0000BE F8 [12] 472 mov r0,a
473 ; src/sbus.c:15: for (i = 0; i < SBUS_CH_COUNT; i++) {
0000BF 05*0B [12] 474 inc _sbus_unpack_channels_i_65536_4
0000C1 74 F0 [12] 475 mov a,#0x100 - 0x10
0000C3 25*0B [12] 476 add a,_sbus_unpack_channels_i_65536_4
0000C5 40 03 [24] 477 jc 00122$
0000C7 02r00r18 [24] 478 ljmp 00101$
0000CA 479 00122$:
480 ; src/sbus.c:24: }
0000CA 22 [24] 481 ret
482 ;------------------------------------------------------------
483 ;Allocation info for local variables in function 'sbus_make_uart_frame'
484 ;------------------------------------------------------------
485 ;out Allocated with name '_sbus_make_uart_frame_PARM_2'
486 ;ch Allocated with name '_sbus_make_uart_frame_ch_65536_8'
487 ;bit_buf Allocated with name '_sbus_make_uart_frame_bit_buf_65536_9'
488 ;bit_count Allocated with name '_sbus_make_uart_frame_bit_count_65536_9'
489 ;out_idx Allocated with name '_sbus_make_uart_frame_out_idx_65536_9'
490 ;i Allocated with name '_sbus_make_uart_frame_i_65536_9'
491 ;------------------------------------------------------------
492 ; src/sbus.c:26: void sbus_make_uart_frame(const uint16_t ch[SBUS_CH_COUNT], uint8_t out[25])
493 ; -----------------------------------------
494 ; function sbus_make_uart_frame
495 ; -----------------------------------------
0000CB 496 _sbus_make_uart_frame:
0000CB 85 82*03 [24] 497 mov _sbus_make_uart_frame_ch_65536_8,dpl
0000CE 85 83*04 [24] 498 mov (_sbus_make_uart_frame_ch_65536_8 + 1),dph
0000D1 85 F0*05 [24] 499 mov (_sbus_make_uart_frame_ch_65536_8 + 2),b
500 ; src/sbus.c:28: uint32_t bit_buf = 0;
0000D4 E4 [12] 501 clr a
0000D5 F5*06 [12] 502 mov _sbus_make_uart_frame_bit_buf_65536_9,a
0000D7 F5*07 [12] 503 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 1),a
0000D9 F5*08 [12] 504 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 2),a
0000DB F5*09 [12] 505 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 3),a
506 ; src/sbus.c:29: uint8_t bit_count = 0;
507 ; 1-genFromRTrack replaced mov _sbus_make_uart_frame_bit_count_65536_9,#0x00
0000DD F5*0A [12] 508 mov _sbus_make_uart_frame_bit_count_65536_9,a
509 ; src/sbus.c:30: uint8_t out_idx = 0;
510 ; 1-genFromRTrack replaced mov _sbus_make_uart_frame_out_idx_65536_9,#0x00
0000DF F5*0B [12] 511 mov _sbus_make_uart_frame_out_idx_65536_9,a
512 ; src/sbus.c:33: out[0] = 0x0F; /* start byte */
0000E1 AD*00 [24] 513 mov r5,_sbus_make_uart_frame_PARM_2
0000E3 AE*01 [24] 514 mov r6,(_sbus_make_uart_frame_PARM_2 + 1)
0000E5 AF*02 [24] 515 mov r7,(_sbus_make_uart_frame_PARM_2 + 2)
0000E7 8D 82 [24] 516 mov dpl,r5
0000E9 8E 83 [24] 517 mov dph,r6
0000EB 8F F0 [24] 518 mov b,r7
0000ED 74 0F [12] 519 mov a,#0x0f
0000EF 12r00r00 [24] 520 lcall __gptrput
521 ; src/sbus.c:35: for (i = 0; i < SBUS_CH_COUNT; i++) {
0000F2 75*0C 00 [24] 522 mov _sbus_make_uart_frame_i_65536_9,#0x00
0000F5 523 00107$:
524 ; src/sbus.c:36: bit_buf |= ((uint32_t)(ch[i] & 0x07FF)) << bit_count;
0000F5 E5*0C [12] 525 mov a,_sbus_make_uart_frame_i_65536_9
0000F7 75 F0 02 [24] 526 mov b,#0x02
0000FA A4 [48] 527 mul ab
0000FB 25*03 [12] 528 add a,_sbus_make_uart_frame_ch_65536_8
0000FD F9 [12] 529 mov r1,a
0000FE E5*04 [12] 530 mov a,(_sbus_make_uart_frame_ch_65536_8 + 1)
000100 35 F0 [12] 531 addc a,b
000102 FA [12] 532 mov r2,a
000103 AB*05 [24] 533 mov r3,(_sbus_make_uart_frame_ch_65536_8 + 2)
000105 89 82 [24] 534 mov dpl,r1
000107 8A 83 [24] 535 mov dph,r2
000109 8B F0 [24] 536 mov b,r3
00010B 12r00r00 [24] 537 lcall __gptrget
00010E F9 [12] 538 mov r1,a
00010F A3 [24] 539 inc dptr
000110 12r00r00 [24] 540 lcall __gptrget
000113 FA [12] 541 mov r2,a
000114 53 02 07 [24] 542 anl ar2,#0x07
000117 7B 00 [12] 543 mov r3,#0x00
000119 7C 00 [12] 544 mov r4,#0x00
00011B 85*0A F0 [24] 545 mov b,_sbus_make_uart_frame_bit_count_65536_9
00011E 05 F0 [12] 546 inc b
000120 80 0C [24] 547 sjmp 00134$
000122 548 00133$:
000122 E9 [12] 549 mov a,r1
000123 29 [12] 550 add a,r1
000124 F9 [12] 551 mov r1,a
000125 EA [12] 552 mov a,r2
000126 33 [12] 553 rlc a
000127 FA [12] 554 mov r2,a
000128 EB [12] 555 mov a,r3
000129 33 [12] 556 rlc a
00012A FB [12] 557 mov r3,a
00012B EC [12] 558 mov a,r4
00012C 33 [12] 559 rlc a
00012D FC [12] 560 mov r4,a
00012E 561 00134$:
00012E D5 F0 F1 [24] 562 djnz b,00133$
000131 E9 [12] 563 mov a,r1
000132 42*06 [12] 564 orl _sbus_make_uart_frame_bit_buf_65536_9,a
000134 EA [12] 565 mov a,r2
000135 42*07 [12] 566 orl (_sbus_make_uart_frame_bit_buf_65536_9 + 1),a
000137 EB [12] 567 mov a,r3
000138 42*08 [12] 568 orl (_sbus_make_uart_frame_bit_buf_65536_9 + 2),a
00013A EC [12] 569 mov a,r4
00013B 42*09 [12] 570 orl (_sbus_make_uart_frame_bit_buf_65536_9 + 3),a
571 ; src/sbus.c:37: bit_count += 11;
00013D AC*0A [24] 572 mov r4,_sbus_make_uart_frame_bit_count_65536_9
00013F 74 0B [12] 573 mov a,#0x0b
000141 2C [12] 574 add a,r4
000142 F5*0A [12] 575 mov _sbus_make_uart_frame_bit_count_65536_9,a
576 ; src/sbus.c:38: while (bit_count >= 8) {
000144 AC*0B [24] 577 mov r4,_sbus_make_uart_frame_out_idx_65536_9
000146 578 00101$:
000146 74 F8 [12] 579 mov a,#0x100 - 0x08
000148 25*0A [12] 580 add a,_sbus_make_uart_frame_bit_count_65536_9
00014A 50 33 [24] 581 jnc 00116$
582 ; src/sbus.c:39: out[1 + out_idx++] = (uint8_t)(bit_buf & 0xFF);
00014C 8C 02 [24] 583 mov ar2,r4
00014E 7B 00 [12] 584 mov r3,#0x00
000150 0C [12] 585 inc r4
000151 0A [12] 586 inc r2
000152 BA 00 01 [24] 587 cjne r2,#0x00,00136$
000155 0B [12] 588 inc r3
000156 589 00136$:
000156 EA [12] 590 mov a,r2
000157 2D [12] 591 add a,r5
000158 FA [12] 592 mov r2,a
000159 EB [12] 593 mov a,r3
00015A 3E [12] 594 addc a,r6
00015B F9 [12] 595 mov r1,a
00015C 8F 03 [24] 596 mov ar3,r7
00015E A8*06 [24] 597 mov r0,_sbus_make_uart_frame_bit_buf_65536_9
000160 8A 82 [24] 598 mov dpl,r2
000162 89 83 [24] 599 mov dph,r1
000164 8B F0 [24] 600 mov b,r3
000166 E8 [12] 601 mov a,r0
000167 12r00r00 [24] 602 lcall __gptrput
603 ; src/sbus.c:40: bit_buf >>= 8;
00016A 85*07*06 [24] 604 mov _sbus_make_uart_frame_bit_buf_65536_9,(_sbus_make_uart_frame_bit_buf_65536_9 + 1)
00016D 85*08*07 [24] 605 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 1),(_sbus_make_uart_frame_bit_buf_65536_9 + 2)
000170 85*09*08 [24] 606 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 2),(_sbus_make_uart_frame_bit_buf_65536_9 + 3)
000173 75*09 00 [24] 607 mov (_sbus_make_uart_frame_bit_buf_65536_9 + 3),#0x00
608 ; src/sbus.c:41: bit_count -= 8;
000176 E5*0A [12] 609 mov a,_sbus_make_uart_frame_bit_count_65536_9
000178 F8 [12] 610 mov r0,a
000179 24 F8 [12] 611 add a,#0xf8
00017B F5*0A [12] 612 mov _sbus_make_uart_frame_bit_count_65536_9,a
00017D 80 C7 [24] 613 sjmp 00101$
00017F 614 00116$:
00017F 8C*0B [24] 615 mov _sbus_make_uart_frame_out_idx_65536_9,r4
616 ; src/sbus.c:35: for (i = 0; i < SBUS_CH_COUNT; i++) {
000181 05*0C [12] 617 inc _sbus_make_uart_frame_i_65536_9
000183 74 F0 [12] 618 mov a,#0x100 - 0x10
000185 25*0C [12] 619 add a,_sbus_make_uart_frame_i_65536_9
000187 40 03 [24] 620 jc 00137$
000189 02r00rF5 [24] 621 ljmp 00107$
00018C 622 00137$:
623 ; src/sbus.c:45: if (bit_count > 0) out[1 + out_idx++] = (uint8_t)(bit_buf & 0xFF);
00018C E5*0A [12] 624 mov a,_sbus_make_uart_frame_bit_count_65536_9
00018E 60 1B [24] 625 jz 00106$
000190 7B 00 [12] 626 mov r3,#0x00
000192 0C [12] 627 inc r4
000193 BC 00 01 [24] 628 cjne r4,#0x00,00139$
000196 0B [12] 629 inc r3
000197 630 00139$:
000197 EC [12] 631 mov a,r4
000198 2D [12] 632 add a,r5
000199 FC [12] 633 mov r4,a
00019A EB [12] 634 mov a,r3
00019B 3E [12] 635 addc a,r6
00019C FB [12] 636 mov r3,a
00019D 8F 02 [24] 637 mov ar2,r7
00019F A9*06 [24] 638 mov r1,_sbus_make_uart_frame_bit_buf_65536_9
0001A1 8C 82 [24] 639 mov dpl,r4
0001A3 8B 83 [24] 640 mov dph,r3
0001A5 8A F0 [24] 641 mov b,r2
0001A7 E9 [12] 642 mov a,r1
0001A8 12r00r00 [24] 643 lcall __gptrput
0001AB 644 00106$:
645 ; src/sbus.c:47: out[23] = 0x00; /* flags (no failsafe) */
0001AB 74 17 [12] 646 mov a,#0x17
0001AD 2D [12] 647 add a,r5
0001AE FA [12] 648 mov r2,a
0001AF E4 [12] 649 clr a
0001B0 3E [12] 650 addc a,r6
0001B1 FB [12] 651 mov r3,a
0001B2 8F 04 [24] 652 mov ar4,r7
0001B4 8A 82 [24] 653 mov dpl,r2
0001B6 8B 83 [24] 654 mov dph,r3
0001B8 8C F0 [24] 655 mov b,r4
0001BA E4 [12] 656 clr a
0001BB 12r00r00 [24] 657 lcall __gptrput
658 ; src/sbus.c:48: out[24] = 0x00; /* end */
0001BE 74 18 [12] 659 mov a,#0x18
0001C0 2D [12] 660 add a,r5
0001C1 FD [12] 661 mov r5,a
0001C2 E4 [12] 662 clr a
0001C3 3E [12] 663 addc a,r6
0001C4 FE [12] 664 mov r6,a
0001C5 8D 82 [24] 665 mov dpl,r5
0001C7 8E 83 [24] 666 mov dph,r6
0001C9 8F F0 [24] 667 mov b,r7
0001CB E4 [12] 668 clr a
669 ; src/sbus.c:49: }
0001CC 02r00r00 [24] 670 ljmp __gptrput
671 .area CSEG (CODE)
672 .area CONST (CODE)
000000 673 _DEFAULT_ADDR:
000000 E7 674 .db #0xe7 ; 231
000001 E7 675 .db #0xe7 ; 231
000002 E7 676 .db #0xe7 ; 231
000003 E7 677 .db #0xe7 ; 231
000004 C2 678 .db #0xc2 ; 194
679 .area XINIT (CODE)
680 .area CABS (ABS,CODE)
AliceRX_STC/build/sbus.rel
+355
View File
@@ -0,0 +1,355 @@
XH3
H 1B areas 70 global symbols
M sbus
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S __gptrput Ref000000
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A OSEG size D flags 4 addr 0
S _sbus_unpack_channels_PARM_2 Def000000
S _sbus_make_uart_frame_PARM_2 Def000000
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 1CF flags 20 addr 0
S _sbus_make_uart_frame Def0000CB
S _sbus_unpack_channels Def000000
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
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R 00 00 00 02
T 00 00 00
R 00 00 00 03
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R 00 00 00 04
T 00 00 00
R 00 00 00 06
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R 00 00 00 06
T 00 00 03
R 00 00 00 06
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R 00 00 00 06
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R 00 00 00 06
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R 00 00 00 06
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R 00 00 00 06
T 00 00 03
R 00 00 00 06
T 00 00 03
R 00 00 00 06
T 00 00 06
R 00 00 00 06
T 00 00 06
R 00 00 00 06
T 00 00 0A
R 00 00 00 06
T 00 00 0A
R 00 00 00 06
T 00 00 0B
R 00 00 00 06
T 00 00 0B
R 00 00 00 06
T 00 00 0C
R 00 00 00 06
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R 00 00 00 06
T 00 00 00
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R 00 00 00 17 F1 21 05 00 06 F1 21 0A 00 06
T 00 00 08 00 00 05 E4 F5 00 00 06 F5
R 00 00 00 17 F1 21 03 00 06 F1 21 08 00 06
T 00 00 0D 00 00 07 F5 00 00 08 F5
R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
T 00 00 11 00 00 09 78 00 F5 00 00 0A F5
R 00 00 00 17 F1 21 03 00 06 F1 21 09 00 06
T 00 00 17 00 00 0B
R 00 00 00 17 F1 21 03 00 06
T 00 00 18
R 00 00 00 17
T 00 00 18 B8 0B 00
R 00 00 00 17
T 00 00 1B
R 00 00 00 17
T 00 00 1B 50 46 E5 00 00 0A 25 00 00 03 FD E4 35
R 00 00 00 17 F1 21 06 00 06 F1 21 0A 00 06
T 00 00 24 00 00 04 FE AF 00 00 05 05
R 00 00 00 17 F1 21 03 00 06 F1 21 08 00 06
T 00 00 29 00 00 0A 8D 82 8E 83 8F F0 12 00 00 FF
R 00 00 00 17 F1 21 03 00 06 02 0D 00 63
T 00 00 34 7D 00 7E 00 7C 00 88 F0 05 F0 80 0C
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T 00 00 40
R 00 00 00 17
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R 00 00 00 17
T 00 00 4C
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R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
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R 00 00 00 17 F1 21 03 00 06 F1 21 09 00 06
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R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 00 9D 00 00 06 65 00 00 06 C5
R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
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R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
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R 00 00 00 17
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R 00 00 00 17
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R 00 00 00 17 F1 21 0B 00 06
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R 00 00 00 17
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R 00 00 00 17
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R 00 00 00 17
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R 00 00 00 17 F1 21 08 00 06 F1 21 0D 00 06
T 00 01 37 EB 42 00 00 08 EC 42 00 00 09 AC
R 00 00 00 17 F1 21 05 00 06 F1 21 0A 00 06
T 00 01 3E 00 00 0A 74 0B 2C F5 00 00 0A AC
R 00 00 00 17 F1 21 03 00 06 F1 21 0A 00 06
T 00 01 45 00 00 0B
R 00 00 00 17 F1 21 03 00 06
T 00 01 46
R 00 00 00 17
T 00 01 46 74 F8 25 00 00 0A 50 33 8C 02 7B 00 0C
R 00 00 00 17 F1 21 06 00 06
T 00 01 51 0A BA 00 01 0B
R 00 00 00 17
T 00 01 56
R 00 00 00 17
T 00 01 56 EA 2D FA EB 3E F9 8F 03 A8 00 00 06 8A
R 00 00 00 17 F1 21 0C 00 06
T 00 01 61 82 89 83 8B F0 E8 12 00 00 85 00 00 07
R 00 00 00 17 02 0A 00 18 F1 21 0D 00 06
T 00 01 6C 00 00 06 85 00 00 08
R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
T 00 01 6F 00 00 07 85 00 00 09
R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
T 00 01 72 00 00 08 75 00 00 09 00 E5
R 00 00 00 17 F1 21 03 00 06 F1 21 07 00 06
T 00 01 77 00 00 0A F8 24 F8 F5 00 00 0A 80 C7
R 00 00 00 17 F1 21 03 00 06 F1 21 0A 00 06
T 00 01 7F
R 00 00 00 17
T 00 01 7F 8C 00 00 0B 05 00 00 0C 74 F0 25
R 00 00 00 17 F1 21 04 00 06 F1 21 08 00 06
T 00 01 86 00 00 0C 40 03 02 00 F5
R 00 00 00 17 F1 21 03 00 06 00 09 00 17
T 00 01 8C
R 00 00 00 17
T 00 01 8C E5 00 00 0A 60 1B 7B 00 0C BC 00 01 0B
R 00 00 00 17 F1 21 04 00 06
T 00 01 97
R 00 00 00 17
T 00 01 97 EC 2D FC EB 3E FB 8F 02 A9 00 00 06 8C
R 00 00 00 17 F1 21 0C 00 06
T 00 01 A2 82 8B 83 8A F0 E9 12 00 00
R 00 00 00 17 02 0A 00 18
T 00 01 AB
R 00 00 00 17
T 00 01 AB 74 17 2D FA E4 3E FB 8F 04 8A 82 8B 83
R 00 00 00 17
T 00 01 B8 8C F0 E4 12 00 00 74 18 2D FD E4 3E FE
R 00 00 00 17 02 07 00 18
T 00 01 C5 8D 82 8E 83 8F F0 E4 02 00 00
R 00 00 00 17 02 0B 00 18
T 00 00 00
R 00 00 00 18
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 18
AliceRX_STC/build/sbus.sym
+565
View File
@@ -0,0 +1,565 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
18 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
__gptrget ****** GX
__gptrput ****** GX
17 _sbus_make_uart_frame 0000CB GR
6 _sbus_make_uart_frame_PARM_2 000000 GR
6 _sbus_make_uart_frame_bit_buf_65536_9 000006 R
6 _sbus_make_uart_frame_bit_count_65536_9 00000A R
6 _sbus_make_uart_frame_ch_65536_8 000003 R
6 _sbus_make_uart_frame_i_65536_9 00000C R
6 _sbus_make_uart_frame_out_idx_65536_9 00000B R
17 _sbus_unpack_channels 000000 GR
6 _sbus_unpack_channels_PARM_2 000000 GR
6 _sbus_unpack_channels_bit_buf_65536_4 000006 R
6 _sbus_unpack_channels_i_65536_4 00000B R
6 _sbus_unpack_channels_in_65536_3 000003 R
6 _sbus_unpack_channels_in_idx_65536_4 00000A R
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 0 flags 0
6 OSEG size D flags 4
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 0 flags 40
C XABS size 0 flags 48
D XISEG size 0 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 1CF flags 20
18 CONST size 5 flags 20
19 XINIT size 0 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/spi.asm
+365
View File
@@ -0,0 +1,365 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module spi
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _spi_init
.globl _spi_transfer
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
.area OSEG (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'spi_init'
;------------------------------------------------------------
; src/spi.c:10: void spi_init(void)
; -----------------------------------------
; function spi_init
; -----------------------------------------
_spi_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
; src/spi.c:16: P1M0 |= (1 << NRF_SCK_BIT) | (1 << NRF_MOSI_BIT); /* 推挽 */
orl _P1M0,#0x28
; src/spi.c:17: P1M1 &= ~((1 << NRF_SCK_BIT) | (1 << NRF_MOSI_BIT));
anl _P1M1,#0xd7
; src/spi.c:18: P1M0 &= ~(1 << NRF_MISO_BIT); /* 高阻输入 */
anl _P1M0,#0xef
; src/spi.c:19: P1M1 |= (1 << NRF_MISO_BIT);
orl _P1M1,#0x10
; src/spi.c:22: P_SW1 &= ~0x0C; /* S1_S1=0,S1_S0=0 → 默认 P1.5/P1.3/P1.4 */
anl _P_SW1,#0xf3
; src/spi.c:31: SPCTL = 0x50 | 0x40; /* MSTR=0x10 + SPEN=0x40 = 0x50 ... 实际 SPEN=0x40 */
mov _SPCTL,#0x50
; src/spi.c:32: SPCTL = SPEN | MSTR | (0 << 2); /* SPR1=0,SPR0=0,SPR=0 → /4 */
mov _SPCTL,#0x50
; src/spi.c:34: SPSTAT = 0x00; /* 清标志 */
mov _SPSTAT,#0x00
; src/spi.c:35: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'spi_transfer'
;------------------------------------------------------------
;data Allocated to registers
;------------------------------------------------------------
; src/spi.c:37: uint8_t spi_transfer(uint8_t data)
; -----------------------------------------
; function spi_transfer
; -----------------------------------------
_spi_transfer:
mov _SPDAT,dpl
; src/spi.c:41: while (!(SPSTAT & SPIF));
00101$:
mov a,_SPSTAT
jnb acc.7,00101$
; src/spi.c:42: SPSTAT = SPIF | WCOL; /* 清标志 (写 1 清 0) */
mov _SPSTAT,#0xc0
; src/spi.c:43: return SPDAT;
mov dpl,_SPDAT
; src/spi.c:44: }
ret
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
.area CABS (ABS,CODE)
AliceRX_STC/build/spi.lst
+365
View File
@@ -0,0 +1,365 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module spi
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _EADC
12 .globl _ET1
13 .globl _ET0
14 .globl _ES
15 .globl _EA
16 .globl _REN
17 .globl _RI
18 .globl _TI
19 .globl _TR1
20 .globl _TF1
21 .globl _IT0
22 .globl _IE0
23 .globl _TR0
24 .globl _TF0
25 .globl _CMPCR2
26 .globl _CMPCR1
27 .globl _TA
28 .globl _IRCBAND_REG
29 .globl _IAP_TPS
30 .globl _IAP_CONTR
31 .globl _IAP_TRIG
32 .globl _IAP_CMD
33 .globl _IAP_ADDRL
34 .globl _IAP_ADDRH
35 .globl _IAP_DATA
36 .globl _WDT_CONTR
37 .globl _PCA_PWM3
38 .globl _PCA_PWM2
39 .globl _PCA_PWM1
40 .globl _PCA_PWM0
41 .globl _CCAP3L
42 .globl _CCAP2L
43 .globl _CCAP1L
44 .globl _CCAP0L
45 .globl _CCAPM3
46 .globl _CCAPM2
47 .globl _CCAPM1
48 .globl _CCAPM0
49 .globl _CMOD
50 .globl _CCON
51 .globl _ADCTIM_X
52 .globl _ADCCFG
53 .globl _ADC_RESL
54 .globl _ADC_RES
55 .globl _ADC_CONTR
56 .globl _SPDAT
57 .globl _SPCTL
58 .globl _SPSTAT
59 .globl _IP2H
60 .globl _IP2
61 .globl _IP
62 .globl _IE2
63 .globl _IE
64 .globl _BRT
65 .globl _P_SW1
66 .globl _SADEN
67 .globl _SADDR
68 .globl _S2BUF
69 .globl _S2CON
70 .globl _SBUF
71 .globl _SCON
72 .globl _TM4PS_X
73 .globl _TM3PS_X
74 .globl _TM2PS_X
75 .globl _T4T3M
76 .globl _T4L
77 .globl _T4H
78 .globl _T3L
79 .globl _T3H
80 .globl _T2L
81 .globl _T2H
82 .globl _INTCLKO
83 .globl _AUXR
84 .globl _TH1
85 .globl _TH0
86 .globl _TL1
87 .globl _TL0
88 .globl _TMOD
89 .globl _TCON
90 .globl _P_SW2
91 .globl _P5M0
92 .globl _P5M1
93 .globl _P4M0
94 .globl _P4M1
95 .globl _P3M0
96 .globl _P3M1
97 .globl _P2M0
98 .globl _P2M1
99 .globl _P1M0
100 .globl _P1M1
101 .globl _P0M0
102 .globl _P0M1
103 .globl _PSW
104 .globl _B
105 .globl _ACC
106 .globl _PCON
107 .globl _DPH
108 .globl _DPL
109 .globl _SP
110 .globl _P5
111 .globl _P4
112 .globl _P3
113 .globl _P2
114 .globl _P1
115 .globl _P0
116 .globl _spi_init
117 .globl _spi_transfer
118 ;--------------------------------------------------------
119 ; special function registers
120 ;--------------------------------------------------------
121 .area RSEG (ABS,DATA)
000000 122 .org 0x0000
000080 123 _P0 = 0x0080
000090 124 _P1 = 0x0090
0000A0 125 _P2 = 0x00a0
0000B0 126 _P3 = 0x00b0
0000C0 127 _P4 = 0x00c0
0000C8 128 _P5 = 0x00c8
000081 129 _SP = 0x0081
000082 130 _DPL = 0x0082
000083 131 _DPH = 0x0083
000087 132 _PCON = 0x0087
0000E0 133 _ACC = 0x00e0
0000F0 134 _B = 0x00f0
0000D0 135 _PSW = 0x00d0
000093 136 _P0M1 = 0x0093
000094 137 _P0M0 = 0x0094
000091 138 _P1M1 = 0x0091
000092 139 _P1M0 = 0x0092
000095 140 _P2M1 = 0x0095
000096 141 _P2M0 = 0x0096
0000B1 142 _P3M1 = 0x00b1
0000B2 143 _P3M0 = 0x00b2
0000B3 144 _P4M1 = 0x00b3
0000B4 145 _P4M0 = 0x00b4
0000C9 146 _P5M1 = 0x00c9
0000CA 147 _P5M0 = 0x00ca
0000BA 148 _P_SW2 = 0x00ba
000088 149 _TCON = 0x0088
000089 150 _TMOD = 0x0089
00008A 151 _TL0 = 0x008a
00008B 152 _TL1 = 0x008b
00008C 153 _TH0 = 0x008c
00008D 154 _TH1 = 0x008d
00008E 155 _AUXR = 0x008e
00008F 156 _INTCLKO = 0x008f
0000D6 157 _T2H = 0x00d6
0000D7 158 _T2L = 0x00d7
0000D4 159 _T3H = 0x00d4
0000D5 160 _T3L = 0x00d5
0000D2 161 _T4H = 0x00d2
0000D3 162 _T4L = 0x00d3
0000D1 163 _T4T3M = 0x00d1
00FEA1 164 _TM2PS_X = 0xfea1
00FEA2 165 _TM3PS_X = 0xfea2
00FEA3 166 _TM4PS_X = 0xfea3
000098 167 _SCON = 0x0098
000099 168 _SBUF = 0x0099
00009A 169 _S2CON = 0x009a
00009B 170 _S2BUF = 0x009b
0000A9 171 _SADDR = 0x00a9
0000B9 172 _SADEN = 0x00b9
0000A2 173 _P_SW1 = 0x00a2
00009C 174 _BRT = 0x009c
0000A8 175 _IE = 0x00a8
0000AF 176 _IE2 = 0x00af
0000B8 177 _IP = 0x00b8
0000B6 178 _IP2 = 0x00b6
0000B7 179 _IP2H = 0x00b7
0000CD 180 _SPSTAT = 0x00cd
0000CE 181 _SPCTL = 0x00ce
0000CF 182 _SPDAT = 0x00cf
0000BC 183 _ADC_CONTR = 0x00bc
0000BD 184 _ADC_RES = 0x00bd
0000BE 185 _ADC_RESL = 0x00be
0000DE 186 _ADCCFG = 0x00de
00FEA8 187 _ADCTIM_X = 0xfea8
0000D8 188 _CCON = 0x00d8
0000D9 189 _CMOD = 0x00d9
0000DA 190 _CCAPM0 = 0x00da
0000DB 191 _CCAPM1 = 0x00db
0000DC 192 _CCAPM2 = 0x00dc
0000DD 193 _CCAPM3 = 0x00dd
0000EA 194 _CCAP0L = 0x00ea
0000EB 195 _CCAP1L = 0x00eb
0000EC 196 _CCAP2L = 0x00ec
0000ED 197 _CCAP3L = 0x00ed
0000F2 198 _PCA_PWM0 = 0x00f2
0000F3 199 _PCA_PWM1 = 0x00f3
0000F4 200 _PCA_PWM2 = 0x00f4
0000F5 201 _PCA_PWM3 = 0x00f5
0000C1 202 _WDT_CONTR = 0x00c1
0000C2 203 _IAP_DATA = 0x00c2
0000C3 204 _IAP_ADDRH = 0x00c3
0000C4 205 _IAP_ADDRL = 0x00c4
0000C5 206 _IAP_CMD = 0x00c5
0000C6 207 _IAP_TRIG = 0x00c6
0000C7 208 _IAP_CONTR = 0x00c7
0000F7 209 _IAP_TPS = 0x00f7
00009D 210 _IRCBAND_REG = 0x009d
0000AE 211 _TA = 0x00ae
0000E6 212 _CMPCR1 = 0x00e6
0000E7 213 _CMPCR2 = 0x00e7
214 ;--------------------------------------------------------
215 ; special function bits
216 ;--------------------------------------------------------
217 .area RSEG (ABS,DATA)
000000 218 .org 0x0000
00008D 219 _TF0 = 0x008d
00008C 220 _TR0 = 0x008c
000089 221 _IE0 = 0x0089
000088 222 _IT0 = 0x0088
00008F 223 _TF1 = 0x008f
00008E 224 _TR1 = 0x008e
000099 225 _TI = 0x0099
000098 226 _RI = 0x0098
00009C 227 _REN = 0x009c
0000AF 228 _EA = 0x00af
0000AC 229 _ES = 0x00ac
0000A9 230 _ET0 = 0x00a9
0000AB 231 _ET1 = 0x00ab
0000AD 232 _EADC = 0x00ad
233 ;--------------------------------------------------------
234 ; overlayable register banks
235 ;--------------------------------------------------------
236 .area REG_BANK_0 (REL,OVR,DATA)
000000 237 .ds 8
238 ;--------------------------------------------------------
239 ; internal ram data
240 ;--------------------------------------------------------
241 .area DSEG (DATA)
242 ;--------------------------------------------------------
243 ; overlayable items in internal ram
244 ;--------------------------------------------------------
245 .area OSEG (OVR,DATA)
246 ;--------------------------------------------------------
247 ; indirectly addressable internal ram data
248 ;--------------------------------------------------------
249 .area ISEG (DATA)
250 ;--------------------------------------------------------
251 ; absolute internal ram data
252 ;--------------------------------------------------------
253 .area IABS (ABS,DATA)
254 .area IABS (ABS,DATA)
255 ;--------------------------------------------------------
256 ; bit data
257 ;--------------------------------------------------------
258 .area BSEG (BIT)
259 ;--------------------------------------------------------
260 ; paged external ram data
261 ;--------------------------------------------------------
262 .area PSEG (PAG,XDATA)
263 ;--------------------------------------------------------
264 ; external ram data
265 ;--------------------------------------------------------
266 .area XSEG (XDATA)
267 ;--------------------------------------------------------
268 ; absolute external ram data
269 ;--------------------------------------------------------
270 .area XABS (ABS,XDATA)
271 ;--------------------------------------------------------
272 ; external initialized ram data
273 ;--------------------------------------------------------
274 .area XISEG (XDATA)
275 .area HOME (CODE)
276 .area GSINIT0 (CODE)
277 .area GSINIT1 (CODE)
278 .area GSINIT2 (CODE)
279 .area GSINIT3 (CODE)
280 .area GSINIT4 (CODE)
281 .area GSINIT5 (CODE)
282 .area GSINIT (CODE)
283 .area GSFINAL (CODE)
284 .area CSEG (CODE)
285 ;--------------------------------------------------------
286 ; global & static initialisations
287 ;--------------------------------------------------------
288 .area HOME (CODE)
289 .area GSINIT (CODE)
290 .area GSFINAL (CODE)
291 .area GSINIT (CODE)
292 ;--------------------------------------------------------
293 ; Home
294 ;--------------------------------------------------------
295 .area HOME (CODE)
296 .area HOME (CODE)
297 ;--------------------------------------------------------
298 ; code
299 ;--------------------------------------------------------
300 .area CSEG (CODE)
301 ;------------------------------------------------------------
302 ;Allocation info for local variables in function 'spi_init'
303 ;------------------------------------------------------------
304 ; src/spi.c:10: void spi_init(void)
305 ; -----------------------------------------
306 ; function spi_init
307 ; -----------------------------------------
000000 308 _spi_init:
000007 309 ar7 = 0x07
000006 310 ar6 = 0x06
000005 311 ar5 = 0x05
000004 312 ar4 = 0x04
000003 313 ar3 = 0x03
000002 314 ar2 = 0x02
000001 315 ar1 = 0x01
000000 316 ar0 = 0x00
317 ; src/spi.c:16: P1M0 |= (1 << NRF_SCK_BIT) | (1 << NRF_MOSI_BIT); /* 推挽 */
000000 43 92 28 [24] 318 orl _P1M0,#0x28
319 ; src/spi.c:17: P1M1 &= ~((1 << NRF_SCK_BIT) | (1 << NRF_MOSI_BIT));
000003 53 91 D7 [24] 320 anl _P1M1,#0xd7
321 ; src/spi.c:18: P1M0 &= ~(1 << NRF_MISO_BIT); /* 高阻输入 */
000006 53 92 EF [24] 322 anl _P1M0,#0xef
323 ; src/spi.c:19: P1M1 |= (1 << NRF_MISO_BIT);
000009 43 91 10 [24] 324 orl _P1M1,#0x10
325 ; src/spi.c:22: P_SW1 &= ~0x0C; /* S1_S1=0,S1_S0=0 → 默认 P1.5/P1.3/P1.4 */
00000C 53 A2 F3 [24] 326 anl _P_SW1,#0xf3
327 ; src/spi.c:31: SPCTL = 0x50 | 0x40; /* MSTR=0x10 + SPEN=0x40 = 0x50 ... 实际 SPEN=0x40 */
00000F 75 CE 50 [24] 328 mov _SPCTL,#0x50
329 ; src/spi.c:32: SPCTL = SPEN | MSTR | (0 << 2); /* SPR1=0,SPR0=0,SPR=0 → /4 */
000012 75 CE 50 [24] 330 mov _SPCTL,#0x50
331 ; src/spi.c:34: SPSTAT = 0x00; /* 清标志 */
000015 75 CD 00 [24] 332 mov _SPSTAT,#0x00
333 ; src/spi.c:35: }
000018 22 [24] 334 ret
335 ;------------------------------------------------------------
336 ;Allocation info for local variables in function 'spi_transfer'
337 ;------------------------------------------------------------
338 ;data Allocated to registers
339 ;------------------------------------------------------------
340 ; src/spi.c:37: uint8_t spi_transfer(uint8_t data)
341 ; -----------------------------------------
342 ; function spi_transfer
343 ; -----------------------------------------
000019 344 _spi_transfer:
000019 85 82 CF [24] 345 mov _SPDAT,dpl
346 ; src/spi.c:41: while (!(SPSTAT & SPIF));
00001C 347 00101$:
00001C E5 CD [12] 348 mov a,_SPSTAT
00001E 30 E7 FB [24] 349 jnb acc.7,00101$
350 ; src/spi.c:42: SPSTAT = SPIF | WCOL; /* 清标志 (写 1 清 0) */
000021 75 CD C0 [24] 351 mov _SPSTAT,#0xc0
352 ; src/spi.c:43: return SPDAT;
000024 85 CF 82 [24] 353 mov dpl,_SPDAT
354 ; src/spi.c:44: }
000027 22 [24] 355 ret
356 .area CSEG (CODE)
357 .area CONST (CODE)
000000 358 _DEFAULT_ADDR:
000000 E7 359 .db #0xe7 ; 231
000001 E7 360 .db #0xe7 ; 231
000002 E7 361 .db #0xe7 ; 231
000003 E7 362 .db #0xe7 ; 231
000004 C2 363 .db #0xc2 ; 194
364 .area XINIT (CODE)
365 .area CABS (ABS,CODE)
AliceRX_STC/build/spi.rel
+163
View File
@@ -0,0 +1,163 @@
XH3
H 1B areas 6C global symbols
M spi
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _SPDAT Def0000CF
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A OSEG size 0 flags 4 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 28 flags 20 addr 0
S _spi_transfer Def000019
S _spi_init Def000000
A CONST size 5 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00 00
R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 17
T 00 00 00 43 92 28 53 91 D7 53 92 EF 43 91 10 53
R 00 00 00 17
T 00 00 0D A2 F3 75 CE 50 75 CE 50 75 CD 00 22
R 00 00 00 17
T 00 00 19
R 00 00 00 17
T 00 00 19 85 82 CF
R 00 00 00 17
T 00 00 1C
R 00 00 00 17
T 00 00 1C E5 CD 30 E7 FB 75 CD C0 85 CF 82 22
R 00 00 00 17
T 00 00 00
R 00 00 00 18
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 18
AliceRX_STC/build/spi.sym
+552
View File
@@ -0,0 +1,552 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
18 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
17 _spi_init 000000 GR
17 _spi_transfer 000019 GR
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 DSEG size 0 flags 0
6 OSEG size 0 flags 4
7 ISEG size 0 flags 0
8 IABS size 0 flags 8
9 BSEG size 0 flags 80
A PSEG size 0 flags 50
B XSEG size 0 flags 40
C XABS size 0 flags 48
D XISEG size 0 flags 40
E HOME size 0 flags 20
F GSINIT0 size 0 flags 20
10 GSINIT1 size 0 flags 20
11 GSINIT2 size 0 flags 20
12 GSINIT3 size 0 flags 20
13 GSINIT4 size 0 flags 20
14 GSINIT5 size 0 flags 20
15 GSINIT size 0 flags 20
16 GSFINAL size 0 flags 20
17 CSEG size 28 flags 20
18 CONST size 5 flags 20
19 XINIT size 0 flags 20
1A CABS size 0 flags 28
AliceRX_STC/build/uart.asm
+648
View File
@@ -0,0 +1,648 @@
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
.module uart
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _uart1_isr
.globl _EADC
.globl _ET1
.globl _ET0
.globl _ES
.globl _EA
.globl _REN
.globl _RI
.globl _TI
.globl _TR1
.globl _TF1
.globl _IT0
.globl _IE0
.globl _TR0
.globl _TF0
.globl _CMPCR2
.globl _CMPCR1
.globl _TA
.globl _IRCBAND_REG
.globl _IAP_TPS
.globl _IAP_CONTR
.globl _IAP_TRIG
.globl _IAP_CMD
.globl _IAP_ADDRL
.globl _IAP_ADDRH
.globl _IAP_DATA
.globl _WDT_CONTR
.globl _PCA_PWM3
.globl _PCA_PWM2
.globl _PCA_PWM1
.globl _PCA_PWM0
.globl _CCAP3L
.globl _CCAP2L
.globl _CCAP1L
.globl _CCAP0L
.globl _CCAPM3
.globl _CCAPM2
.globl _CCAPM1
.globl _CCAPM0
.globl _CMOD
.globl _CCON
.globl _ADCTIM_X
.globl _ADCCFG
.globl _ADC_RESL
.globl _ADC_RES
.globl _ADC_CONTR
.globl _SPDAT
.globl _SPCTL
.globl _SPSTAT
.globl _IP2H
.globl _IP2
.globl _IP
.globl _IE2
.globl _IE
.globl _BRT
.globl _P_SW1
.globl _SADEN
.globl _SADDR
.globl _S2BUF
.globl _S2CON
.globl _SBUF
.globl _SCON
.globl _TM4PS_X
.globl _TM3PS_X
.globl _TM2PS_X
.globl _T4T3M
.globl _T4L
.globl _T4H
.globl _T3L
.globl _T3H
.globl _T2L
.globl _T2H
.globl _INTCLKO
.globl _AUXR
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _P_SW2
.globl _P5M0
.globl _P5M1
.globl _P4M0
.globl _P4M1
.globl _P3M0
.globl _P3M1
.globl _P2M0
.globl _P2M1
.globl _P1M0
.globl _P1M1
.globl _P0M0
.globl _P0M1
.globl _PSW
.globl _B
.globl _ACC
.globl _PCON
.globl _DPH
.globl _DPL
.globl _SP
.globl _P5
.globl _P4
.globl _P3
.globl _P2
.globl _P1
.globl _P0
.globl _g_uart1_rx_tail
.globl _g_uart1_rx_head
.globl _g_uart1_rx_buf
.globl _uart1_send_bytes_PARM_2
.globl _uart1_init
.globl _uart1_send_byte
.globl _uart1_send_bytes
.globl _uart1_rx_available
.globl _uart1_read_byte
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_P1 = 0x0090
_P2 = 0x00a0
_P3 = 0x00b0
_P4 = 0x00c0
_P5 = 0x00c8
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_PCON = 0x0087
_ACC = 0x00e0
_B = 0x00f0
_PSW = 0x00d0
_P0M1 = 0x0093
_P0M0 = 0x0094
_P1M1 = 0x0091
_P1M0 = 0x0092
_P2M1 = 0x0095
_P2M0 = 0x0096
_P3M1 = 0x00b1
_P3M0 = 0x00b2
_P4M1 = 0x00b3
_P4M0 = 0x00b4
_P5M1 = 0x00c9
_P5M0 = 0x00ca
_P_SW2 = 0x00ba
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_AUXR = 0x008e
_INTCLKO = 0x008f
_T2H = 0x00d6
_T2L = 0x00d7
_T3H = 0x00d4
_T3L = 0x00d5
_T4H = 0x00d2
_T4L = 0x00d3
_T4T3M = 0x00d1
_TM2PS_X = 0xfea1
_TM3PS_X = 0xfea2
_TM4PS_X = 0xfea3
_SCON = 0x0098
_SBUF = 0x0099
_S2CON = 0x009a
_S2BUF = 0x009b
_SADDR = 0x00a9
_SADEN = 0x00b9
_P_SW1 = 0x00a2
_BRT = 0x009c
_IE = 0x00a8
_IE2 = 0x00af
_IP = 0x00b8
_IP2 = 0x00b6
_IP2H = 0x00b7
_SPSTAT = 0x00cd
_SPCTL = 0x00ce
_SPDAT = 0x00cf
_ADC_CONTR = 0x00bc
_ADC_RES = 0x00bd
_ADC_RESL = 0x00be
_ADCCFG = 0x00de
_ADCTIM_X = 0xfea8
_CCON = 0x00d8
_CMOD = 0x00d9
_CCAPM0 = 0x00da
_CCAPM1 = 0x00db
_CCAPM2 = 0x00dc
_CCAPM3 = 0x00dd
_CCAP0L = 0x00ea
_CCAP1L = 0x00eb
_CCAP2L = 0x00ec
_CCAP3L = 0x00ed
_PCA_PWM0 = 0x00f2
_PCA_PWM1 = 0x00f3
_PCA_PWM2 = 0x00f4
_PCA_PWM3 = 0x00f5
_WDT_CONTR = 0x00c1
_IAP_DATA = 0x00c2
_IAP_ADDRH = 0x00c3
_IAP_ADDRL = 0x00c4
_IAP_CMD = 0x00c5
_IAP_TRIG = 0x00c6
_IAP_CONTR = 0x00c7
_IAP_TPS = 0x00f7
_IRCBAND_REG = 0x009d
_TA = 0x00ae
_CMPCR1 = 0x00e6
_CMPCR2 = 0x00e7
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF0 = 0x008d
_TR0 = 0x008c
_IE0 = 0x0089
_IT0 = 0x0088
_TF1 = 0x008f
_TR1 = 0x008e
_TI = 0x0099
_RI = 0x0098
_REN = 0x009c
_EA = 0x00af
_ES = 0x00ac
_ET0 = 0x00a9
_ET1 = 0x00ab
_EADC = 0x00ad
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; overlayable bit register bank
;--------------------------------------------------------
.area BIT_BANK (REL,OVR,DATA)
bits:
.ds 1
b0 = bits[0]
b1 = bits[1]
b2 = bits[2]
b3 = bits[3]
b4 = bits[4]
b5 = bits[5]
b6 = bits[6]
b7 = bits[7]
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_uart1_send_bytes_PARM_2:
.ds 1
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
.area OSEG (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
_uart1_rx_available_sloc0_1_0:
.ds 1
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
_g_uart1_rx_buf::
.ds 64
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
_g_uart1_rx_head::
.ds 1
_g_uart1_rx_tail::
.ds 1
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_init'
;------------------------------------------------------------
;baud Allocated to registers r4 r5 r6 r7
;b Allocated to registers
;------------------------------------------------------------
; src/uart.c:17: void uart1_init(uint32_t baud)
; -----------------------------------------
; function uart1_init
; -----------------------------------------
_uart1_init:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
mov r4,dpl
mov r5,dph
mov r6,b
mov r7,a
; src/uart.c:20: P3M0 |= 0x02; /* P3.1 推挽输出 */
orl _P3M0,#0x02
; src/uart.c:21: P3M1 &= ~0x02;
anl _P3M1,#0xfd
; src/uart.c:22: P3M0 &= ~0x01; /* P3.0 准双向(默认上拉) */
anl _P3M0,#0xfe
; src/uart.c:23: P3M1 &= ~0x01;
anl _P3M1,#0xfe
; src/uart.c:26: P_SW1 &= ~0x03;
anl _P_SW1,#0xfc
; src/uart.c:28: SCON = 0x50; /* 模式 1 (8 位数据,可变波特率) + REN */
mov _SCON,#0x50
; src/uart.c:39: b = 256 - (uint16_t)(SYS_CLK_HZ / 16 / baud);
mov __divulong_PARM_2,r4
mov (__divulong_PARM_2 + 1),r5
mov (__divulong_PARM_2 + 2),r6
mov (__divulong_PARM_2 + 3),r7
mov dptr,#0xe360
mov b,#0x16
clr a
lcall __divulong
mov r4,dpl
clr c
clr a
subb a,r4
mov _BRT,a
; src/uart.c:42: AUXR |= 0x10; /* S1ST2 = 1: T2 为波特率 (不用) — 实际不用 */
orl _AUXR,#0x10
; src/uart.c:44: AUXR &= ~0x10; /* S1ST2 = 0: T1 为波特率(传统) */
anl _AUXR,#0xef
; src/uart.c:45: AUXR |= 0x01; /* S1BRT = 1: UART1 使用 BRT */
orl _AUXR,#0x01
; src/uart.c:48: ES = 1;
; assignBit
setb _ES
; src/uart.c:49: EA = 1;
; assignBit
setb _EA
; src/uart.c:50: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_send_byte'
;------------------------------------------------------------
;b Allocated to registers r7
;------------------------------------------------------------
; src/uart.c:52: void uart1_send_byte(uint8_t b)
; -----------------------------------------
; function uart1_send_byte
; -----------------------------------------
_uart1_send_byte:
mov r7,dpl
; src/uart.c:54: while (!TI);
00101$:
; src/uart.c:55: TI = 0;
; assignBit
jbc _TI,00114$
sjmp 00101$
00114$:
; src/uart.c:56: SBUF = b;
mov _SBUF,r7
; src/uart.c:57: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_send_bytes'
;------------------------------------------------------------
;len Allocated with name '_uart1_send_bytes_PARM_2'
;buf Allocated to registers
;------------------------------------------------------------
; src/uart.c:59: void uart1_send_bytes(const uint8_t *buf, uint8_t len)
; -----------------------------------------
; function uart1_send_bytes
; -----------------------------------------
_uart1_send_bytes:
mov r5,dpl
mov r6,dph
mov r7,b
; src/uart.c:61: while (len--) uart1_send_byte(*buf++);
mov r4,_uart1_send_bytes_PARM_2
00101$:
mov ar3,r4
dec r4
mov a,r3
jz 00104$
mov dpl,r5
mov dph,r6
mov b,r7
lcall __gptrget
mov r3,a
inc dptr
mov r5,dpl
mov r6,dph
mov dpl,r3
push ar7
push ar6
push ar5
push ar4
lcall _uart1_send_byte
pop ar4
pop ar5
pop ar6
pop ar7
sjmp 00101$
00104$:
; src/uart.c:62: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_rx_available'
;------------------------------------------------------------
; src/uart.c:64: uint8_t uart1_rx_available(void)
; -----------------------------------------
; function uart1_rx_available
; -----------------------------------------
_uart1_rx_available:
; src/uart.c:66: return (g_uart1_rx_head != g_uart1_rx_tail);
mov dptr,#_g_uart1_rx_head
movx a,@dptr
mov r7,a
mov dptr,#_g_uart1_rx_tail
movx a,@dptr
mov r6,a
mov a,r7
cjne a,ar6,00103$
setb c
sjmp 00104$
00103$:
clr c
00104$:
cpl c
mov _uart1_rx_available_sloc0_1_0,c
clr a
rlc a
mov dpl,a
; src/uart.c:67: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_read_byte'
;------------------------------------------------------------
;b Allocated to registers r7
;------------------------------------------------------------
; src/uart.c:69: uint8_t uart1_read_byte(void)
; -----------------------------------------
; function uart1_read_byte
; -----------------------------------------
_uart1_read_byte:
; src/uart.c:71: if (g_uart1_rx_head == g_uart1_rx_tail) return 0;
mov dptr,#_g_uart1_rx_head
movx a,@dptr
mov r7,a
mov dptr,#_g_uart1_rx_tail
movx a,@dptr
mov r6,a
mov a,r7
cjne a,ar6,00102$
mov dpl,#0x00
ret
00102$:
; src/uart.c:72: uint8_t b = g_uart1_rx_buf[g_uart1_rx_tail];
mov dptr,#_g_uart1_rx_tail
movx a,@dptr
add a,#_g_uart1_rx_buf
mov dpl,a
clr a
addc a,#(_g_uart1_rx_buf >> 8)
mov dph,a
movx a,@dptr
mov r7,a
; src/uart.c:73: g_uart1_rx_tail = (g_uart1_rx_tail + 1) % UART1_RX_BUF_SIZE;
mov dptr,#_g_uart1_rx_tail
movx a,@dptr
mov r6,a
mov r5,#0x00
mov dpl,r6
mov dph,r5
inc dptr
mov __modsint_PARM_2,#0x40
; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
mov (__modsint_PARM_2 + 1),r5
push ar7
lcall __modsint
mov r5,dpl
pop ar7
mov dptr,#_g_uart1_rx_tail
mov a,r5
movx @dptr,a
; src/uart.c:74: return b;
mov dpl,r7
; src/uart.c:75: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'uart1_isr'
;------------------------------------------------------------
;next Allocated to registers r6
;------------------------------------------------------------
; src/uart.c:78: void uart1_isr(void) __interrupt (INT_ADDR_UART1)
; -----------------------------------------
; function uart1_isr
; -----------------------------------------
_uart1_isr:
push bits
push acc
push b
push dpl
push dph
push (0+7)
push (0+6)
push (0+5)
push (0+4)
push (0+3)
push (0+2)
push (0+1)
push (0+0)
push psw
mov psw,#0x00
; src/uart.c:80: if (RI) {
; src/uart.c:81: RI = 0;
; assignBit
jbc _RI,00121$
sjmp 00104$
00121$:
; src/uart.c:82: uint8_t next = (g_uart1_rx_head + 1) % UART1_RX_BUF_SIZE;
mov dptr,#_g_uart1_rx_head
movx a,@dptr
mov r7,a
mov r6,#0x00
mov dpl,r7
mov dph,r6
inc dptr
mov __modsint_PARM_2,#0x40
; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
mov (__modsint_PARM_2 + 1),r6
lcall __modsint
mov r6,dpl
; src/uart.c:83: if (next != g_uart1_rx_tail) {
mov dptr,#_g_uart1_rx_tail
movx a,@dptr
mov r7,a
mov a,r6
cjne a,ar7,00122$
sjmp 00104$
00122$:
; src/uart.c:84: g_uart1_rx_buf[g_uart1_rx_head] = SBUF;
mov dptr,#_g_uart1_rx_head
movx a,@dptr
mov r7,a
add a,#_g_uart1_rx_buf
mov dpl,a
clr a
addc a,#(_g_uart1_rx_buf >> 8)
mov dph,a
mov a,_SBUF
movx @dptr,a
; src/uart.c:85: g_uart1_rx_head = next;
mov dptr,#_g_uart1_rx_head
mov a,r6
movx @dptr,a
00104$:
; src/uart.c:88: if (TI) {
; src/uart.c:89: TI = 0;
; assignBit
jbc _TI,00123$
sjmp 00107$
00123$:
00107$:
; src/uart.c:91: }
pop psw
pop (0+0)
pop (0+1)
pop (0+2)
pop (0+3)
pop (0+4)
pop (0+5)
pop (0+6)
pop (0+7)
pop dph
pop dpl
pop b
pop acc
pop bits
reti
.area CSEG (CODE)
.area CONST (CODE)
_DEFAULT_ADDR:
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xe7 ; 231
.db #0xc2 ; 194
.area XINIT (CODE)
__xinit__g_uart1_rx_head:
.db #0x00 ; 0
__xinit__g_uart1_rx_tail:
.db #0x00 ; 0
.area CABS (ABS,CODE)
AliceRX_STC/build/uart.lst
+648
View File
@@ -0,0 +1,648 @@
1 ;--------------------------------------------------------
2 ; File Created by SDCC : free open source ANSI-C Compiler
3 ; Version 4.2.0 #13081 (Linux)
4 ;--------------------------------------------------------
5 .module uart
6 .optsdcc -mmcs51 --model-small
7
8 ;--------------------------------------------------------
9 ; Public variables in this module
10 ;--------------------------------------------------------
11 .globl _uart1_isr
12 .globl _EADC
13 .globl _ET1
14 .globl _ET0
15 .globl _ES
16 .globl _EA
17 .globl _REN
18 .globl _RI
19 .globl _TI
20 .globl _TR1
21 .globl _TF1
22 .globl _IT0
23 .globl _IE0
24 .globl _TR0
25 .globl _TF0
26 .globl _CMPCR2
27 .globl _CMPCR1
28 .globl _TA
29 .globl _IRCBAND_REG
30 .globl _IAP_TPS
31 .globl _IAP_CONTR
32 .globl _IAP_TRIG
33 .globl _IAP_CMD
34 .globl _IAP_ADDRL
35 .globl _IAP_ADDRH
36 .globl _IAP_DATA
37 .globl _WDT_CONTR
38 .globl _PCA_PWM3
39 .globl _PCA_PWM2
40 .globl _PCA_PWM1
41 .globl _PCA_PWM0
42 .globl _CCAP3L
43 .globl _CCAP2L
44 .globl _CCAP1L
45 .globl _CCAP0L
46 .globl _CCAPM3
47 .globl _CCAPM2
48 .globl _CCAPM1
49 .globl _CCAPM0
50 .globl _CMOD
51 .globl _CCON
52 .globl _ADCTIM_X
53 .globl _ADCCFG
54 .globl _ADC_RESL
55 .globl _ADC_RES
56 .globl _ADC_CONTR
57 .globl _SPDAT
58 .globl _SPCTL
59 .globl _SPSTAT
60 .globl _IP2H
61 .globl _IP2
62 .globl _IP
63 .globl _IE2
64 .globl _IE
65 .globl _BRT
66 .globl _P_SW1
67 .globl _SADEN
68 .globl _SADDR
69 .globl _S2BUF
70 .globl _S2CON
71 .globl _SBUF
72 .globl _SCON
73 .globl _TM4PS_X
74 .globl _TM3PS_X
75 .globl _TM2PS_X
76 .globl _T4T3M
77 .globl _T4L
78 .globl _T4H
79 .globl _T3L
80 .globl _T3H
81 .globl _T2L
82 .globl _T2H
83 .globl _INTCLKO
84 .globl _AUXR
85 .globl _TH1
86 .globl _TH0
87 .globl _TL1
88 .globl _TL0
89 .globl _TMOD
90 .globl _TCON
91 .globl _P_SW2
92 .globl _P5M0
93 .globl _P5M1
94 .globl _P4M0
95 .globl _P4M1
96 .globl _P3M0
97 .globl _P3M1
98 .globl _P2M0
99 .globl _P2M1
100 .globl _P1M0
101 .globl _P1M1
102 .globl _P0M0
103 .globl _P0M1
104 .globl _PSW
105 .globl _B
106 .globl _ACC
107 .globl _PCON
108 .globl _DPH
109 .globl _DPL
110 .globl _SP
111 .globl _P5
112 .globl _P4
113 .globl _P3
114 .globl _P2
115 .globl _P1
116 .globl _P0
117 .globl _g_uart1_rx_tail
118 .globl _g_uart1_rx_head
119 .globl _g_uart1_rx_buf
120 .globl _uart1_send_bytes_PARM_2
121 .globl _uart1_init
122 .globl _uart1_send_byte
123 .globl _uart1_send_bytes
124 .globl _uart1_rx_available
125 .globl _uart1_read_byte
126 ;--------------------------------------------------------
127 ; special function registers
128 ;--------------------------------------------------------
129 .area RSEG (ABS,DATA)
000000 130 .org 0x0000
000080 131 _P0 = 0x0080
000090 132 _P1 = 0x0090
0000A0 133 _P2 = 0x00a0
0000B0 134 _P3 = 0x00b0
0000C0 135 _P4 = 0x00c0
0000C8 136 _P5 = 0x00c8
000081 137 _SP = 0x0081
000082 138 _DPL = 0x0082
000083 139 _DPH = 0x0083
000087 140 _PCON = 0x0087
0000E0 141 _ACC = 0x00e0
0000F0 142 _B = 0x00f0
0000D0 143 _PSW = 0x00d0
000093 144 _P0M1 = 0x0093
000094 145 _P0M0 = 0x0094
000091 146 _P1M1 = 0x0091
000092 147 _P1M0 = 0x0092
000095 148 _P2M1 = 0x0095
000096 149 _P2M0 = 0x0096
0000B1 150 _P3M1 = 0x00b1
0000B2 151 _P3M0 = 0x00b2
0000B3 152 _P4M1 = 0x00b3
0000B4 153 _P4M0 = 0x00b4
0000C9 154 _P5M1 = 0x00c9
0000CA 155 _P5M0 = 0x00ca
0000BA 156 _P_SW2 = 0x00ba
000088 157 _TCON = 0x0088
000089 158 _TMOD = 0x0089
00008A 159 _TL0 = 0x008a
00008B 160 _TL1 = 0x008b
00008C 161 _TH0 = 0x008c
00008D 162 _TH1 = 0x008d
00008E 163 _AUXR = 0x008e
00008F 164 _INTCLKO = 0x008f
0000D6 165 _T2H = 0x00d6
0000D7 166 _T2L = 0x00d7
0000D4 167 _T3H = 0x00d4
0000D5 168 _T3L = 0x00d5
0000D2 169 _T4H = 0x00d2
0000D3 170 _T4L = 0x00d3
0000D1 171 _T4T3M = 0x00d1
00FEA1 172 _TM2PS_X = 0xfea1
00FEA2 173 _TM3PS_X = 0xfea2
00FEA3 174 _TM4PS_X = 0xfea3
000098 175 _SCON = 0x0098
000099 176 _SBUF = 0x0099
00009A 177 _S2CON = 0x009a
00009B 178 _S2BUF = 0x009b
0000A9 179 _SADDR = 0x00a9
0000B9 180 _SADEN = 0x00b9
0000A2 181 _P_SW1 = 0x00a2
00009C 182 _BRT = 0x009c
0000A8 183 _IE = 0x00a8
0000AF 184 _IE2 = 0x00af
0000B8 185 _IP = 0x00b8
0000B6 186 _IP2 = 0x00b6
0000B7 187 _IP2H = 0x00b7
0000CD 188 _SPSTAT = 0x00cd
0000CE 189 _SPCTL = 0x00ce
0000CF 190 _SPDAT = 0x00cf
0000BC 191 _ADC_CONTR = 0x00bc
0000BD 192 _ADC_RES = 0x00bd
0000BE 193 _ADC_RESL = 0x00be
0000DE 194 _ADCCFG = 0x00de
00FEA8 195 _ADCTIM_X = 0xfea8
0000D8 196 _CCON = 0x00d8
0000D9 197 _CMOD = 0x00d9
0000DA 198 _CCAPM0 = 0x00da
0000DB 199 _CCAPM1 = 0x00db
0000DC 200 _CCAPM2 = 0x00dc
0000DD 201 _CCAPM3 = 0x00dd
0000EA 202 _CCAP0L = 0x00ea
0000EB 203 _CCAP1L = 0x00eb
0000EC 204 _CCAP2L = 0x00ec
0000ED 205 _CCAP3L = 0x00ed
0000F2 206 _PCA_PWM0 = 0x00f2
0000F3 207 _PCA_PWM1 = 0x00f3
0000F4 208 _PCA_PWM2 = 0x00f4
0000F5 209 _PCA_PWM3 = 0x00f5
0000C1 210 _WDT_CONTR = 0x00c1
0000C2 211 _IAP_DATA = 0x00c2
0000C3 212 _IAP_ADDRH = 0x00c3
0000C4 213 _IAP_ADDRL = 0x00c4
0000C5 214 _IAP_CMD = 0x00c5
0000C6 215 _IAP_TRIG = 0x00c6
0000C7 216 _IAP_CONTR = 0x00c7
0000F7 217 _IAP_TPS = 0x00f7
00009D 218 _IRCBAND_REG = 0x009d
0000AE 219 _TA = 0x00ae
0000E6 220 _CMPCR1 = 0x00e6
0000E7 221 _CMPCR2 = 0x00e7
222 ;--------------------------------------------------------
223 ; special function bits
224 ;--------------------------------------------------------
225 .area RSEG (ABS,DATA)
000000 226 .org 0x0000
00008D 227 _TF0 = 0x008d
00008C 228 _TR0 = 0x008c
000089 229 _IE0 = 0x0089
000088 230 _IT0 = 0x0088
00008F 231 _TF1 = 0x008f
00008E 232 _TR1 = 0x008e
000099 233 _TI = 0x0099
000098 234 _RI = 0x0098
00009C 235 _REN = 0x009c
0000AF 236 _EA = 0x00af
0000AC 237 _ES = 0x00ac
0000A9 238 _ET0 = 0x00a9
0000AB 239 _ET1 = 0x00ab
0000AD 240 _EADC = 0x00ad
241 ;--------------------------------------------------------
242 ; overlayable register banks
243 ;--------------------------------------------------------
244 .area REG_BANK_0 (REL,OVR,DATA)
000000 245 .ds 8
246 ;--------------------------------------------------------
247 ; overlayable bit register bank
248 ;--------------------------------------------------------
249 .area BIT_BANK (REL,OVR,DATA)
000000 250 bits:
000000 251 .ds 1
008000 252 b0 = bits[0]
008100 253 b1 = bits[1]
008200 254 b2 = bits[2]
008300 255 b3 = bits[3]
008400 256 b4 = bits[4]
008500 257 b5 = bits[5]
008600 258 b6 = bits[6]
008700 259 b7 = bits[7]
260 ;--------------------------------------------------------
261 ; internal ram data
262 ;--------------------------------------------------------
263 .area DSEG (DATA)
000000 264 _uart1_send_bytes_PARM_2:
000000 265 .ds 1
266 ;--------------------------------------------------------
267 ; overlayable items in internal ram
268 ;--------------------------------------------------------
269 .area OSEG (OVR,DATA)
270 ;--------------------------------------------------------
271 ; indirectly addressable internal ram data
272 ;--------------------------------------------------------
273 .area ISEG (DATA)
274 ;--------------------------------------------------------
275 ; absolute internal ram data
276 ;--------------------------------------------------------
277 .area IABS (ABS,DATA)
278 .area IABS (ABS,DATA)
279 ;--------------------------------------------------------
280 ; bit data
281 ;--------------------------------------------------------
282 .area BSEG (BIT)
000000 283 _uart1_rx_available_sloc0_1_0:
000000 284 .ds 1
285 ;--------------------------------------------------------
286 ; paged external ram data
287 ;--------------------------------------------------------
288 .area PSEG (PAG,XDATA)
289 ;--------------------------------------------------------
290 ; external ram data
291 ;--------------------------------------------------------
292 .area XSEG (XDATA)
000000 293 _g_uart1_rx_buf::
000000 294 .ds 64
295 ;--------------------------------------------------------
296 ; absolute external ram data
297 ;--------------------------------------------------------
298 .area XABS (ABS,XDATA)
299 ;--------------------------------------------------------
300 ; external initialized ram data
301 ;--------------------------------------------------------
302 .area XISEG (XDATA)
000000 303 _g_uart1_rx_head::
000000 304 .ds 1
000001 305 _g_uart1_rx_tail::
000001 306 .ds 1
307 .area HOME (CODE)
308 .area GSINIT0 (CODE)
309 .area GSINIT1 (CODE)
310 .area GSINIT2 (CODE)
311 .area GSINIT3 (CODE)
312 .area GSINIT4 (CODE)
313 .area GSINIT5 (CODE)
314 .area GSINIT (CODE)
315 .area GSFINAL (CODE)
316 .area CSEG (CODE)
317 ;--------------------------------------------------------
318 ; global & static initialisations
319 ;--------------------------------------------------------
320 .area HOME (CODE)
321 .area GSINIT (CODE)
322 .area GSFINAL (CODE)
323 .area GSINIT (CODE)
324 ;--------------------------------------------------------
325 ; Home
326 ;--------------------------------------------------------
327 .area HOME (CODE)
328 .area HOME (CODE)
329 ;--------------------------------------------------------
330 ; code
331 ;--------------------------------------------------------
332 .area CSEG (CODE)
333 ;------------------------------------------------------------
334 ;Allocation info for local variables in function 'uart1_init'
335 ;------------------------------------------------------------
336 ;baud Allocated to registers r4 r5 r6 r7
337 ;b Allocated to registers
338 ;------------------------------------------------------------
339 ; src/uart.c:17: void uart1_init(uint32_t baud)
340 ; -----------------------------------------
341 ; function uart1_init
342 ; -----------------------------------------
000000 343 _uart1_init:
000007 344 ar7 = 0x07
000006 345 ar6 = 0x06
000005 346 ar5 = 0x05
000004 347 ar4 = 0x04
000003 348 ar3 = 0x03
000002 349 ar2 = 0x02
000001 350 ar1 = 0x01
000000 351 ar0 = 0x00
000000 AC 82 [24] 352 mov r4,dpl
000002 AD 83 [24] 353 mov r5,dph
000004 AE F0 [24] 354 mov r6,b
000006 FF [12] 355 mov r7,a
356 ; src/uart.c:20: P3M0 |= 0x02; /* P3.1 推挽输出 */
000007 43 B2 02 [24] 357 orl _P3M0,#0x02
358 ; src/uart.c:21: P3M1 &= ~0x02;
00000A 53 B1 FD [24] 359 anl _P3M1,#0xfd
360 ; src/uart.c:22: P3M0 &= ~0x01; /* P3.0 准双向(默认上拉) */
00000D 53 B2 FE [24] 361 anl _P3M0,#0xfe
362 ; src/uart.c:23: P3M1 &= ~0x01;
000010 53 B1 FE [24] 363 anl _P3M1,#0xfe
364 ; src/uart.c:26: P_SW1 &= ~0x03;
000013 53 A2 FC [24] 365 anl _P_SW1,#0xfc
366 ; src/uart.c:28: SCON = 0x50; /* 模式 1 (8 位数据,可变波特率) + REN */
000016 75 98 50 [24] 367 mov _SCON,#0x50
368 ; src/uart.c:39: b = 256 - (uint16_t)(SYS_CLK_HZ / 16 / baud);
000019 8C*00 [24] 369 mov __divulong_PARM_2,r4
00001B 8D*01 [24] 370 mov (__divulong_PARM_2 + 1),r5
00001D 8E*02 [24] 371 mov (__divulong_PARM_2 + 2),r6
00001F 8F*03 [24] 372 mov (__divulong_PARM_2 + 3),r7
000021 90 E3 60 [24] 373 mov dptr,#0xe360
000024 75 F0 16 [24] 374 mov b,#0x16
000027 E4 [12] 375 clr a
000028 12r00r00 [24] 376 lcall __divulong
00002B AC 82 [24] 377 mov r4,dpl
00002D C3 [12] 378 clr c
00002E E4 [12] 379 clr a
00002F 9C [12] 380 subb a,r4
000030 F5 9C [12] 381 mov _BRT,a
382 ; src/uart.c:42: AUXR |= 0x10; /* S1ST2 = 1: T2 为波特率 (不用) — 实际不用 */
000032 43 8E 10 [24] 383 orl _AUXR,#0x10
384 ; src/uart.c:44: AUXR &= ~0x10; /* S1ST2 = 0: T1 为波特率(传统) */
000035 53 8E EF [24] 385 anl _AUXR,#0xef
386 ; src/uart.c:45: AUXR |= 0x01; /* S1BRT = 1: UART1 使用 BRT */
000038 43 8E 01 [24] 387 orl _AUXR,#0x01
388 ; src/uart.c:48: ES = 1;
389 ; assignBit
00003B D2 AC [12] 390 setb _ES
391 ; src/uart.c:49: EA = 1;
392 ; assignBit
00003D D2 AF [12] 393 setb _EA
394 ; src/uart.c:50: }
00003F 22 [24] 395 ret
396 ;------------------------------------------------------------
397 ;Allocation info for local variables in function 'uart1_send_byte'
398 ;------------------------------------------------------------
399 ;b Allocated to registers r7
400 ;------------------------------------------------------------
401 ; src/uart.c:52: void uart1_send_byte(uint8_t b)
402 ; -----------------------------------------
403 ; function uart1_send_byte
404 ; -----------------------------------------
000040 405 _uart1_send_byte:
000040 AF 82 [24] 406 mov r7,dpl
407 ; src/uart.c:54: while (!TI);
000042 408 00101$:
409 ; src/uart.c:55: TI = 0;
410 ; assignBit
000042 10 99 02 [24] 411 jbc _TI,00114$
000045 80 FB [24] 412 sjmp 00101$
000047 413 00114$:
414 ; src/uart.c:56: SBUF = b;
000047 8F 99 [24] 415 mov _SBUF,r7
416 ; src/uart.c:57: }
000049 22 [24] 417 ret
418 ;------------------------------------------------------------
419 ;Allocation info for local variables in function 'uart1_send_bytes'
420 ;------------------------------------------------------------
421 ;len Allocated with name '_uart1_send_bytes_PARM_2'
422 ;buf Allocated to registers
423 ;------------------------------------------------------------
424 ; src/uart.c:59: void uart1_send_bytes(const uint8_t *buf, uint8_t len)
425 ; -----------------------------------------
426 ; function uart1_send_bytes
427 ; -----------------------------------------
00004A 428 _uart1_send_bytes:
00004A AD 82 [24] 429 mov r5,dpl
00004C AE 83 [24] 430 mov r6,dph
00004E AF F0 [24] 431 mov r7,b
432 ; src/uart.c:61: while (len--) uart1_send_byte(*buf++);
000050 AC*00 [24] 433 mov r4,_uart1_send_bytes_PARM_2
000052 434 00101$:
000052 8C 03 [24] 435 mov ar3,r4
000054 1C [12] 436 dec r4
000055 EB [12] 437 mov a,r3
000056 60 26 [24] 438 jz 00104$
000058 8D 82 [24] 439 mov dpl,r5
00005A 8E 83 [24] 440 mov dph,r6
00005C 8F F0 [24] 441 mov b,r7
00005E 12r00r00 [24] 442 lcall __gptrget
000061 FB [12] 443 mov r3,a
000062 A3 [24] 444 inc dptr
000063 AD 82 [24] 445 mov r5,dpl
000065 AE 83 [24] 446 mov r6,dph
000067 8B 82 [24] 447 mov dpl,r3
000069 C0 07 [24] 448 push ar7
00006B C0 06 [24] 449 push ar6
00006D C0 05 [24] 450 push ar5
00006F C0 04 [24] 451 push ar4
000071 12r00r40 [24] 452 lcall _uart1_send_byte
000074 D0 04 [24] 453 pop ar4
000076 D0 05 [24] 454 pop ar5
000078 D0 06 [24] 455 pop ar6
00007A D0 07 [24] 456 pop ar7
00007C 80 D4 [24] 457 sjmp 00101$
00007E 458 00104$:
459 ; src/uart.c:62: }
00007E 22 [24] 460 ret
461 ;------------------------------------------------------------
462 ;Allocation info for local variables in function 'uart1_rx_available'
463 ;------------------------------------------------------------
464 ; src/uart.c:64: uint8_t uart1_rx_available(void)
465 ; -----------------------------------------
466 ; function uart1_rx_available
467 ; -----------------------------------------
00007F 468 _uart1_rx_available:
469 ; src/uart.c:66: return (g_uart1_rx_head != g_uart1_rx_tail);
00007F 90r00r00 [24] 470 mov dptr,#_g_uart1_rx_head
000082 E0 [24] 471 movx a,@dptr
000083 FF [12] 472 mov r7,a
000084 90r00r01 [24] 473 mov dptr,#_g_uart1_rx_tail
000087 E0 [24] 474 movx a,@dptr
000088 FE [12] 475 mov r6,a
000089 EF [12] 476 mov a,r7
00008A B5 06 03 [24] 477 cjne a,ar6,00103$
00008D D3 [12] 478 setb c
00008E 80 01 [24] 479 sjmp 00104$
000090 480 00103$:
000090 C3 [12] 481 clr c
000091 482 00104$:
000091 B3 [12] 483 cpl c
000092 92*00 [24] 484 mov _uart1_rx_available_sloc0_1_0,c
000094 E4 [12] 485 clr a
000095 33 [12] 486 rlc a
000096 F5 82 [12] 487 mov dpl,a
488 ; src/uart.c:67: }
000098 22 [24] 489 ret
490 ;------------------------------------------------------------
491 ;Allocation info for local variables in function 'uart1_read_byte'
492 ;------------------------------------------------------------
493 ;b Allocated to registers r7
494 ;------------------------------------------------------------
495 ; src/uart.c:69: uint8_t uart1_read_byte(void)
496 ; -----------------------------------------
497 ; function uart1_read_byte
498 ; -----------------------------------------
000099 499 _uart1_read_byte:
500 ; src/uart.c:71: if (g_uart1_rx_head == g_uart1_rx_tail) return 0;
000099 90r00r00 [24] 501 mov dptr,#_g_uart1_rx_head
00009C E0 [24] 502 movx a,@dptr
00009D FF [12] 503 mov r7,a
00009E 90r00r01 [24] 504 mov dptr,#_g_uart1_rx_tail
0000A1 E0 [24] 505 movx a,@dptr
0000A2 FE [12] 506 mov r6,a
0000A3 EF [12] 507 mov a,r7
0000A4 B5 06 04 [24] 508 cjne a,ar6,00102$
0000A7 75 82 00 [24] 509 mov dpl,#0x00
0000AA 22 [24] 510 ret
0000AB 511 00102$:
512 ; src/uart.c:72: uint8_t b = g_uart1_rx_buf[g_uart1_rx_tail];
0000AB 90r00r01 [24] 513 mov dptr,#_g_uart1_rx_tail
0000AE E0 [24] 514 movx a,@dptr
0000AF 24r00 [12] 515 add a,#_g_uart1_rx_buf
0000B1 F5 82 [12] 516 mov dpl,a
0000B3 E4 [12] 517 clr a
0000B4 34s00 [12] 518 addc a,#(_g_uart1_rx_buf >> 8)
0000B6 F5 83 [12] 519 mov dph,a
0000B8 E0 [24] 520 movx a,@dptr
0000B9 FF [12] 521 mov r7,a
522 ; src/uart.c:73: g_uart1_rx_tail = (g_uart1_rx_tail + 1) % UART1_RX_BUF_SIZE;
0000BA 90r00r01 [24] 523 mov dptr,#_g_uart1_rx_tail
0000BD E0 [24] 524 movx a,@dptr
0000BE FE [12] 525 mov r6,a
0000BF 7D 00 [12] 526 mov r5,#0x00
0000C1 8E 82 [24] 527 mov dpl,r6
0000C3 8D 83 [24] 528 mov dph,r5
0000C5 A3 [24] 529 inc dptr
0000C6 75*00 40 [24] 530 mov __modsint_PARM_2,#0x40
531 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
0000C9 8D*01 [24] 532 mov (__modsint_PARM_2 + 1),r5
0000CB C0 07 [24] 533 push ar7
0000CD 12r00r00 [24] 534 lcall __modsint
0000D0 AD 82 [24] 535 mov r5,dpl
0000D2 D0 07 [24] 536 pop ar7
0000D4 90r00r01 [24] 537 mov dptr,#_g_uart1_rx_tail
0000D7 ED [12] 538 mov a,r5
0000D8 F0 [24] 539 movx @dptr,a
540 ; src/uart.c:74: return b;
0000D9 8F 82 [24] 541 mov dpl,r7
542 ; src/uart.c:75: }
0000DB 22 [24] 543 ret
544 ;------------------------------------------------------------
545 ;Allocation info for local variables in function 'uart1_isr'
546 ;------------------------------------------------------------
547 ;next Allocated to registers r6
548 ;------------------------------------------------------------
549 ; src/uart.c:78: void uart1_isr(void) __interrupt (INT_ADDR_UART1)
550 ; -----------------------------------------
551 ; function uart1_isr
552 ; -----------------------------------------
0000DC 553 _uart1_isr:
0000DC C0*00 [24] 554 push bits
0000DE C0 E0 [24] 555 push acc
0000E0 C0 F0 [24] 556 push b
0000E2 C0 82 [24] 557 push dpl
0000E4 C0 83 [24] 558 push dph
0000E6 C0 07 [24] 559 push (0+7)
0000E8 C0 06 [24] 560 push (0+6)
0000EA C0 05 [24] 561 push (0+5)
0000EC C0 04 [24] 562 push (0+4)
0000EE C0 03 [24] 563 push (0+3)
0000F0 C0 02 [24] 564 push (0+2)
0000F2 C0 01 [24] 565 push (0+1)
0000F4 C0 00 [24] 566 push (0+0)
0000F6 C0 D0 [24] 567 push psw
0000F8 75 D0 00 [24] 568 mov psw,#0x00
569 ; src/uart.c:80: if (RI) {
570 ; src/uart.c:81: RI = 0;
571 ; assignBit
0000FB 10 98 02 [24] 572 jbc _RI,00121$
0000FE 80 37 [24] 573 sjmp 00104$
000100 574 00121$:
575 ; src/uart.c:82: uint8_t next = (g_uart1_rx_head + 1) % UART1_RX_BUF_SIZE;
000100 90r00r00 [24] 576 mov dptr,#_g_uart1_rx_head
000103 E0 [24] 577 movx a,@dptr
000104 FF [12] 578 mov r7,a
000105 7E 00 [12] 579 mov r6,#0x00
000107 8F 82 [24] 580 mov dpl,r7
000109 8E 83 [24] 581 mov dph,r6
00010B A3 [24] 582 inc dptr
00010C 75*00 40 [24] 583 mov __modsint_PARM_2,#0x40
584 ; 1-genFromRTrack replaced mov (__modsint_PARM_2 + 1),#0x00
00010F 8E*01 [24] 585 mov (__modsint_PARM_2 + 1),r6
000111 12r00r00 [24] 586 lcall __modsint
000114 AE 82 [24] 587 mov r6,dpl
588 ; src/uart.c:83: if (next != g_uart1_rx_tail) {
000116 90r00r01 [24] 589 mov dptr,#_g_uart1_rx_tail
000119 E0 [24] 590 movx a,@dptr
00011A FF [12] 591 mov r7,a
00011B EE [12] 592 mov a,r6
00011C B5 07 02 [24] 593 cjne a,ar7,00122$
00011F 80 16 [24] 594 sjmp 00104$
000121 595 00122$:
596 ; src/uart.c:84: g_uart1_rx_buf[g_uart1_rx_head] = SBUF;
000121 90r00r00 [24] 597 mov dptr,#_g_uart1_rx_head
000124 E0 [24] 598 movx a,@dptr
000125 FF [12] 599 mov r7,a
000126 24r00 [12] 600 add a,#_g_uart1_rx_buf
000128 F5 82 [12] 601 mov dpl,a
00012A E4 [12] 602 clr a
00012B 34s00 [12] 603 addc a,#(_g_uart1_rx_buf >> 8)
00012D F5 83 [12] 604 mov dph,a
00012F E5 99 [12] 605 mov a,_SBUF
000131 F0 [24] 606 movx @dptr,a
607 ; src/uart.c:85: g_uart1_rx_head = next;
000132 90r00r00 [24] 608 mov dptr,#_g_uart1_rx_head
000135 EE [12] 609 mov a,r6
000136 F0 [24] 610 movx @dptr,a
000137 611 00104$:
612 ; src/uart.c:88: if (TI) {
613 ; src/uart.c:89: TI = 0;
614 ; assignBit
000137 10 99 02 [24] 615 jbc _TI,00123$
00013A 80 00 [24] 616 sjmp 00107$
00013C 617 00123$:
00013C 618 00107$:
619 ; src/uart.c:91: }
00013C D0 D0 [24] 620 pop psw
00013E D0 00 [24] 621 pop (0+0)
000140 D0 01 [24] 622 pop (0+1)
000142 D0 02 [24] 623 pop (0+2)
000144 D0 03 [24] 624 pop (0+3)
000146 D0 04 [24] 625 pop (0+4)
000148 D0 05 [24] 626 pop (0+5)
00014A D0 06 [24] 627 pop (0+6)
00014C D0 07 [24] 628 pop (0+7)
00014E D0 83 [24] 629 pop dph
000150 D0 82 [24] 630 pop dpl
000152 D0 F0 [24] 631 pop b
000154 D0 E0 [24] 632 pop acc
000156 D0*00 [24] 633 pop bits
000158 32 [24] 634 reti
635 .area CSEG (CODE)
636 .area CONST (CODE)
000000 637 _DEFAULT_ADDR:
000000 E7 638 .db #0xe7 ; 231
000001 E7 639 .db #0xe7 ; 231
000002 E7 640 .db #0xe7 ; 231
000003 E7 641 .db #0xe7 ; 231
000004 C2 642 .db #0xc2 ; 194
643 .area XINIT (CODE)
000000 644 __xinit__g_uart1_rx_head:
000000 00 645 .db #0x00 ; 0
000001 646 __xinit__g_uart1_rx_tail:
000001 00 647 .db #0x00 ; 0
648 .area CABS (ABS,CODE)
AliceRX_STC/build/uart.rel
+309
View File
@@ -0,0 +1,309 @@
XH3
H 1C areas 79 global symbols
M uart
O -mmcs51 --model-small
S _S2BUF Def00009B
S _SP Def000081
S _CCON Def0000D8
S _CMOD Def0000D9
S _S2CON Def00009A
S _REN Def00009C
S _CMPCR1 Def0000E6
S __divulong_PARM_2 Ref000000
S _CMPCR2 Def0000E7
S _BRT Def00009C
S _ADCTIM_X Def00FEA8
S _SADEN Def0000B9
S _TM2PS_X Def00FEA1
S _ADC_CONTR Def0000BC
S _TM3PS_X Def00FEA2
S _SADDR Def0000A9
S _TM4PS_X Def00FEA3
S _IAP_TRIG Def0000C6
S _PCON Def000087
S _SBUF Def000099
S _IAP_TPS Def0000F7
S _IRCBAND_REG Def00009D
S _SCON Def000098
S _TCON Def000088
S _TMOD Def000089
S _PSW Def0000D0
S _SPDAT Def0000CF
S __modsint_PARM_2 Ref000000
S _P0M0 Def000094
S _P0M1 Def000093
S _P1M0 Def000092
S _IE0 Def000089
S _P1M1 Def000091
S _P2M0 Def000096
S _IAP_CONTR Def0000C7
S .__.ABS. Def000000
S _P0 Def000080
S _P2M1 Def000095
S _P3M0 Def0000B2
S _AUXR Def00008E
S _IE2 Def0000AF
S _P1 Def000090
S _P3M1 Def0000B1
S _P4M0 Def0000B4
S _P2 Def0000A0
S _B Def0000F0
S _P4M1 Def0000B3
S _P5M0 Def0000CA
S _P3 Def0000B0
S _P5M1 Def0000C9
S _P4 Def0000C0
S _P5 Def0000C8
S _SPCTL Def0000CE
S _EA Def0000AF
S __divulong Ref000000
S _ACC Def0000E0
S _ET0 Def0000A9
S _P_SW1 Def0000A2
S _TF0 Def00008D
S _ET1 Def0000AB
S _P_SW2 Def0000BA
S _IP2 Def0000B6
S _TF1 Def00008F
S _TH0 Def00008C
S _TH1 Def00008D
S _IAP_CMD Def0000C5
S _IT0 Def000088
S _EADC Def0000AD
S _T2H Def0000D6
S _IE Def0000A8
S _T3H Def0000D4
S _TL0 Def00008A
S _T4H Def0000D2
S _TL1 Def00008B
S _ADC_RES Def0000BD
S _T2L Def0000D7
S _T3L Def0000D5
S _IP2H Def0000B7
S _CCAP0L Def0000EA
S _IAP_DATA Def0000C2
S _INTCLKO Def00008F
S _T4L Def0000D3
S _CCAPM0 Def0000DA
S _CCAP1L Def0000EB
S _WDT_CONTR Def0000C1
S _CCAPM1 Def0000DB
S _CCAP2L Def0000EC
S _TA Def0000AE
S _CCAPM2 Def0000DC
S _CCAP3L Def0000ED
S _TR0 Def00008C
S _CCAPM3 Def0000DD
S _PCA_PWM0 Def0000F2
S _TR1 Def00008E
S _ADCCFG Def0000DE
S _PCA_PWM1 Def0000F3
S _ES Def0000AC
S _IP Def0000B8
S _PCA_PWM2 Def0000F4
S _PCA_PWM3 Def0000F5
S _RI Def000098
S __gptrget Ref000000
S _DPH Def000083
S _T4T3M Def0000D1
S _IAP_ADDRH Def0000C3
S __modsint Ref000000
S _ADC_RESL Def0000BE
S _TI Def000099
S _SPSTAT Def0000CD
S _DPL Def000082
S _IAP_ADDRL Def0000C4
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A BIT_BANK size 1 flags 4 addr 0
A DSEG size 1 flags 0 addr 0
S _uart1_send_bytes_PARM_2 Def000000
A OSEG size 0 flags 4 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 1 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 40 flags 40 addr 0
S _g_uart1_rx_buf Def000000
A XABS size 0 flags 48 addr 0
A XISEG size 2 flags 40 addr 0
S _g_uart1_rx_head Def000000
S _g_uart1_rx_tail Def000001
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 159 flags 20 addr 0
S _uart1_rx_available Def00007F
S _uart1_read_byte Def000099
S _uart1_send_bytes Def00004A
S _uart1_init Def000000
S _uart1_send_byte Def000040
S _uart1_isr Def0000DC
A CONST size 5 flags 20 addr 0
A XINIT size 2 flags 20 addr 0
A CABS size 0 flags 28 addr 0
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R 00 00 00 02
T 00 00 00
R 00 00 00 03
T 00 00 00
R 00 00 00 04
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 05
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 06
T 00 00 00
R 00 00 00 0A
T 00 00 00
R 00 00 00 0A
T 00 00 00
R 00 00 00 0C
T 00 00 00
R 00 00 00 0C
T 00 00 00
R 00 00 00 0E
T 00 00 00
R 00 00 00 0E
T 00 00 01
R 00 00 00 0E
T 00 00 01
R 00 00 00 0E
T 00 00 00
R 00 00 00 18
T 00 00 00 AC 82 AD 83 AE F0 FF 43 B2 02 53 B1 FD
R 00 00 00 18
T 00 00 0D 53 B2 FE 53 B1 FE 53 A2 FC 75 98 50 8C
R 00 00 00 18
T 00 00 1A 00 00 00 8D 00 00 01 8E
R 00 00 00 18 F1 23 03 00 07 F1 23 07 00 07
T 00 00 1E 00 00 02 8F 00 00 03 90 E3 60 75 F0 16
R 00 00 00 18 F1 23 03 00 07 F1 23 07 00 07
T 00 00 27 E4 12 00 00 AC 82 C3 E4 9C F5 9C 43 8E
R 00 00 00 18 02 05 00 36
T 00 00 34 10 53 8E EF 43 8E 01 D2 AC D2 AF 22
R 00 00 00 18
T 00 00 40
R 00 00 00 18
T 00 00 40 AF 82
R 00 00 00 18
T 00 00 42
R 00 00 00 18
T 00 00 42 10 99 02 80 FB
R 00 00 00 18
T 00 00 47
R 00 00 00 18
T 00 00 47 8F 99 22
R 00 00 00 18
T 00 00 4A
R 00 00 00 18
T 00 00 4A AD 82 AE 83 AF F0 AC 00 00 00
R 00 00 00 18 F1 21 0A 00 06
T 00 00 52
R 00 00 00 18
T 00 00 52 8C 03 1C EB 60 26 8D 82 8E 83 8F F0 12
R 00 00 00 18
T 00 00 5F 00 00 FB A3 AD 82 AE 83 8B 82 C0 07 C0
R 00 00 00 18 02 03 00 65
T 00 00 6C 06 C0 05 C0 04 12 00 40 D0 04 D0 05 D0
R 00 00 00 18 00 09 00 18
T 00 00 79 06 D0 07 80 D4
R 00 00 00 18
T 00 00 7E
R 00 00 00 18
T 00 00 7E 22
R 00 00 00 18
T 00 00 7F
R 00 00 00 18
T 00 00 7F 90 00 00 E0 FF 90 00 01 E0 FE EF B5 06
R 00 00 00 18 00 04 00 0E 00 09 00 0E
T 00 00 8C 03 D3 80 01
R 00 00 00 18
T 00 00 90
R 00 00 00 18
T 00 00 90 C3
R 00 00 00 18
T 00 00 91
R 00 00 00 18
T 00 00 91 B3 92 00 00 00 E4 33 F5 82 22
R 00 00 00 18 F1 21 05 00 0A
T 00 00 99
R 00 00 00 18
T 00 00 99 90 00 00 E0 FF 90 00 01 E0 FE EF B5 06
R 00 00 00 18 00 04 00 0E 00 09 00 0E
T 00 00 A6 04 75 82 00 22
R 00 00 00 18
T 00 00 AB
R 00 00 00 18
T 00 00 AB 90 00 01 E0 24 00 00 00 F5 82 E4 34
R 00 00 00 18 00 04 00 0E F1 01 08 00 0C
T 00 00 B5 00 00 00 F5 83 E0 FF 90 00 01 E0 FE 7D
R 00 00 00 18 F1 81 03 00 0C 00 0B 00 0E
T 00 00 C0 00 8E 82 8D 83 A3 75 00 00 00 40 8D
R 00 00 00 18 F1 23 0A 00 1B
T 00 00 CA 00 00 01 C0 07 12 00 00 AD 82 D0 07 90
R 00 00 00 18 F1 23 03 00 1B 02 09 00 69
T 00 00 D5 00 01 ED F0 8F 82 22
R 00 00 00 18 00 03 00 0E
T 00 00 DC
R 00 00 00 18
T 00 00 DC C0 00 00 00 C0 E0 C0 F0 C0 82 C0 83 C0
R 00 00 00 18 F1 21 04 00 05
T 00 00 E7 07 C0 06 C0 05 C0 04 C0 03 C0 02 C0 01
R 00 00 00 18
T 00 00 F4 C0 00 C0 D0 75 D0 00 10 98 02 80 37
R 00 00 00 18
T 00 01 00
R 00 00 00 18
T 00 01 00 90 00 00 E0 FF 7E 00 8F 82 8E 83 A3 75
R 00 00 00 18 00 04 00 0E
T 00 01 0D 00 00 00 40 8E 00 00 01 12
R 00 00 00 18 F1 23 03 00 1B F1 23 08 00 1B
T 00 01 12 00 00 AE 82 90 00 01 E0 FF EE B5 07 02
R 00 00 00 18 02 03 00 69 00 08 00 0E
T 00 01 1F 80 16
R 00 00 00 18
T 00 01 21
R 00 00 00 18
T 00 01 21 90 00 00 E0 FF 24 00 00 00 F5 82 E4 34
R 00 00 00 18 00 04 00 0E F1 01 09 00 0C
T 00 01 2C 00 00 00 F5 83 E5 99 F0 90 00 00 EE F0
R 00 00 00 18 F1 81 03 00 0C 00 0C 00 0E
T 00 01 37
R 00 00 00 18
T 00 01 37 10 99 02 80 00
R 00 00 00 18
T 00 01 3C
R 00 00 00 18
T 00 01 3C
R 00 00 00 18
T 00 01 3C D0 D0 D0 00 D0 01 D0 02 D0 03 D0 04 D0
R 00 00 00 18
T 00 01 49 05 D0 06 D0 07 D0 83 D0 82 D0 F0 D0 E0
R 00 00 00 18
T 00 01 56 D0 00 00 00 32
R 00 00 00 18 F1 21 04 00 05
T 00 00 00
R 00 00 00 19
T 00 00 00 E7 E7 E7 E7 C2
R 00 00 00 19
T 00 00 00
R 00 00 00 1A
T 00 00 00 00
R 00 00 00 1A
T 00 00 01
R 00 00 00 1A
T 00 00 01 00
R 00 00 00 1A
AliceRX_STC/build/uart.sym
+583
View File
@@ -0,0 +1,583 @@
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 1.
Hexadecimal [24-Bits]
Symbol Table
.__.$$$. = 002710 L
.__.ABS. = 000000 G
.__.CPU. = 000000 L
.__.H$L. = 000001 L
A = 0000E0 L
A.0 = 0000E0 L
A.1 = 0000E1 L
A.2 = 0000E2 L
A.3 = 0000E3 L
A.4 = 0000E4 L
A.5 = 0000E5 L
A.6 = 0000E6 L
A.7 = 0000E7 L
AC = 0000D6 L
ACC = 0000E0 L
ACC.0 = 0000E0 L
ACC.1 = 0000E1 L
ACC.2 = 0000E2 L
ACC.3 = 0000E3 L
ACC.4 = 0000E4 L
ACC.5 = 0000E5 L
ACC.6 = 0000E6 L
ACC.7 = 0000E7 L
B = 0000F0 L
B.0 = 0000F0 L
B.1 = 0000F1 L
B.2 = 0000F2 L
B.3 = 0000F3 L
B.4 = 0000F4 L
B.5 = 0000F5 L
B.6 = 0000F6 L
B.7 = 0000F7 L
CPRL2 = 0000C8 L
CT2 = 0000C9 L
CY = 0000D7 L
DPH = 000083 L
DPL = 000082 L
EA = 0000AF L
ES = 0000AC L
ET0 = 0000A9 L
ET1 = 0000AB L
ET2 = 0000AD L
EX0 = 0000A8 L
EX1 = 0000AA L
EXEN2 = 0000CB L
EXF2 = 0000CE L
F0 = 0000D5 L
IE = 0000A8 L
IE.0 = 0000A8 L
IE.1 = 0000A9 L
IE.2 = 0000AA L
IE.3 = 0000AB L
IE.4 = 0000AC L
IE.5 = 0000AD L
IE.7 = 0000AF L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 2.
Hexadecimal [24-Bits]
Symbol Table
IE0 = 000089 L
IE1 = 00008B L
INT0 = 0000B2 L
INT1 = 0000B3 L
IP = 0000B8 L
IP.0 = 0000B8 L
IP.1 = 0000B9 L
IP.2 = 0000BA L
IP.3 = 0000BB L
IP.4 = 0000BC L
IP.5 = 0000BD L
IT0 = 000088 L
IT1 = 00008A L
OV = 0000D2 L
P = 0000D0 L
P0 = 000080 L
P0.0 = 000080 L
P0.1 = 000081 L
P0.2 = 000082 L
P0.3 = 000083 L
P0.4 = 000084 L
P0.5 = 000085 L
P0.6 = 000086 L
P0.7 = 000087 L
P1 = 000090 L
P1.0 = 000090 L
P1.1 = 000091 L
P1.2 = 000092 L
P1.3 = 000093 L
P1.4 = 000094 L
P1.5 = 000095 L
P1.6 = 000096 L
P1.7 = 000097 L
P2 = 0000A0 L
P2.0 = 0000A0 L
P2.1 = 0000A1 L
P2.2 = 0000A2 L
P2.3 = 0000A3 L
P2.4 = 0000A4 L
P2.5 = 0000A5 L
P2.6 = 0000A6 L
P2.7 = 0000A7 L
P3 = 0000B0 L
P3.0 = 0000B0 L
P3.1 = 0000B1 L
P3.2 = 0000B2 L
P3.3 = 0000B3 L
P3.4 = 0000B4 L
P3.5 = 0000B5 L
P3.6 = 0000B6 L
P3.7 = 0000B7 L
PCON = 000087 L
PS = 0000BC L
PSW = 0000D0 L
PSW.0 = 0000D0 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 3.
Hexadecimal [24-Bits]
Symbol Table
PSW.1 = 0000D1 L
PSW.2 = 0000D2 L
PSW.3 = 0000D3 L
PSW.4 = 0000D4 L
PSW.5 = 0000D5 L
PSW.6 = 0000D6 L
PSW.7 = 0000D7 L
PT0 = 0000B9 L
PT1 = 0000BB L
PT2 = 0000BD L
PX0 = 0000B8 L
PX1 = 0000BA L
RB8 = 00009A L
RCAP2H = 0000CB L
RCAP2L = 0000CA L
RCLK = 0000CD L
REN = 00009C L
RI = 000098 L
RS0 = 0000D3 L
RS1 = 0000D4 L
RXD = 0000B0 L
SBUF = 000099 L
SCON = 000098 L
SCON.0 = 000098 L
SCON.1 = 000099 L
SCON.2 = 00009A L
SCON.3 = 00009B L
SCON.4 = 00009C L
SCON.5 = 00009D L
SCON.6 = 00009E L
SCON.7 = 00009F L
SM0 = 00009F L
SM1 = 00009E L
SM2 = 00009D L
SP = 000081 L
T2CON = 0000C8 L
T2CON.0 = 0000C8 L
T2CON.1 = 0000C9 L
T2CON.2 = 0000CA L
T2CON.3 = 0000CB L
T2CON.4 = 0000CC L
T2CON.5 = 0000CD L
T2CON.6 = 0000CE L
T2CON.7 = 0000CF L
TB8 = 00009B L
TCLK = 0000CC L
TCON = 000088 L
TCON.0 = 000088 L
TCON.1 = 000089 L
TCON.2 = 00008A L
TCON.3 = 00008B L
TCON.4 = 00008C L
TCON.5 = 00008D L
TCON.6 = 00008E L
TCON.7 = 00008F L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 4.
Hexadecimal [24-Bits]
Symbol Table
TF0 = 00008D L
TF1 = 00008F L
TF2 = 0000CF L
TH0 = 00008C L
TH1 = 00008D L
TH2 = 0000CD L
TI = 000099 L
TL0 = 00008A L
TL1 = 00008B L
TL2 = 0000CC L
TMOD = 000089 L
TR0 = 00008C L
TR1 = 00008E L
TR2 = 0000CA L
TXD = 0000B1 L
_ACC = 0000E0 G
_ADCCFG = 0000DE G
_ADCTIM_X = 00FEA8 G
_ADC_CONTR = 0000BC G
_ADC_RES = 0000BD G
_ADC_RESL = 0000BE G
_AUXR = 00008E G
_B = 0000F0 G
_BRT = 00009C G
_CCAP0L = 0000EA G
_CCAP1L = 0000EB G
_CCAP2L = 0000EC G
_CCAP3L = 0000ED G
_CCAPM0 = 0000DA G
_CCAPM1 = 0000DB G
_CCAPM2 = 0000DC G
_CCAPM3 = 0000DD G
_CCON = 0000D8 G
_CMOD = 0000D9 G
_CMPCR1 = 0000E6 G
_CMPCR2 = 0000E7 G
19 _DEFAULT_ADDR 000000 R
_DPH = 000083 G
_DPL = 000082 G
_EA = 0000AF G
_EADC = 0000AD G
_ES = 0000AC G
_ET0 = 0000A9 G
_ET1 = 0000AB G
_IAP_ADDRH = 0000C3 G
_IAP_ADDRL = 0000C4 G
_IAP_CMD = 0000C5 G
_IAP_CONTR = 0000C7 G
_IAP_DATA = 0000C2 G
_IAP_TPS = 0000F7 G
_IAP_TRIG = 0000C6 G
_IE = 0000A8 G
_IE0 = 000089 G
_IE2 = 0000AF G
_INTCLKO = 00008F G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 5.
Hexadecimal [24-Bits]
Symbol Table
_IP = 0000B8 G
_IP2 = 0000B6 G
_IP2H = 0000B7 G
_IRCBAND_REG = 00009D G
_IT0 = 000088 G
_P0 = 000080 G
_P0M0 = 000094 G
_P0M1 = 000093 G
_P1 = 000090 G
_P1M0 = 000092 G
_P1M1 = 000091 G
_P2 = 0000A0 G
_P2M0 = 000096 G
_P2M1 = 000095 G
_P3 = 0000B0 G
_P3M0 = 0000B2 G
_P3M1 = 0000B1 G
_P4 = 0000C0 G
_P4M0 = 0000B4 G
_P4M1 = 0000B3 G
_P5 = 0000C8 G
_P5M0 = 0000CA G
_P5M1 = 0000C9 G
_PCA_PWM0 = 0000F2 G
_PCA_PWM1 = 0000F3 G
_PCA_PWM2 = 0000F4 G
_PCA_PWM3 = 0000F5 G
_PCON = 000087 G
_PSW = 0000D0 G
_P_SW1 = 0000A2 G
_P_SW2 = 0000BA G
_REN = 00009C G
_RI = 000098 G
_S2BUF = 00009B G
_S2CON = 00009A G
_SADDR = 0000A9 G
_SADEN = 0000B9 G
_SBUF = 000099 G
_SCON = 000098 G
_SP = 000081 G
_SPCTL = 0000CE G
_SPDAT = 0000CF G
_SPSTAT = 0000CD G
_T2H = 0000D6 G
_T2L = 0000D7 G
_T3H = 0000D4 G
_T3L = 0000D5 G
_T4H = 0000D2 G
_T4L = 0000D3 G
_T4T3M = 0000D1 G
_TA = 0000AE G
_TCON = 000088 G
_TF0 = 00008D G
_TF1 = 00008F G
_TH0 = 00008C G
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 6.
Hexadecimal [24-Bits]
Symbol Table
_TH1 = 00008D G
_TI = 000099 G
_TL0 = 00008A G
_TL1 = 00008B G
_TM2PS_X = 00FEA1 G
_TM3PS_X = 00FEA2 G
_TM4PS_X = 00FEA3 G
_TMOD = 000089 G
_TR0 = 00008C G
_TR1 = 00008E G
_WDT_CONTR = 0000C1 G
__divulong ****** GX
__divulong_PARM_2 ****** GX
__gptrget ****** GX
__modsint ****** GX
__modsint_PARM_2 ****** GX
1A __xinit__g_uart1_rx_head 000000 R
1A __xinit__g_uart1_rx_tail 000001 R
C _g_uart1_rx_buf 000000 GR
E _g_uart1_rx_head 000000 GR
E _g_uart1_rx_tail 000001 GR
18 _uart1_init 000000 GR
18 _uart1_isr 0000DC GR
18 _uart1_read_byte 000099 GR
18 _uart1_rx_available 00007F GR
A _uart1_rx_available_sloc0_1_0 000000 R
18 _uart1_send_byte 000040 GR
18 _uart1_send_bytes 00004A GR
6 _uart1_send_bytes_PARM_2 000000 GR
a = 0000E0 L
a.0 = 0000E0 L
a.1 = 0000E1 L
a.2 = 0000E2 L
a.3 = 0000E3 L
a.4 = 0000E4 L
a.5 = 0000E5 L
a.6 = 0000E6 L
a.7 = 0000E7 L
ac = 0000D6 L
acc = 0000E0 L
acc.0 = 0000E0 L
acc.1 = 0000E1 L
acc.2 = 0000E2 L
acc.3 = 0000E3 L
acc.4 = 0000E4 L
acc.5 = 0000E5 L
acc.6 = 0000E6 L
acc.7 = 0000E7 L
ar0 = 000000
ar1 = 000001
ar2 = 000002
ar3 = 000003
ar4 = 000004
ar5 = 000005
ar6 = 000006
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 7.
Hexadecimal [24-Bits]
Symbol Table
ar7 = 000007
b = 0000F0 L
b.0 = 0000F0 L
b.1 = 0000F1 L
b.2 = 0000F2 L
b.3 = 0000F3 L
b.4 = 0000F4 L
b.5 = 0000F5 L
b.6 = 0000F6 L
b.7 = 0000F7 L
5 b0 = 008000 R
5 b1 = 008100 R
5 b2 = 008200 R
5 b3 = 008300 R
5 b4 = 008400 R
5 b5 = 008500 R
5 b6 = 008600 R
5 b7 = 008700 R
5 bits 000000 R
cprl2 = 0000C8 L
ct2 = 0000C9 L
cy = 0000D7 L
dph = 000083 L
dpl = 000082 L
ea = 0000AF L
es = 0000AC L
et0 = 0000A9 L
et1 = 0000AB L
et2 = 0000AD L
ex0 = 0000A8 L
ex1 = 0000AA L
exen2 = 0000CB L
exf2 = 0000CE L
f0 = 0000D5 L
ie = 0000A8 L
ie.0 = 0000A8 L
ie.1 = 0000A9 L
ie.2 = 0000AA L
ie.3 = 0000AB L
ie.4 = 0000AC L
ie.5 = 0000AD L
ie.7 = 0000AF L
ie0 = 000089 L
ie1 = 00008B L
int0 = 0000B2 L
int1 = 0000B3 L
ip = 0000B8 L
ip.0 = 0000B8 L
ip.1 = 0000B9 L
ip.2 = 0000BA L
ip.3 = 0000BB L
ip.4 = 0000BC L
ip.5 = 0000BD L
it0 = 000088 L
it1 = 00008A L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 8.
Hexadecimal [24-Bits]
Symbol Table
ov = 0000D2 L
p = 0000D0 L
p0 = 000080 L
p0.0 = 000080 L
p0.1 = 000081 L
p0.2 = 000082 L
p0.3 = 000083 L
p0.4 = 000084 L
p0.5 = 000085 L
p0.6 = 000086 L
p0.7 = 000087 L
p1 = 000090 L
p1.0 = 000090 L
p1.1 = 000091 L
p1.2 = 000092 L
p1.3 = 000093 L
p1.4 = 000094 L
p1.5 = 000095 L
p1.6 = 000096 L
p1.7 = 000097 L
p2 = 0000A0 L
p2.0 = 0000A0 L
p2.1 = 0000A1 L
p2.2 = 0000A2 L
p2.3 = 0000A3 L
p2.4 = 0000A4 L
p2.5 = 0000A5 L
p2.6 = 0000A6 L
p2.7 = 0000A7 L
p3 = 0000B0 L
p3.0 = 0000B0 L
p3.1 = 0000B1 L
p3.2 = 0000B2 L
p3.3 = 0000B3 L
p3.4 = 0000B4 L
p3.5 = 0000B5 L
p3.6 = 0000B6 L
p3.7 = 0000B7 L
pcon = 000087 L
ps = 0000BC L
psw = 0000D0 L
psw.0 = 0000D0 L
psw.1 = 0000D1 L
psw.2 = 0000D2 L
psw.3 = 0000D3 L
psw.4 = 0000D4 L
psw.5 = 0000D5 L
psw.6 = 0000D6 L
psw.7 = 0000D7 L
pt0 = 0000B9 L
pt1 = 0000BB L
pt2 = 0000BD L
px0 = 0000B8 L
px1 = 0000BA L
rb8 = 00009A L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 9.
Hexadecimal [24-Bits]
Symbol Table
rcap2h = 0000CB L
rcap2l = 0000CA L
rclk = 0000CD L
ren = 00009C L
ri = 000098 L
rs0 = 0000D3 L
rs1 = 0000D4 L
rxd = 0000B0 L
sbuf = 000099 L
scon = 000098 L
scon.0 = 000098 L
scon.1 = 000099 L
scon.2 = 00009A L
scon.3 = 00009B L
scon.4 = 00009C L
scon.5 = 00009D L
scon.6 = 00009E L
scon.7 = 00009F L
sm0 = 00009F L
sm1 = 00009E L
sm2 = 00009D L
sp = 000081 L
t2con = 0000C8 L
t2con.0 = 0000C8 L
t2con.1 = 0000C9 L
t2con.2 = 0000CA L
t2con.3 = 0000CB L
t2con.4 = 0000CC L
t2con.5 = 0000CD L
t2con.6 = 0000CE L
t2con.7 = 0000CF L
tb8 = 00009B L
tclk = 0000CC L
tcon = 000088 L
tcon.0 = 000088 L
tcon.1 = 000089 L
tcon.2 = 00008A L
tcon.3 = 00008B L
tcon.4 = 00008C L
tcon.5 = 00008D L
tcon.6 = 00008E L
tcon.7 = 00008F L
tf0 = 00008D L
tf1 = 00008F L
tf2 = 0000CF L
th0 = 00008C L
th1 = 00008D L
th2 = 0000CD L
ti = 000099 L
tl0 = 00008A L
tl1 = 00008B L
tl2 = 0000CC L
tmod = 000089 L
tr0 = 00008C L
tr1 = 00008E L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 10.
Hexadecimal [24-Bits]
Symbol Table
tr2 = 0000CA L
txd = 0000B1 L
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Intel 8051), page 11.
Hexadecimal [24-Bits]
Area Table
0 _CODE size 0 flags 0
1 RSEG size 0 flags 8
2 RSEG0 size 0 flags 8
3 RSEG1 size 0 flags 8
4 REG_BANK_0 size 8 flags 4
5 BIT_BANK size 1 flags 4
6 DSEG size 1 flags 0
7 OSEG size 0 flags 4
8 ISEG size 0 flags 0
9 IABS size 0 flags 8
A BSEG size 1 flags 80
B PSEG size 0 flags 50
C XSEG size 40 flags 40
D XABS size 0 flags 48
E XISEG size 2 flags 40
F HOME size 0 flags 20
10 GSINIT0 size 0 flags 20
11 GSINIT1 size 0 flags 20
12 GSINIT2 size 0 flags 20
13 GSINIT3 size 0 flags 20
14 GSINIT4 size 0 flags 20
15 GSINIT5 size 0 flags 20
16 GSINIT size 0 flags 20
17 GSFINAL size 0 flags 20
18 CSEG size 159 flags 20
19 CONST size 5 flags 20
1A XINIT size 2 flags 20
1B CABS size 0 flags 28